Lines Matching refs:id
25 #define ASRC_STREAM_SOURCE_SELECT(id) \ argument
26 (TEGRA186_ASRC_CFG + ((id) * TEGRA186_ASRC_STREAM_STRIDE))
28 #define ASRC_STREAM_REG(reg, id) ((reg) + ((id) * TEGRA186_ASRC_STREAM_STRIDE)) argument
30 #define ASRC_STREAM_REG_DEFAULTS(id) \ argument
31 { ASRC_STREAM_REG(TEGRA186_ASRC_CFG, id), \
32 (((id) + 1) << 4) }, \
33 { ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, id), \
35 { ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, id), \
37 { ASRC_STREAM_REG(TEGRA186_ASRC_MUTE_UNMUTE_DURATION, id), \
39 { ASRC_STREAM_REG(TEGRA186_ASRC_RX_CIF_CTRL, id), \
41 { ASRC_STREAM_REG(TEGRA186_ASRC_TX_CIF_CTRL, id), \
72 unsigned int id) in tegra186_asrc_lock_stream() argument
76 id), in tegra186_asrc_lock_stream()
93 int id; in tegra186_asrc_runtime_resume() local
109 for (id = 0; id < TEGRA186_ASRC_STREAM_MAX; id++) { in tegra186_asrc_runtime_resume()
110 if (asrc->lane[id].ratio_source != in tegra186_asrc_runtime_resume()
116 id), in tegra186_asrc_runtime_resume()
117 asrc->lane[id].int_part); in tegra186_asrc_runtime_resume()
121 id), in tegra186_asrc_runtime_resume()
122 asrc->lane[id].frac_part); in tegra186_asrc_runtime_resume()
124 tegra186_asrc_lock_stream(asrc, id); in tegra186_asrc_runtime_resume()
169 int ret, id = dai->id; in tegra186_asrc_in_hw_params() local
173 ASRC_STREAM_REG(TEGRA186_ASRC_RX_THRESHOLD, dai->id), in tegra186_asrc_in_hw_params()
174 asrc->lane[id].input_thresh); in tegra186_asrc_in_hw_params()
177 ASRC_STREAM_REG(TEGRA186_ASRC_RX_CIF_CTRL, dai->id)); in tegra186_asrc_in_hw_params()
179 dev_err(dev, "Can't set ASRC RX%d CIF: %d\n", dai->id, ret); in tegra186_asrc_in_hw_params()
192 int ret, id = dai->id - 7; in tegra186_asrc_out_hw_params() local
196 ASRC_STREAM_REG(TEGRA186_ASRC_TX_THRESHOLD, id), in tegra186_asrc_out_hw_params()
197 asrc->lane[id].output_thresh); in tegra186_asrc_out_hw_params()
200 ASRC_STREAM_REG(TEGRA186_ASRC_TX_CIF_CTRL, id)); in tegra186_asrc_out_hw_params()
202 dev_err(dev, "Can't set ASRC TX%d CIF: %d\n", id, ret); in tegra186_asrc_out_hw_params()
207 if (asrc->lane[id].hwcomp_disable) { in tegra186_asrc_out_hw_params()
209 ASRC_STREAM_REG(TEGRA186_ASRC_CFG, id), in tegra186_asrc_out_hw_params()
214 ASRC_STREAM_REG(TEGRA186_ASRC_CFG, id), in tegra186_asrc_out_hw_params()
219 ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_COMP, id), in tegra186_asrc_out_hw_params()
225 ASRC_STREAM_REG(TEGRA186_ASRC_CFG, id), in tegra186_asrc_out_hw_params()
226 1, asrc->lane[id].ratio_source); in tegra186_asrc_out_hw_params()
228 if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_SW) { in tegra186_asrc_out_hw_params()
230 ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, id), in tegra186_asrc_out_hw_params()
231 asrc->lane[id].int_part); in tegra186_asrc_out_hw_params()
233 ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, id), in tegra186_asrc_out_hw_params()
234 asrc->lane[id].frac_part); in tegra186_asrc_out_hw_params()
235 tegra186_asrc_lock_stream(asrc, id); in tegra186_asrc_out_hw_params()
248 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_get_ratio_source() local
250 ucontrol->value.enumerated.item[0] = asrc->lane[id].ratio_source; in tegra186_asrc_get_ratio_source()
262 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_put_ratio_source() local
265 asrc->lane[id].ratio_source = ucontrol->value.enumerated.item[0]; in tegra186_asrc_put_ratio_source()
269 asrc->lane[id].ratio_source, in tegra186_asrc_put_ratio_source()
282 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_get_ratio_int() local
285 ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, id), in tegra186_asrc_get_ratio_int()
286 &asrc->lane[id].int_part); in tegra186_asrc_get_ratio_int()
288 ucontrol->value.integer.value[0] = asrc->lane[id].int_part; in tegra186_asrc_get_ratio_int()
300 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_put_ratio_int() local
303 if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD) { in tegra186_asrc_put_ratio_int()
306 id); in tegra186_asrc_put_ratio_int()
310 asrc->lane[id].int_part = ucontrol->value.integer.value[0]; in tegra186_asrc_put_ratio_int()
314 id), in tegra186_asrc_put_ratio_int()
316 asrc->lane[id].int_part, &change); in tegra186_asrc_put_ratio_int()
318 tegra186_asrc_lock_stream(asrc, id); in tegra186_asrc_put_ratio_int()
330 unsigned int id = asrc_private->regbase / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_get_ratio_frac() local
333 ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, id), in tegra186_asrc_get_ratio_frac()
334 &asrc->lane[id].frac_part); in tegra186_asrc_get_ratio_frac()
336 ucontrol->value.integer.value[0] = asrc->lane[id].frac_part; in tegra186_asrc_get_ratio_frac()
348 unsigned int id = asrc_private->regbase / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_put_ratio_frac() local
351 if (asrc->lane[id].ratio_source == TEGRA186_ASRC_RATIO_SOURCE_ARAD) { in tegra186_asrc_put_ratio_frac()
354 id); in tegra186_asrc_put_ratio_frac()
358 asrc->lane[id].frac_part = ucontrol->value.integer.value[0]; in tegra186_asrc_put_ratio_frac()
362 id), in tegra186_asrc_put_ratio_frac()
364 asrc->lane[id].frac_part, &change); in tegra186_asrc_put_ratio_frac()
366 tegra186_asrc_lock_stream(asrc, id); in tegra186_asrc_put_ratio_frac()
378 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_get_hwcomp_disable() local
380 ucontrol->value.integer.value[0] = asrc->lane[id].hwcomp_disable; in tegra186_asrc_get_hwcomp_disable()
392 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_put_hwcomp_disable() local
395 if (value == asrc->lane[id].hwcomp_disable) in tegra186_asrc_put_hwcomp_disable()
398 asrc->lane[id].hwcomp_disable = value; in tegra186_asrc_put_hwcomp_disable()
410 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_get_input_threshold() local
412 ucontrol->value.integer.value[0] = (asrc->lane[id].input_thresh & 0x3); in tegra186_asrc_get_input_threshold()
424 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_put_input_threshold() local
425 int value = (asrc->lane[id].input_thresh & ~(0x3)) | in tegra186_asrc_put_input_threshold()
428 if (value == asrc->lane[id].input_thresh) in tegra186_asrc_put_input_threshold()
431 asrc->lane[id].input_thresh = value; in tegra186_asrc_put_input_threshold()
443 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_get_output_threshold() local
445 ucontrol->value.integer.value[0] = (asrc->lane[id].output_thresh & 0x3); in tegra186_asrc_get_output_threshold()
457 unsigned int id = asrc_private->reg / TEGRA186_ASRC_STREAM_STRIDE; in tegra186_asrc_put_output_threshold() local
458 int value = (asrc->lane[id].output_thresh & ~(0x3)) | in tegra186_asrc_put_output_threshold()
461 if (value == asrc->lane[id].output_thresh) in tegra186_asrc_put_output_threshold()
464 asrc->lane[id].output_thresh = value; in tegra186_asrc_put_output_threshold()
474 unsigned int id = in tegra186_asrc_widget_event() local
478 ASRC_STREAM_REG(TEGRA186_ASRC_SOFT_RESET, id), in tegra186_asrc_widget_event()
492 #define IN_DAI(id) \ argument
494 .name = "ASRC-RX-CIF"#id, \
496 .stream_name = "RX" #id "-CIF-Playback",\
506 .stream_name = "RX" #id "-CIF-Capture", \
518 #define OUT_DAI(id) \ argument
520 .name = "ASRC-TX-CIF"#id, \
522 .stream_name = "TX" #id "-CIF-Playback",\
532 .stream_name = "TX" #id "-CIF-Capture", \
610 #define ASRC_STREAM_ROUTE(id, sname) \ argument
611 { "RX" #id " XBAR-" sname, NULL, "RX" #id " XBAR-TX" }, \
612 { "RX" #id "-CIF-" sname, NULL, "RX" #id " XBAR-" sname }, \
613 { "RX" #id, NULL, "RX" #id "-CIF-" sname }, \
614 { "TX" #id, NULL, "RX" #id }, \
615 { "TX" #id "-CIF-" sname, NULL, "TX" #id }, \
616 { "TX" #id " XBAR-" sname, NULL, "TX" #id "-CIF-" sname }, \
617 { "TX" #id " XBAR-RX", NULL, "TX" #id " XBAR-" sname },
619 #define ASRC_ROUTE(id) \ argument
620 ASRC_STREAM_ROUTE(id, "Playback") \
621 ASRC_STREAM_ROUTE(id, "Capture")
645 #define ASRC_SOURCE_DECL(name, id) \ argument
647 SOC_ENUM_SINGLE(ASRC_STREAM_SOURCE_SELECT(id), \