• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 #ifndef _ICE_H_
5 #define _ICE_H_
6 
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/firmware.h>
12 #include <linux/netdevice.h>
13 #include <linux/compiler.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/cpumask.h>
17 #include <linux/rtnetlink.h>
18 #include <linux/if_vlan.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/pci.h>
21 #include <linux/workqueue.h>
22 #include <linux/wait.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include <linux/ethtool.h>
26 #include <linux/timer.h>
27 #include <linux/delay.h>
28 #include <linux/bitmap.h>
29 #include <linux/log2.h>
30 #include <linux/ip.h>
31 #include <linux/sctp.h>
32 #include <linux/ipv6.h>
33 #include <linux/pkt_sched.h>
34 #include <linux/if_bridge.h>
35 #include <linux/ctype.h>
36 #include <linux/bpf.h>
37 #include <linux/btf.h>
38 #include <linux/auxiliary_bus.h>
39 #include <linux/avf/virtchnl.h>
40 #include <linux/cpu_rmap.h>
41 #include <linux/dim.h>
42 #include <net/pkt_cls.h>
43 #include <net/tc_act/tc_mirred.h>
44 #include <net/tc_act/tc_gact.h>
45 #include <net/ip.h>
46 #include <net/devlink.h>
47 #include <net/ipv6.h>
48 #include <net/xdp_sock.h>
49 #include <net/xdp_sock_drv.h>
50 #include <net/geneve.h>
51 #include <net/gre.h>
52 #include <net/udp_tunnel.h>
53 #include <net/vxlan.h>
54 #include <net/gtp.h>
55 #include <linux/ppp_defs.h>
56 #include "ice_devids.h"
57 #include "ice_type.h"
58 #include "ice_txrx.h"
59 #include "ice_dcb.h"
60 #include "ice_switch.h"
61 #include "ice_common.h"
62 #include "ice_flow.h"
63 #include "ice_sched.h"
64 #include "ice_idc_int.h"
65 #include "ice_sriov.h"
66 #include "ice_vf_mbx.h"
67 #include "ice_ptp.h"
68 #include "ice_fdir.h"
69 #include "ice_xsk.h"
70 #include "ice_arfs.h"
71 #include "ice_repr.h"
72 #include "ice_eswitch.h"
73 #include "ice_lag.h"
74 #include "ice_vsi_vlan_ops.h"
75 #include "ice_gnss.h"
76 
77 #define ICE_BAR0		0
78 #define ICE_REQ_DESC_MULTIPLE	32
79 #define ICE_MIN_NUM_DESC	64
80 #define ICE_MAX_NUM_DESC	8160
81 #define ICE_DFLT_MIN_RX_DESC	512
82 #define ICE_DFLT_NUM_TX_DESC	256
83 #define ICE_DFLT_NUM_RX_DESC	2048
84 
85 #define ICE_DFLT_TRAFFIC_CLASS	BIT(0)
86 #define ICE_INT_NAME_STR_LEN	(IFNAMSIZ + 16)
87 #define ICE_AQ_LEN		192
88 #define ICE_MBXSQ_LEN		64
89 #define ICE_SBQ_LEN		64
90 #define ICE_MIN_LAN_TXRX_MSIX	1
91 #define ICE_MIN_LAN_OICR_MSIX	1
92 #define ICE_MIN_MSIX		(ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
93 #define ICE_FDIR_MSIX		2
94 #define ICE_RDMA_NUM_AEQ_MSIX	4
95 #define ICE_MIN_RDMA_MSIX	2
96 #define ICE_ESWITCH_MSIX	1
97 #define ICE_NO_VSI		0xffff
98 #define ICE_VSI_MAP_CONTIG	0
99 #define ICE_VSI_MAP_SCATTER	1
100 #define ICE_MAX_SCATTER_TXQS	16
101 #define ICE_MAX_SCATTER_RXQS	16
102 #define ICE_Q_WAIT_RETRY_LIMIT	10
103 #define ICE_Q_WAIT_MAX_RETRY	(5 * ICE_Q_WAIT_RETRY_LIMIT)
104 #define ICE_MAX_LG_RSS_QS	256
105 #define ICE_RES_VALID_BIT	0x8000
106 #define ICE_RES_MISC_VEC_ID	(ICE_RES_VALID_BIT - 1)
107 #define ICE_RES_RDMA_VEC_ID	(ICE_RES_MISC_VEC_ID - 1)
108 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */
109 #define ICE_RES_VF_CTRL_VEC_ID	(ICE_RES_RDMA_VEC_ID - 1)
110 #define ICE_INVAL_Q_INDEX	0xffff
111 
112 #define ICE_MAX_RXQS_PER_TC		256	/* Used when setting VSI context per TC Rx queues */
113 
114 #define ICE_CHNL_START_TC		1
115 
116 #define ICE_MAX_RESET_WAIT		20
117 
118 #define ICE_VSIQF_HKEY_ARRAY_SIZE	((VSIQF_HKEY_MAX_INDEX + 1) *	4)
119 
120 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
121 
122 #define ICE_MAX_MTU	(ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
123 
124 #define ICE_UP_TABLE_TRANSLATE(val, i) \
125 		(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
126 		  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
127 
128 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
129 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
130 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
131 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
132 
133 /* Minimum BW limit is 500 Kbps for any scheduler node */
134 #define ICE_MIN_BW_LIMIT		500
135 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes.
136  * use it to convert user specified BW limit into Kbps
137  */
138 #define ICE_BW_KBPS_DIVISOR		125
139 
140 /* Macro for each VSI in a PF */
141 #define ice_for_each_vsi(pf, i) \
142 	for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
143 
144 /* Macros for each Tx/Xdp/Rx ring in a VSI */
145 #define ice_for_each_txq(vsi, i) \
146 	for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
147 
148 #define ice_for_each_xdp_txq(vsi, i) \
149 	for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++)
150 
151 #define ice_for_each_rxq(vsi, i) \
152 	for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
153 
154 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
155 #define ice_for_each_alloc_txq(vsi, i) \
156 	for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
157 
158 #define ice_for_each_alloc_rxq(vsi, i) \
159 	for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
160 
161 #define ice_for_each_q_vector(vsi, i) \
162 	for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
163 
164 #define ice_for_each_chnl_tc(i)	\
165 	for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++)
166 
167 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX)
168 
169 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
170 				     ICE_PROMISC_UCAST_RX | \
171 				     ICE_PROMISC_VLAN_TX  | \
172 				     ICE_PROMISC_VLAN_RX)
173 
174 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
175 
176 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
177 				     ICE_PROMISC_MCAST_RX | \
178 				     ICE_PROMISC_VLAN_TX  | \
179 				     ICE_PROMISC_VLAN_RX)
180 
181 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
182 
183 enum ice_feature {
184 	ICE_F_DSCP,
185 	ICE_F_PTP_EXTTS,
186 	ICE_F_SMA_CTRL,
187 	ICE_F_GNSS,
188 	ICE_F_MAX
189 };
190 
191 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key);
192 
193 struct ice_channel {
194 	struct list_head list;
195 	u8 type;
196 	u16 sw_id;
197 	u16 base_q;
198 	u16 num_rxq;
199 	u16 num_txq;
200 	u16 vsi_num;
201 	u8 ena_tc;
202 	struct ice_aqc_vsi_props info;
203 	u64 max_tx_rate;
204 	u64 min_tx_rate;
205 	atomic_t num_sb_fltr;
206 	struct ice_vsi *ch_vsi;
207 };
208 
209 struct ice_txq_meta {
210 	u32 q_teid;	/* Tx-scheduler element identifier */
211 	u16 q_id;	/* Entry in VSI's txq_map bitmap */
212 	u16 q_handle;	/* Relative index of Tx queue within TC */
213 	u16 vsi_idx;	/* VSI index that Tx queue belongs to */
214 	u8 tc;		/* TC number that Tx queue belongs to */
215 };
216 
217 struct ice_tc_info {
218 	u16 qoffset;
219 	u16 qcount_tx;
220 	u16 qcount_rx;
221 	u8 netdev_tc;
222 };
223 
224 struct ice_tc_cfg {
225 	u8 numtc; /* Total number of enabled TCs */
226 	u16 ena_tc; /* Tx map */
227 	struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
228 };
229 
230 struct ice_res_tracker {
231 	u16 num_entries;
232 	u16 end;
233 	u16 list[];
234 };
235 
236 struct ice_qs_cfg {
237 	struct mutex *qs_mutex;  /* will be assigned to &pf->avail_q_mutex */
238 	unsigned long *pf_map;
239 	unsigned long pf_map_size;
240 	unsigned int q_count;
241 	unsigned int scatter_count;
242 	u16 *vsi_map;
243 	u16 vsi_map_offset;
244 	u8 mapping_mode;
245 };
246 
247 struct ice_sw {
248 	struct ice_pf *pf;
249 	u16 sw_id;		/* switch ID for this switch */
250 	u16 bridge_mode;	/* VEB/VEPA/Port Virtualizer */
251 };
252 
253 enum ice_pf_state {
254 	ICE_TESTING,
255 	ICE_DOWN,
256 	ICE_NEEDS_RESTART,
257 	ICE_PREPARED_FOR_RESET,	/* set by driver when prepared */
258 	ICE_RESET_OICR_RECV,		/* set by driver after rcv reset OICR */
259 	ICE_PFR_REQ,		/* set by driver */
260 	ICE_CORER_REQ,		/* set by driver */
261 	ICE_GLOBR_REQ,		/* set by driver */
262 	ICE_CORER_RECV,		/* set by OICR handler */
263 	ICE_GLOBR_RECV,		/* set by OICR handler */
264 	ICE_EMPR_RECV,		/* set by OICR handler */
265 	ICE_SUSPENDED,		/* set on module remove path */
266 	ICE_RESET_FAILED,		/* set by reset/rebuild */
267 	/* When checking for the PF to be in a nominal operating state, the
268 	 * bits that are grouped at the beginning of the list need to be
269 	 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
270 	 * be checked. If you need to add a bit into consideration for nominal
271 	 * operating state, it must be added before
272 	 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
273 	 * without appropriate consideration.
274 	 */
275 	ICE_STATE_NOMINAL_CHECK_BITS,
276 	ICE_ADMINQ_EVENT_PENDING,
277 	ICE_MAILBOXQ_EVENT_PENDING,
278 	ICE_SIDEBANDQ_EVENT_PENDING,
279 	ICE_MDD_EVENT_PENDING,
280 	ICE_VFLR_EVENT_PENDING,
281 	ICE_FLTR_OVERFLOW_PROMISC,
282 	ICE_VF_DIS,
283 	ICE_CFG_BUSY,
284 	ICE_SERVICE_SCHED,
285 	ICE_SERVICE_DIS,
286 	ICE_FD_FLUSH_REQ,
287 	ICE_OICR_INTR_DIS,		/* Global OICR interrupt disabled */
288 	ICE_MDD_VF_PRINT_PENDING,	/* set when MDD event handle */
289 	ICE_VF_RESETS_DISABLED,	/* disable resets during ice_remove */
290 	ICE_LINK_DEFAULT_OVERRIDE_PENDING,
291 	ICE_PHY_INIT_COMPLETE,
292 	ICE_FD_VF_FLUSH_CTX,		/* set at FD Rx IRQ or timeout */
293 	ICE_AUX_ERR_PENDING,
294 	ICE_STATE_NBITS		/* must be last */
295 };
296 
297 enum ice_vsi_state {
298 	ICE_VSI_DOWN,
299 	ICE_VSI_NEEDS_RESTART,
300 	ICE_VSI_NETDEV_ALLOCD,
301 	ICE_VSI_NETDEV_REGISTERED,
302 	ICE_VSI_UMAC_FLTR_CHANGED,
303 	ICE_VSI_MMAC_FLTR_CHANGED,
304 	ICE_VSI_PROMISC_CHANGED,
305 	ICE_VSI_STATE_NBITS		/* must be last */
306 };
307 
308 /* struct that defines a VSI, associated with a dev */
309 struct ice_vsi {
310 	struct net_device *netdev;
311 	struct ice_sw *vsw;		 /* switch this VSI is on */
312 	struct ice_pf *back;		 /* back pointer to PF */
313 	struct ice_port_info *port_info; /* back pointer to port_info */
314 	struct ice_rx_ring **rx_rings;	 /* Rx ring array */
315 	struct ice_tx_ring **tx_rings;	 /* Tx ring array */
316 	struct ice_q_vector **q_vectors; /* q_vector array */
317 
318 	irqreturn_t (*irq_handler)(int irq, void *data);
319 
320 	u64 tx_linearize;
321 	DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);
322 	unsigned int current_netdev_flags;
323 	u32 tx_restart;
324 	u32 tx_busy;
325 	u32 rx_buf_failed;
326 	u32 rx_page_failed;
327 	u16 num_q_vectors;
328 	u16 base_vector;		/* IRQ base for OS reserved vectors */
329 	enum ice_vsi_type type;
330 	u16 vsi_num;			/* HW (absolute) index of this VSI */
331 	u16 idx;			/* software index in pf->vsi[] */
332 
333 	struct ice_vf *vf;		/* VF associated with this VSI */
334 
335 	u16 ethtype;			/* Ethernet protocol for pause frame */
336 	u16 num_gfltr;
337 	u16 num_bfltr;
338 
339 	/* RSS config */
340 	u16 rss_table_size;	/* HW RSS table size */
341 	u16 rss_size;		/* Allocated RSS queues */
342 	u8 *rss_hkey_user;	/* User configured hash keys */
343 	u8 *rss_lut_user;	/* User configured lookup table entries */
344 	u8 rss_lut_type;	/* used to configure Get/Set RSS LUT AQ call */
345 
346 	/* aRFS members only allocated for the PF VSI */
347 #define ICE_MAX_ARFS_LIST	1024
348 #define ICE_ARFS_LST_MASK	(ICE_MAX_ARFS_LIST - 1)
349 	struct hlist_head *arfs_fltr_list;
350 	struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
351 	spinlock_t arfs_lock;	/* protects aRFS hash table and filter state */
352 	atomic_t *arfs_last_fltr_id;
353 
354 	u16 max_frame;
355 	u16 rx_buf_len;
356 
357 	struct ice_aqc_vsi_props info;	 /* VSI properties */
358 
359 	/* VSI stats */
360 	struct rtnl_link_stats64 net_stats;
361 	struct ice_eth_stats eth_stats;
362 	struct ice_eth_stats eth_stats_prev;
363 
364 	struct list_head tmp_sync_list;		/* MAC filters to be synced */
365 	struct list_head tmp_unsync_list;	/* MAC filters to be unsynced */
366 
367 	u8 irqs_ready:1;
368 	u8 current_isup:1;		 /* Sync 'link up' logging */
369 	u8 stat_offsets_loaded:1;
370 	struct ice_vsi_vlan_ops inner_vlan_ops;
371 	struct ice_vsi_vlan_ops outer_vlan_ops;
372 	u16 num_vlan;
373 
374 	/* queue information */
375 	u8 tx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
376 	u8 rx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
377 	u16 *txq_map;			 /* index in pf->avail_txqs */
378 	u16 *rxq_map;			 /* index in pf->avail_rxqs */
379 	u16 alloc_txq;			 /* Allocated Tx queues */
380 	u16 num_txq;			 /* Used Tx queues */
381 	u16 alloc_rxq;			 /* Allocated Rx queues */
382 	u16 num_rxq;			 /* Used Rx queues */
383 	u16 req_txq;			 /* User requested Tx queues */
384 	u16 req_rxq;			 /* User requested Rx queues */
385 	u16 num_rx_desc;
386 	u16 num_tx_desc;
387 	u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];
388 	struct ice_tc_cfg tc_cfg;
389 	struct bpf_prog *xdp_prog;
390 	struct ice_tx_ring **xdp_rings;	 /* XDP ring array */
391 	unsigned long *af_xdp_zc_qps;	 /* tracks AF_XDP ZC enabled qps */
392 	u16 num_xdp_txq;		 /* Used XDP queues */
393 	u8 xdp_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
394 
395 	struct net_device **target_netdevs;
396 
397 	struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */
398 
399 	/* Channel Specific Fields */
400 	struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC];
401 	u16 cnt_q_avail;
402 	u16 next_base_q;	/* next queue to be used for channel setup */
403 	struct list_head ch_list;
404 	u16 num_chnl_rxq;
405 	u16 num_chnl_txq;
406 	u16 ch_rss_size;
407 	u16 num_chnl_fltr;
408 	/* store away rss size info before configuring ADQ channels so that,
409 	 * it can be used after tc-qdisc delete, to get back RSS setting as
410 	 * they were before
411 	 */
412 	u16 orig_rss_size;
413 	/* this keeps tracks of all enabled TC with and without DCB
414 	 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue
415 	 * information
416 	 */
417 	u8 all_numtc;
418 	u16 all_enatc;
419 
420 	/* store away TC info, to be used for rebuild logic */
421 	u8 old_numtc;
422 	u16 old_ena_tc;
423 
424 	struct ice_channel *ch;
425 
426 	/* setup back reference, to which aggregator node this VSI
427 	 * corresponds to
428 	 */
429 	struct ice_agg_node *agg_node;
430 } ____cacheline_internodealigned_in_smp;
431 
432 /* struct that defines an interrupt vector */
433 struct ice_q_vector {
434 	struct ice_vsi *vsi;
435 
436 	u16 v_idx;			/* index in the vsi->q_vector array. */
437 	u16 reg_idx;
438 	u8 num_ring_rx;			/* total number of Rx rings in vector */
439 	u8 num_ring_tx;			/* total number of Tx rings in vector */
440 	u8 wb_on_itr:1;			/* if true, WB on ITR is enabled */
441 	/* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
442 	 * value to the device
443 	 */
444 	u8 intrl;
445 
446 	struct napi_struct napi;
447 
448 	struct ice_ring_container rx;
449 	struct ice_ring_container tx;
450 
451 	cpumask_t affinity_mask;
452 	struct irq_affinity_notify affinity_notify;
453 
454 	struct ice_channel *ch;
455 
456 	char name[ICE_INT_NAME_STR_LEN];
457 
458 	u16 total_events;	/* net_dim(): number of interrupts processed */
459 } ____cacheline_internodealigned_in_smp;
460 
461 enum ice_pf_flags {
462 	ICE_FLAG_FLTR_SYNC,
463 	ICE_FLAG_RDMA_ENA,
464 	ICE_FLAG_RSS_ENA,
465 	ICE_FLAG_SRIOV_ENA,
466 	ICE_FLAG_SRIOV_CAPABLE,
467 	ICE_FLAG_DCB_CAPABLE,
468 	ICE_FLAG_DCB_ENA,
469 	ICE_FLAG_FD_ENA,
470 	ICE_FLAG_PTP_SUPPORTED,		/* PTP is supported by NVM */
471 	ICE_FLAG_PTP,			/* PTP is enabled by software */
472 	ICE_FLAG_ADV_FEATURES,
473 	ICE_FLAG_TC_MQPRIO,		/* support for Multi queue TC */
474 	ICE_FLAG_CLS_FLOWER,
475 	ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
476 	ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
477 	ICE_FLAG_NO_MEDIA,
478 	ICE_FLAG_FW_LLDP_AGENT,
479 	ICE_FLAG_MOD_POWER_UNSUPPORTED,
480 	ICE_FLAG_PHY_FW_LOAD_FAILED,
481 	ICE_FLAG_ETHTOOL_CTXT,		/* set when ethtool holds RTNL lock */
482 	ICE_FLAG_LEGACY_RX,
483 	ICE_FLAG_VF_TRUE_PROMISC_ENA,
484 	ICE_FLAG_MDD_AUTO_RESET_VF,
485 	ICE_FLAG_VF_VLAN_PRUNING,
486 	ICE_FLAG_LINK_LENIENT_MODE_ENA,
487 	ICE_FLAG_PLUG_AUX_DEV,
488 	ICE_FLAG_UNPLUG_AUX_DEV,
489 	ICE_FLAG_MTU_CHANGED,
490 	ICE_FLAG_GNSS,			/* GNSS successfully initialized */
491 	ICE_PF_FLAGS_NBITS		/* must be last */
492 };
493 
494 enum ice_misc_thread_tasks {
495 	ICE_MISC_THREAD_EXTTS_EVENT,
496 	ICE_MISC_THREAD_TX_TSTAMP,
497 	ICE_MISC_THREAD_NBITS		/* must be last */
498 };
499 
500 struct ice_switchdev_info {
501 	struct ice_vsi *control_vsi;
502 	struct ice_vsi *uplink_vsi;
503 	bool is_running;
504 };
505 
506 struct ice_agg_node {
507 	u32 agg_id;
508 #define ICE_MAX_VSIS_IN_AGG_NODE	64
509 	u32 num_vsis;
510 	u8 valid;
511 };
512 
513 struct ice_pf {
514 	struct pci_dev *pdev;
515 
516 	struct devlink_region *nvm_region;
517 	struct devlink_region *sram_region;
518 	struct devlink_region *devcaps_region;
519 
520 	/* devlink port data */
521 	struct devlink_port devlink_port;
522 
523 	/* OS reserved IRQ details */
524 	struct msix_entry *msix_entries;
525 	struct ice_res_tracker *irq_tracker;
526 	/* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
527 	 * number of MSIX vectors needed for all SR-IOV VFs from the number of
528 	 * MSIX vectors allowed on this PF.
529 	 */
530 	u16 sriov_base_vector;
531 
532 	u16 ctrl_vsi_idx;		/* control VSI index in pf->vsi array */
533 
534 	struct ice_vsi **vsi;		/* VSIs created by the driver */
535 	struct ice_sw *first_sw;	/* first switch created by firmware */
536 	u16 eswitch_mode;		/* current mode of eswitch */
537 	struct ice_vfs vfs;
538 	DECLARE_BITMAP(features, ICE_F_MAX);
539 	DECLARE_BITMAP(state, ICE_STATE_NBITS);
540 	DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
541 	DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS);
542 	unsigned long *avail_txqs;	/* bitmap to track PF Tx queue usage */
543 	unsigned long *avail_rxqs;	/* bitmap to track PF Rx queue usage */
544 	unsigned long serv_tmr_period;
545 	unsigned long serv_tmr_prev;
546 	struct timer_list serv_tmr;
547 	struct work_struct serv_task;
548 	struct mutex avail_q_mutex;	/* protects access to avail_[rx|tx]qs */
549 	struct mutex sw_mutex;		/* lock for protecting VSI alloc flow */
550 	struct mutex tc_mutex;		/* lock to protect TC changes */
551 	struct mutex adev_mutex;	/* lock to protect aux device access */
552 	u32 msg_enable;
553 	struct ice_ptp ptp;
554 	struct tty_driver *ice_gnss_tty_driver;
555 	struct tty_port *gnss_tty_port[ICE_GNSS_TTY_MINOR_DEVICES];
556 	struct gnss_serial *gnss_serial[ICE_GNSS_TTY_MINOR_DEVICES];
557 	u16 num_rdma_msix;		/* Total MSIX vectors for RDMA driver */
558 	u16 rdma_base_vector;
559 
560 	/* spinlock to protect the AdminQ wait list */
561 	spinlock_t aq_wait_lock;
562 	struct hlist_head aq_wait_list;
563 	wait_queue_head_t aq_wait_queue;
564 	bool fw_emp_reset_disabled;
565 
566 	wait_queue_head_t reset_wait_queue;
567 
568 	u32 hw_csum_rx_error;
569 	u32 oicr_err_reg;
570 	u16 oicr_idx;		/* Other interrupt cause MSIX vector index */
571 	u16 num_avail_sw_msix;	/* remaining MSIX SW vectors left unclaimed */
572 	u16 max_pf_txqs;	/* Total Tx queues PF wide */
573 	u16 max_pf_rxqs;	/* Total Rx queues PF wide */
574 	u16 num_lan_msix;	/* Total MSIX vectors for base driver */
575 	u16 num_lan_tx;		/* num LAN Tx queues setup */
576 	u16 num_lan_rx;		/* num LAN Rx queues setup */
577 	u16 next_vsi;		/* Next free slot in pf->vsi[] - 0-based! */
578 	u16 num_alloc_vsi;
579 	u16 corer_count;	/* Core reset count */
580 	u16 globr_count;	/* Global reset count */
581 	u16 empr_count;		/* EMP reset count */
582 	u16 pfr_count;		/* PF reset count */
583 
584 	u8 wol_ena : 1;		/* software state of WoL */
585 	u32 wakeup_reason;	/* last wakeup reason */
586 	struct ice_hw_port_stats stats;
587 	struct ice_hw_port_stats stats_prev;
588 	struct ice_hw hw;
589 	u8 stat_prev_loaded:1; /* has previous stats been loaded */
590 	u8 rdma_mode;
591 	u16 dcbx_cap;
592 	u32 tx_timeout_count;
593 	unsigned long tx_timeout_last_recovery;
594 	u32 tx_timeout_recovery_level;
595 	char int_name[ICE_INT_NAME_STR_LEN];
596 	struct auxiliary_device *adev;
597 	int aux_idx;
598 	u32 sw_int_count;
599 	/* count of tc_flower filters specific to channel (aka where filter
600 	 * action is "hw_tc <tc_num>")
601 	 */
602 	u16 num_dmac_chnl_fltrs;
603 	struct hlist_head tc_flower_fltr_list;
604 
605 	__le64 nvm_phy_type_lo; /* NVM PHY type low */
606 	__le64 nvm_phy_type_hi; /* NVM PHY type high */
607 	struct ice_link_default_override_tlv link_dflt_override;
608 	struct ice_lag *lag; /* Link Aggregation information */
609 
610 	struct ice_switchdev_info switchdev;
611 
612 #define ICE_INVALID_AGG_NODE_ID		0
613 #define ICE_PF_AGG_NODE_ID_START	1
614 #define ICE_MAX_PF_AGG_NODES		32
615 	struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];
616 #define ICE_VF_AGG_NODE_ID_START	65
617 #define ICE_MAX_VF_AGG_NODES		32
618 	struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
619 };
620 
621 struct ice_netdev_priv {
622 	struct ice_vsi *vsi;
623 	struct ice_repr *repr;
624 	/* indirect block callbacks on registered higher level devices
625 	 * (e.g. tunnel devices)
626 	 *
627 	 * tc_indr_block_cb_priv_list is used to look up indirect callback
628 	 * private data
629 	 */
630 	struct list_head tc_indr_block_priv_list;
631 };
632 
633 /**
634  * ice_vector_ch_enabled
635  * @qv: pointer to q_vector, can be NULL
636  *
637  * This function returns true if vector is channel enabled otherwise false
638  */
ice_vector_ch_enabled(struct ice_q_vector * qv)639 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv)
640 {
641 	return !!qv->ch; /* Enable it to run with TC */
642 }
643 
644 /**
645  * ice_irq_dynamic_ena - Enable default interrupt generation settings
646  * @hw: pointer to HW struct
647  * @vsi: pointer to VSI struct, can be NULL
648  * @q_vector: pointer to q_vector, can be NULL
649  */
650 static inline void
ice_irq_dynamic_ena(struct ice_hw * hw,struct ice_vsi * vsi,struct ice_q_vector * q_vector)651 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
652 		    struct ice_q_vector *q_vector)
653 {
654 	u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
655 				((struct ice_pf *)hw->back)->oicr_idx;
656 	int itr = ICE_ITR_NONE;
657 	u32 val;
658 
659 	/* clear the PBA here, as this function is meant to clean out all
660 	 * previous interrupts and enable the interrupt
661 	 */
662 	val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
663 	      (itr << GLINT_DYN_CTL_ITR_INDX_S);
664 	if (vsi)
665 		if (test_bit(ICE_VSI_DOWN, vsi->state))
666 			return;
667 	wr32(hw, GLINT_DYN_CTL(vector), val);
668 }
669 
670 /**
671  * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
672  * @netdev: pointer to the netdev struct
673  */
ice_netdev_to_pf(struct net_device * netdev)674 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
675 {
676 	struct ice_netdev_priv *np = netdev_priv(netdev);
677 
678 	return np->vsi->back;
679 }
680 
ice_is_xdp_ena_vsi(struct ice_vsi * vsi)681 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
682 {
683 	return !!READ_ONCE(vsi->xdp_prog);
684 }
685 
ice_set_ring_xdp(struct ice_tx_ring * ring)686 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring)
687 {
688 	ring->flags |= ICE_TX_FLAGS_RING_XDP;
689 }
690 
691 /**
692  * ice_xsk_pool - get XSK buffer pool bound to a ring
693  * @ring: Rx ring to use
694  *
695  * Returns a pointer to xsk_buff_pool structure if there is a buffer pool
696  * present, NULL otherwise.
697  */
ice_xsk_pool(struct ice_rx_ring * ring)698 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring)
699 {
700 	struct ice_vsi *vsi = ring->vsi;
701 	u16 qid = ring->q_index;
702 
703 	if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps))
704 		return NULL;
705 
706 	return xsk_get_pool_from_qid(vsi->netdev, qid);
707 }
708 
709 /**
710  * ice_tx_xsk_pool - assign XSK buff pool to XDP ring
711  * @vsi: pointer to VSI
712  * @qid: index of a queue to look at XSK buff pool presence
713  *
714  * Sets XSK buff pool pointer on XDP ring.
715  *
716  * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided
717  * queue id. Reason for doing so is that queue vectors might have assigned more
718  * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring
719  * carries a pointer to one of these XDP rings for its own purposes, such as
720  * handling XDP_TX action, therefore we can piggyback here on the
721  * rx_ring->xdp_ring assignment that was done during XDP rings initialization.
722  */
ice_tx_xsk_pool(struct ice_vsi * vsi,u16 qid)723 static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid)
724 {
725 	struct ice_tx_ring *ring;
726 
727 	ring = vsi->rx_rings[qid]->xdp_ring;
728 	if (!ring)
729 		return;
730 
731 	if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps)) {
732 		ring->xsk_pool = NULL;
733 		return;
734 	}
735 
736 	ring->xsk_pool = xsk_get_pool_from_qid(vsi->netdev, qid);
737 }
738 
739 /**
740  * ice_get_main_vsi - Get the PF VSI
741  * @pf: PF instance
742  *
743  * returns pf->vsi[0], which by definition is the PF VSI
744  */
ice_get_main_vsi(struct ice_pf * pf)745 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
746 {
747 	if (pf->vsi)
748 		return pf->vsi[0];
749 
750 	return NULL;
751 }
752 
753 /**
754  * ice_get_netdev_priv_vsi - return VSI associated with netdev priv.
755  * @np: private netdev structure
756  */
ice_get_netdev_priv_vsi(struct ice_netdev_priv * np)757 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np)
758 {
759 	/* In case of port representor return source port VSI. */
760 	if (np->repr)
761 		return np->repr->src_vsi;
762 	else
763 		return np->vsi;
764 }
765 
766 /**
767  * ice_get_ctrl_vsi - Get the control VSI
768  * @pf: PF instance
769  */
ice_get_ctrl_vsi(struct ice_pf * pf)770 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
771 {
772 	/* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
773 	if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
774 		return NULL;
775 
776 	return pf->vsi[pf->ctrl_vsi_idx];
777 }
778 
779 /**
780  * ice_find_vsi - Find the VSI from VSI ID
781  * @pf: The PF pointer to search in
782  * @vsi_num: The VSI ID to search for
783  */
ice_find_vsi(struct ice_pf * pf,u16 vsi_num)784 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num)
785 {
786 	int i;
787 
788 	ice_for_each_vsi(pf, i)
789 		if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num)
790 			return  pf->vsi[i];
791 	return NULL;
792 }
793 
794 /**
795  * ice_is_switchdev_running - check if switchdev is configured
796  * @pf: pointer to PF structure
797  *
798  * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV
799  * and switchdev is configured, false otherwise.
800  */
ice_is_switchdev_running(struct ice_pf * pf)801 static inline bool ice_is_switchdev_running(struct ice_pf *pf)
802 {
803 	return pf->switchdev.is_running;
804 }
805 
806 /**
807  * ice_set_sriov_cap - enable SRIOV in PF flags
808  * @pf: PF struct
809  */
ice_set_sriov_cap(struct ice_pf * pf)810 static inline void ice_set_sriov_cap(struct ice_pf *pf)
811 {
812 	if (pf->hw.func_caps.common_cap.sr_iov_1_1)
813 		set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
814 }
815 
816 /**
817  * ice_clear_sriov_cap - disable SRIOV in PF flags
818  * @pf: PF struct
819  */
ice_clear_sriov_cap(struct ice_pf * pf)820 static inline void ice_clear_sriov_cap(struct ice_pf *pf)
821 {
822 	clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
823 }
824 
825 #define ICE_FD_STAT_CTR_BLOCK_COUNT	256
826 #define ICE_FD_STAT_PF_IDX(base_idx) \
827 			((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
828 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
829 #define ICE_FD_STAT_CH			1
830 #define ICE_FD_CH_STAT_IDX(base_idx) \
831 			(ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH)
832 
833 /**
834  * ice_is_adq_active - any active ADQs
835  * @pf: pointer to PF
836  *
837  * This function returns true if there are any ADQs configured (which is
838  * determined by looking at VSI type (which should be VSI_PF), numtc, and
839  * TC_MQPRIO flag) otherwise return false
840  */
ice_is_adq_active(struct ice_pf * pf)841 static inline bool ice_is_adq_active(struct ice_pf *pf)
842 {
843 	struct ice_vsi *vsi;
844 
845 	vsi = ice_get_main_vsi(pf);
846 	if (!vsi)
847 		return false;
848 
849 	/* is ADQ configured */
850 	if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC &&
851 	    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
852 		return true;
853 
854 	return false;
855 }
856 
857 bool netif_is_ice(struct net_device *dev);
858 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
859 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
860 int ice_vsi_open_ctrl(struct ice_vsi *vsi);
861 int ice_vsi_open(struct ice_vsi *vsi);
862 void ice_set_ethtool_ops(struct net_device *netdev);
863 void ice_set_ethtool_repr_ops(struct net_device *netdev);
864 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
865 u16 ice_get_avail_txq_count(struct ice_pf *pf);
866 u16 ice_get_avail_rxq_count(struct ice_pf *pf);
867 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked);
868 void ice_update_vsi_stats(struct ice_vsi *vsi);
869 void ice_update_pf_stats(struct ice_pf *pf);
870 void
871 ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp,
872 			     struct ice_q_stats stats, u64 *pkts, u64 *bytes);
873 int ice_up(struct ice_vsi *vsi);
874 int ice_down(struct ice_vsi *vsi);
875 int ice_down_up(struct ice_vsi *vsi);
876 int ice_vsi_cfg(struct ice_vsi *vsi);
877 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
878 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi);
879 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog);
880 int ice_destroy_xdp_rings(struct ice_vsi *vsi);
881 int
882 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
883 	     u32 flags);
884 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
885 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
886 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);
887 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);
888 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
889 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
890 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
891 int ice_plug_aux_dev(struct ice_pf *pf);
892 void ice_unplug_aux_dev(struct ice_pf *pf);
893 int ice_init_rdma(struct ice_pf *pf);
894 const char *ice_aq_str(enum ice_aq_err aq_err);
895 bool ice_is_wol_supported(struct ice_hw *hw);
896 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi);
897 int
898 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
899 		    bool is_tun);
900 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
901 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
902 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
903 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
904 int
905 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
906 		      u32 *rule_locs);
907 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx);
908 void ice_fdir_release_flows(struct ice_hw *hw);
909 void ice_fdir_replay_flows(struct ice_hw *hw);
910 void ice_fdir_replay_fltrs(struct ice_pf *pf);
911 int ice_fdir_create_dflt_rules(struct ice_pf *pf);
912 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
913 			  struct ice_rq_event_info *event);
914 int ice_open(struct net_device *netdev);
915 int ice_open_internal(struct net_device *netdev);
916 int ice_stop(struct net_device *netdev);
917 void ice_service_task_schedule(struct ice_pf *pf);
918 
919 /**
920  * ice_set_rdma_cap - enable RDMA support
921  * @pf: PF struct
922  */
ice_set_rdma_cap(struct ice_pf * pf)923 static inline void ice_set_rdma_cap(struct ice_pf *pf)
924 {
925 	if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
926 		set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
927 		set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
928 	}
929 }
930 
931 /**
932  * ice_clear_rdma_cap - disable RDMA support
933  * @pf: PF struct
934  */
ice_clear_rdma_cap(struct ice_pf * pf)935 static inline void ice_clear_rdma_cap(struct ice_pf *pf)
936 {
937 	/* defer unplug to service task to avoid RTNL lock and
938 	 * clear PLUG bit so that pending plugs don't interfere
939 	 */
940 	clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
941 	set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags);
942 	clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
943 }
944 #endif /* _ICE_H_ */
945