1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2020 Linaro Ltd 4 */ 5 6 #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H 7 #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H 8 9 #include <dt-bindings/interconnect/qcom,icc.h> 10 11 #define RPM_BUS_MASTER_REQ 0x73616d62 12 #define RPM_BUS_SLAVE_REQ 0x766c7362 13 14 #define to_qcom_provider(_provider) \ 15 container_of(_provider, struct qcom_icc_provider, provider) 16 17 enum qcom_icc_type { 18 QCOM_ICC_NOC, 19 QCOM_ICC_BIMC, 20 QCOM_ICC_QNOC, 21 }; 22 23 /** 24 * struct qcom_icc_provider - Qualcomm specific interconnect provider 25 * @provider: generic interconnect provider 26 * @bus_clks: the clk_bulk_data table of bus clocks 27 * @num_clks: the total number of clk_bulk_data entries 28 * @type: the ICC provider type 29 * @qos_offset: offset to QoS registers 30 * @regmap: regmap for QoS registers read/write access 31 * @bus_clk_rate: bus clock rate in Hz 32 */ 33 struct qcom_icc_provider { 34 struct icc_provider provider; 35 int num_clks; 36 enum qcom_icc_type type; 37 struct regmap *regmap; 38 unsigned int qos_offset; 39 u64 *bus_clk_rate; 40 struct clk_bulk_data bus_clks[]; 41 }; 42 43 /** 44 * struct qcom_icc_qos - Qualcomm specific interconnect QoS parameters 45 * @areq_prio: node requests priority 46 * @prio_level: priority level for bus communication 47 * @limit_commands: activate/deactivate limiter mode during runtime 48 * @ap_owned: indicates if the node is owned by the AP or by the RPM 49 * @qos_mode: default qos mode for this node 50 * @qos_port: qos port number for finding qos registers of this node 51 * @urg_fwd_en: enable urgent forwarding 52 */ 53 struct qcom_icc_qos { 54 u32 areq_prio; 55 u32 prio_level; 56 bool limit_commands; 57 bool ap_owned; 58 int qos_mode; 59 int qos_port; 60 bool urg_fwd_en; 61 }; 62 63 /** 64 * struct qcom_icc_node - Qualcomm specific interconnect nodes 65 * @name: the node name used in debugfs 66 * @id: a unique node identifier 67 * @links: an array of nodes where we can go next while traversing 68 * @num_links: the total number of @links 69 * @buswidth: width of the interconnect between a node and the bus (bytes) 70 * @sum_avg: current sum aggregate value of all avg bw requests 71 * @max_peak: current max aggregate value of all peak bw requests 72 * @mas_rpm_id: RPM id for devices that are bus masters 73 * @slv_rpm_id: RPM id for devices that are bus slaves 74 * @qos: NoC QoS setting parameters 75 */ 76 struct qcom_icc_node { 77 unsigned char *name; 78 u16 id; 79 const u16 *links; 80 u16 num_links; 81 u16 buswidth; 82 u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; 83 u64 max_peak[QCOM_ICC_NUM_BUCKETS]; 84 int mas_rpm_id; 85 int slv_rpm_id; 86 struct qcom_icc_qos qos; 87 }; 88 89 struct qcom_icc_desc { 90 struct qcom_icc_node * const *nodes; 91 size_t num_nodes; 92 const char * const *clocks; 93 size_t num_clocks; 94 enum qcom_icc_type type; 95 const struct regmap_config *regmap_cfg; 96 unsigned int qos_offset; 97 }; 98 99 /* Valid for both NoC and BIMC */ 100 #define NOC_QOS_MODE_INVALID -1 101 #define NOC_QOS_MODE_FIXED 0x0 102 #define NOC_QOS_MODE_BYPASS 0x2 103 104 int qnoc_probe(struct platform_device *pdev); 105 int qnoc_remove(struct platform_device *pdev); 106 107 #endif 108