1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2019, Intel Corporation. */ 3 4 #ifndef _ICE_FLEX_TYPE_H_ 5 #define _ICE_FLEX_TYPE_H_ 6 7 #define ICE_FV_OFFSET_INVAL 0x1FF 8 9 /* Extraction Sequence (Field Vector) Table */ 10 struct ice_fv_word { 11 u8 prot_id; 12 u16 off; /* Offset within the protocol header */ 13 u8 resvrd; 14 } __packed; 15 16 #define ICE_MAX_NUM_PROFILES 256 17 18 #define ICE_MAX_FV_WORDS 48 19 struct ice_fv { 20 struct ice_fv_word ew[ICE_MAX_FV_WORDS]; 21 }; 22 23 /* Package and segment headers and tables */ 24 struct ice_pkg_hdr { 25 struct ice_pkg_ver pkg_format_ver; 26 __le32 seg_count; 27 __le32 seg_offset[]; 28 }; 29 30 /* generic segment */ 31 struct ice_generic_seg_hdr { 32 #define SEGMENT_TYPE_METADATA 0x00000001 33 #define SEGMENT_TYPE_ICE 0x00000010 34 __le32 seg_type; 35 struct ice_pkg_ver seg_format_ver; 36 __le32 seg_size; 37 char seg_id[ICE_PKG_NAME_SIZE]; 38 }; 39 40 /* ice specific segment */ 41 42 union ice_device_id { 43 struct { 44 __le16 device_id; 45 __le16 vendor_id; 46 } dev_vend_id; 47 __le32 id; 48 }; 49 50 struct ice_device_id_entry { 51 union ice_device_id device; 52 union ice_device_id sub_device; 53 }; 54 55 struct ice_seg { 56 struct ice_generic_seg_hdr hdr; 57 __le32 device_table_count; 58 struct ice_device_id_entry device_table[]; 59 }; 60 61 struct ice_nvm_table { 62 __le32 table_count; 63 __le32 vers[]; 64 }; 65 66 struct ice_buf { 67 #define ICE_PKG_BUF_SIZE 4096 68 u8 buf[ICE_PKG_BUF_SIZE]; 69 }; 70 71 struct ice_buf_table { 72 __le32 buf_count; 73 struct ice_buf buf_array[]; 74 }; 75 76 /* global metadata specific segment */ 77 struct ice_global_metadata_seg { 78 struct ice_generic_seg_hdr hdr; 79 struct ice_pkg_ver pkg_ver; 80 __le32 rsvd; 81 char pkg_name[ICE_PKG_NAME_SIZE]; 82 }; 83 84 #define ICE_MIN_S_OFF 12 85 #define ICE_MAX_S_OFF 4095 86 #define ICE_MIN_S_SZ 1 87 #define ICE_MAX_S_SZ 4084 88 89 /* section information */ 90 struct ice_section_entry { 91 __le32 type; 92 __le16 offset; 93 __le16 size; 94 }; 95 96 #define ICE_MIN_S_COUNT 1 97 #define ICE_MAX_S_COUNT 511 98 #define ICE_MIN_S_DATA_END 12 99 #define ICE_MAX_S_DATA_END 4096 100 101 #define ICE_METADATA_BUF 0x80000000 102 103 struct ice_buf_hdr { 104 __le16 section_count; 105 __le16 data_end; 106 struct ice_section_entry section_entry[]; 107 }; 108 109 #define ICE_MAX_ENTRIES_IN_BUF(hd_sz, ent_sz) ((ICE_PKG_BUF_SIZE - \ 110 struct_size((struct ice_buf_hdr *)0, section_entry, 1) - (hd_sz)) /\ 111 (ent_sz)) 112 113 /* ice package section IDs */ 114 #define ICE_SID_METADATA 1 115 #define ICE_SID_XLT0_SW 10 116 #define ICE_SID_XLT_KEY_BUILDER_SW 11 117 #define ICE_SID_XLT1_SW 12 118 #define ICE_SID_XLT2_SW 13 119 #define ICE_SID_PROFID_TCAM_SW 14 120 #define ICE_SID_PROFID_REDIR_SW 15 121 #define ICE_SID_FLD_VEC_SW 16 122 #define ICE_SID_CDID_KEY_BUILDER_SW 17 123 124 struct ice_meta_sect { 125 struct ice_pkg_ver ver; 126 #define ICE_META_SECT_NAME_SIZE 28 127 char name[ICE_META_SECT_NAME_SIZE]; 128 __le32 track_id; 129 }; 130 131 #define ICE_SID_CDID_REDIR_SW 18 132 133 #define ICE_SID_XLT0_ACL 20 134 #define ICE_SID_XLT_KEY_BUILDER_ACL 21 135 #define ICE_SID_XLT1_ACL 22 136 #define ICE_SID_XLT2_ACL 23 137 #define ICE_SID_PROFID_TCAM_ACL 24 138 #define ICE_SID_PROFID_REDIR_ACL 25 139 #define ICE_SID_FLD_VEC_ACL 26 140 #define ICE_SID_CDID_KEY_BUILDER_ACL 27 141 #define ICE_SID_CDID_REDIR_ACL 28 142 143 #define ICE_SID_XLT0_FD 30 144 #define ICE_SID_XLT_KEY_BUILDER_FD 31 145 #define ICE_SID_XLT1_FD 32 146 #define ICE_SID_XLT2_FD 33 147 #define ICE_SID_PROFID_TCAM_FD 34 148 #define ICE_SID_PROFID_REDIR_FD 35 149 #define ICE_SID_FLD_VEC_FD 36 150 #define ICE_SID_CDID_KEY_BUILDER_FD 37 151 #define ICE_SID_CDID_REDIR_FD 38 152 153 #define ICE_SID_XLT0_RSS 40 154 #define ICE_SID_XLT_KEY_BUILDER_RSS 41 155 #define ICE_SID_XLT1_RSS 42 156 #define ICE_SID_XLT2_RSS 43 157 #define ICE_SID_PROFID_TCAM_RSS 44 158 #define ICE_SID_PROFID_REDIR_RSS 45 159 #define ICE_SID_FLD_VEC_RSS 46 160 #define ICE_SID_CDID_KEY_BUILDER_RSS 47 161 #define ICE_SID_CDID_REDIR_RSS 48 162 163 #define ICE_SID_RXPARSER_MARKER_PTYPE 55 164 #define ICE_SID_RXPARSER_BOOST_TCAM 56 165 #define ICE_SID_RXPARSER_METADATA_INIT 58 166 #define ICE_SID_TXPARSER_BOOST_TCAM 66 167 168 #define ICE_SID_XLT0_PE 80 169 #define ICE_SID_XLT_KEY_BUILDER_PE 81 170 #define ICE_SID_XLT1_PE 82 171 #define ICE_SID_XLT2_PE 83 172 #define ICE_SID_PROFID_TCAM_PE 84 173 #define ICE_SID_PROFID_REDIR_PE 85 174 #define ICE_SID_FLD_VEC_PE 86 175 #define ICE_SID_CDID_KEY_BUILDER_PE 87 176 #define ICE_SID_CDID_REDIR_PE 88 177 178 /* Label Metadata section IDs */ 179 #define ICE_SID_LBL_FIRST 0x80000010 180 #define ICE_SID_LBL_RXPARSER_TMEM 0x80000018 181 /* The following define MUST be updated to reflect the last label section ID */ 182 #define ICE_SID_LBL_LAST 0x80000038 183 184 enum ice_block { 185 ICE_BLK_SW = 0, 186 ICE_BLK_ACL, 187 ICE_BLK_FD, 188 ICE_BLK_RSS, 189 ICE_BLK_PE, 190 ICE_BLK_COUNT 191 }; 192 193 enum ice_sect { 194 ICE_XLT0 = 0, 195 ICE_XLT_KB, 196 ICE_XLT1, 197 ICE_XLT2, 198 ICE_PROF_TCAM, 199 ICE_PROF_REDIR, 200 ICE_VEC_TBL, 201 ICE_CDID_KB, 202 ICE_CDID_REDIR, 203 ICE_SECT_COUNT 204 }; 205 206 /* Packet Type (PTYPE) values */ 207 #define ICE_PTYPE_MAC_PAY 1 208 #define ICE_PTYPE_IPV4_PAY 23 209 #define ICE_PTYPE_IPV4_UDP_PAY 24 210 #define ICE_PTYPE_IPV4_TCP_PAY 26 211 #define ICE_PTYPE_IPV4_SCTP_PAY 27 212 #define ICE_PTYPE_IPV6_PAY 89 213 #define ICE_PTYPE_IPV6_UDP_PAY 90 214 #define ICE_PTYPE_IPV6_TCP_PAY 92 215 #define ICE_PTYPE_IPV6_SCTP_PAY 93 216 #define ICE_MAC_IPV4_ESP 160 217 #define ICE_MAC_IPV6_ESP 161 218 #define ICE_MAC_IPV4_AH 162 219 #define ICE_MAC_IPV6_AH 163 220 #define ICE_MAC_IPV4_NAT_T_ESP 164 221 #define ICE_MAC_IPV6_NAT_T_ESP 165 222 #define ICE_MAC_IPV4_GTPU 329 223 #define ICE_MAC_IPV6_GTPU 330 224 #define ICE_MAC_IPV4_GTPU_IPV4_FRAG 331 225 #define ICE_MAC_IPV4_GTPU_IPV4_PAY 332 226 #define ICE_MAC_IPV4_GTPU_IPV4_UDP_PAY 333 227 #define ICE_MAC_IPV4_GTPU_IPV4_TCP 334 228 #define ICE_MAC_IPV4_GTPU_IPV4_ICMP 335 229 #define ICE_MAC_IPV6_GTPU_IPV4_FRAG 336 230 #define ICE_MAC_IPV6_GTPU_IPV4_PAY 337 231 #define ICE_MAC_IPV6_GTPU_IPV4_UDP_PAY 338 232 #define ICE_MAC_IPV6_GTPU_IPV4_TCP 339 233 #define ICE_MAC_IPV6_GTPU_IPV4_ICMP 340 234 #define ICE_MAC_IPV4_GTPU_IPV6_FRAG 341 235 #define ICE_MAC_IPV4_GTPU_IPV6_PAY 342 236 #define ICE_MAC_IPV4_GTPU_IPV6_UDP_PAY 343 237 #define ICE_MAC_IPV4_GTPU_IPV6_TCP 344 238 #define ICE_MAC_IPV4_GTPU_IPV6_ICMPV6 345 239 #define ICE_MAC_IPV6_GTPU_IPV6_FRAG 346 240 #define ICE_MAC_IPV6_GTPU_IPV6_PAY 347 241 #define ICE_MAC_IPV6_GTPU_IPV6_UDP_PAY 348 242 #define ICE_MAC_IPV6_GTPU_IPV6_TCP 349 243 #define ICE_MAC_IPV6_GTPU_IPV6_ICMPV6 350 244 #define ICE_MAC_IPV4_PFCP_SESSION 352 245 #define ICE_MAC_IPV6_PFCP_SESSION 354 246 #define ICE_MAC_IPV4_L2TPV3 360 247 #define ICE_MAC_IPV6_L2TPV3 361 248 249 /* Attributes that can modify PTYPE definitions. 250 * 251 * These values will represent special attributes for PTYPEs, which will 252 * resolve into metadata packet flags definitions that can be used in the TCAM 253 * for identifying a PTYPE with specific characteristics. 254 */ 255 enum ice_ptype_attrib_type { 256 /* GTP PTYPEs */ 257 ICE_PTYPE_ATTR_GTP_PDU_EH, 258 ICE_PTYPE_ATTR_GTP_SESSION, 259 ICE_PTYPE_ATTR_GTP_DOWNLINK, 260 ICE_PTYPE_ATTR_GTP_UPLINK, 261 }; 262 263 struct ice_ptype_attrib_info { 264 u16 flags; 265 u16 mask; 266 }; 267 268 /* TCAM flag definitions */ 269 #define ICE_GTP_PDU BIT(14) 270 #define ICE_GTP_PDU_LINK BIT(13) 271 272 /* GTP attributes */ 273 #define ICE_GTP_PDU_FLAG_MASK (ICE_GTP_PDU) 274 #define ICE_GTP_PDU_EH ICE_GTP_PDU 275 276 #define ICE_GTP_FLAGS_MASK (ICE_GTP_PDU | ICE_GTP_PDU_LINK) 277 #define ICE_GTP_SESSION 0 278 #define ICE_GTP_DOWNLINK ICE_GTP_PDU 279 #define ICE_GTP_UPLINK (ICE_GTP_PDU | ICE_GTP_PDU_LINK) 280 281 struct ice_ptype_attributes { 282 u16 ptype; 283 enum ice_ptype_attrib_type attrib; 284 }; 285 286 /* package labels */ 287 struct ice_label { 288 __le16 value; 289 #define ICE_PKG_LABEL_SIZE 64 290 char name[ICE_PKG_LABEL_SIZE]; 291 }; 292 293 struct ice_label_section { 294 __le16 count; 295 struct ice_label label[]; 296 }; 297 298 #define ICE_MAX_LABELS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \ 299 struct_size((struct ice_label_section *)0, label, 1) - \ 300 sizeof(struct ice_label), sizeof(struct ice_label)) 301 302 struct ice_sw_fv_section { 303 __le16 count; 304 __le16 base_offset; 305 struct ice_fv fv[]; 306 }; 307 308 struct ice_sw_fv_list_entry { 309 struct list_head list_entry; 310 u32 profile_id; 311 struct ice_fv *fv_ptr; 312 }; 313 314 /* The BOOST TCAM stores the match packet header in reverse order, meaning 315 * the fields are reversed; in addition, this means that the normally big endian 316 * fields of the packet are now little endian. 317 */ 318 struct ice_boost_key_value { 319 #define ICE_BOOST_REMAINING_HV_KEY 15 320 u8 remaining_hv_key[ICE_BOOST_REMAINING_HV_KEY]; 321 __le16 hv_dst_port_key; 322 __le16 hv_src_port_key; 323 u8 tcam_search_key; 324 } __packed; 325 326 struct ice_boost_key { 327 struct ice_boost_key_value key; 328 struct ice_boost_key_value key2; 329 }; 330 331 /* package Boost TCAM entry */ 332 struct ice_boost_tcam_entry { 333 __le16 addr; 334 __le16 reserved; 335 /* break up the 40 bytes of key into different fields */ 336 struct ice_boost_key key; 337 u8 boost_hit_index_group; 338 /* The following contains bitfields which are not on byte boundaries. 339 * These fields are currently unused by driver software. 340 */ 341 #define ICE_BOOST_BIT_FIELDS 43 342 u8 bit_fields[ICE_BOOST_BIT_FIELDS]; 343 }; 344 345 struct ice_boost_tcam_section { 346 __le16 count; 347 __le16 reserved; 348 struct ice_boost_tcam_entry tcam[]; 349 }; 350 351 #define ICE_MAX_BST_TCAMS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \ 352 struct_size((struct ice_boost_tcam_section *)0, tcam, 1) - \ 353 sizeof(struct ice_boost_tcam_entry), \ 354 sizeof(struct ice_boost_tcam_entry)) 355 356 /* package Marker Ptype TCAM entry */ 357 struct ice_marker_ptype_tcam_entry { 358 #define ICE_MARKER_PTYPE_TCAM_ADDR_MAX 1024 359 __le16 addr; 360 __le16 ptype; 361 u8 keys[20]; 362 }; 363 364 struct ice_marker_ptype_tcam_section { 365 __le16 count; 366 __le16 reserved; 367 struct ice_marker_ptype_tcam_entry tcam[]; 368 }; 369 370 #define ICE_MAX_MARKER_PTYPE_TCAMS_IN_BUF \ 371 ICE_MAX_ENTRIES_IN_BUF(struct_size((struct ice_marker_ptype_tcam_section *)0, tcam, 1) - \ 372 sizeof(struct ice_marker_ptype_tcam_entry), \ 373 sizeof(struct ice_marker_ptype_tcam_entry)) 374 375 struct ice_xlt1_section { 376 __le16 count; 377 __le16 offset; 378 u8 value[]; 379 }; 380 381 struct ice_xlt2_section { 382 __le16 count; 383 __le16 offset; 384 __le16 value[]; 385 }; 386 387 struct ice_prof_redir_section { 388 __le16 count; 389 __le16 offset; 390 u8 redir_value[]; 391 }; 392 393 /* package buffer building */ 394 395 struct ice_buf_build { 396 struct ice_buf buf; 397 u16 reserved_section_table_entries; 398 }; 399 400 struct ice_pkg_enum { 401 struct ice_buf_table *buf_table; 402 u32 buf_idx; 403 404 u32 type; 405 struct ice_buf_hdr *buf; 406 u32 sect_idx; 407 void *sect; 408 u32 sect_type; 409 410 u32 entry_idx; 411 void *(*handler)(u32 sect_type, void *section, u32 index, u32 *offset); 412 }; 413 414 /* Tunnel enabling */ 415 416 enum ice_tunnel_type { 417 TNL_VXLAN = 0, 418 TNL_GENEVE, 419 TNL_GRETAP, 420 TNL_GTPC, 421 TNL_GTPU, 422 __TNL_TYPE_CNT, 423 TNL_LAST = 0xFF, 424 TNL_ALL = 0xFF, 425 }; 426 427 struct ice_tunnel_type_scan { 428 enum ice_tunnel_type type; 429 const char *label_prefix; 430 }; 431 432 struct ice_tunnel_entry { 433 enum ice_tunnel_type type; 434 u16 boost_addr; 435 u16 port; 436 struct ice_boost_tcam_entry *boost_entry; 437 u8 valid; 438 }; 439 440 #define ICE_TUNNEL_MAX_ENTRIES 16 441 442 struct ice_tunnel_table { 443 struct ice_tunnel_entry tbl[ICE_TUNNEL_MAX_ENTRIES]; 444 u16 count; 445 u16 valid_count[__TNL_TYPE_CNT]; 446 }; 447 448 struct ice_dvm_entry { 449 u16 boost_addr; 450 u16 enable; 451 struct ice_boost_tcam_entry *boost_entry; 452 }; 453 454 #define ICE_DVM_MAX_ENTRIES 48 455 456 struct ice_dvm_table { 457 struct ice_dvm_entry tbl[ICE_DVM_MAX_ENTRIES]; 458 u16 count; 459 }; 460 461 struct ice_pkg_es { 462 __le16 count; 463 __le16 offset; 464 struct ice_fv_word es[]; 465 }; 466 467 struct ice_es { 468 u32 sid; 469 u16 count; 470 u16 fvw; 471 u16 *ref_count; 472 u32 *mask_ena; 473 struct list_head prof_map; 474 struct ice_fv_word *t; 475 struct mutex prof_map_lock; /* protect access to profiles list */ 476 u8 *written; 477 u8 reverse; /* set to true to reverse FV order */ 478 }; 479 480 /* PTYPE Group management */ 481 482 /* Note: XLT1 table takes 13-bit as input, and results in an 8-bit packet type 483 * group (PTG) ID as output. 484 * 485 * Note: PTG 0 is the default packet type group and it is assumed that all PTYPE 486 * are a part of this group until moved to a new PTG. 487 */ 488 #define ICE_DEFAULT_PTG 0 489 490 struct ice_ptg_entry { 491 struct ice_ptg_ptype *first_ptype; 492 u8 in_use; 493 }; 494 495 struct ice_ptg_ptype { 496 struct ice_ptg_ptype *next_ptype; 497 u8 ptg; 498 }; 499 500 #define ICE_MAX_TCAM_PER_PROFILE 32 501 #define ICE_MAX_PTG_PER_PROFILE 32 502 503 struct ice_prof_map { 504 struct list_head list; 505 u64 profile_cookie; 506 u64 context; 507 u8 prof_id; 508 u8 ptg_cnt; 509 u8 ptg[ICE_MAX_PTG_PER_PROFILE]; 510 struct ice_ptype_attrib_info attr[ICE_MAX_PTG_PER_PROFILE]; 511 }; 512 513 #define ICE_INVALID_TCAM 0xFFFF 514 515 struct ice_tcam_inf { 516 u16 tcam_idx; 517 struct ice_ptype_attrib_info attr; 518 u8 ptg; 519 u8 prof_id; 520 u8 in_use; 521 }; 522 523 struct ice_vsig_prof { 524 struct list_head list; 525 u64 profile_cookie; 526 u8 prof_id; 527 u8 tcam_count; 528 struct ice_tcam_inf tcam[ICE_MAX_TCAM_PER_PROFILE]; 529 }; 530 531 struct ice_vsig_entry { 532 struct list_head prop_lst; 533 struct ice_vsig_vsi *first_vsi; 534 u8 in_use; 535 }; 536 537 struct ice_vsig_vsi { 538 struct ice_vsig_vsi *next_vsi; 539 u32 prop_mask; 540 u16 changed; 541 u16 vsig; 542 }; 543 544 #define ICE_XLT1_CNT 1024 545 #define ICE_MAX_PTGS 256 546 547 /* XLT1 Table */ 548 struct ice_xlt1 { 549 struct ice_ptg_entry *ptg_tbl; 550 struct ice_ptg_ptype *ptypes; 551 u8 *t; 552 u32 sid; 553 u16 count; 554 }; 555 556 #define ICE_XLT2_CNT 768 557 #define ICE_MAX_VSIGS 768 558 559 /* VSIG bit layout: 560 * [0:12]: incremental VSIG index 1 to ICE_MAX_VSIGS 561 * [13:15]: PF number of device 562 */ 563 #define ICE_VSIG_IDX_M (0x1FFF) 564 #define ICE_PF_NUM_S 13 565 #define ICE_PF_NUM_M (0x07 << ICE_PF_NUM_S) 566 #define ICE_VSIG_VALUE(vsig, pf_id) \ 567 ((u16)((((u16)(vsig)) & ICE_VSIG_IDX_M) | \ 568 (((u16)(pf_id) << ICE_PF_NUM_S) & ICE_PF_NUM_M))) 569 #define ICE_DEFAULT_VSIG 0 570 571 /* XLT2 Table */ 572 struct ice_xlt2 { 573 struct ice_vsig_entry *vsig_tbl; 574 struct ice_vsig_vsi *vsis; 575 u16 *t; 576 u32 sid; 577 u16 count; 578 }; 579 580 /* Profile ID Management */ 581 struct ice_prof_id_key { 582 __le16 flags; 583 u8 xlt1; 584 __le16 xlt2_cdid; 585 } __packed; 586 587 /* Keys are made up of two values, each one-half the size of the key. 588 * For TCAM, the entire key is 80 bits wide (or 2, 40-bit wide values) 589 */ 590 #define ICE_TCAM_KEY_VAL_SZ 5 591 #define ICE_TCAM_KEY_SZ (2 * ICE_TCAM_KEY_VAL_SZ) 592 593 struct ice_prof_tcam_entry { 594 __le16 addr; 595 u8 key[ICE_TCAM_KEY_SZ]; 596 u8 prof_id; 597 } __packed; 598 599 struct ice_prof_id_section { 600 __le16 count; 601 struct ice_prof_tcam_entry entry[]; 602 }; 603 604 struct ice_prof_tcam { 605 u32 sid; 606 u16 count; 607 u16 max_prof_id; 608 struct ice_prof_tcam_entry *t; 609 u8 cdid_bits; /* # CDID bits to use in key, 0, 2, 4, or 8 */ 610 }; 611 612 struct ice_prof_redir { 613 u8 *t; 614 u32 sid; 615 u16 count; 616 }; 617 618 struct ice_mask { 619 u16 mask; /* 16-bit mask */ 620 u16 idx; /* index */ 621 u16 ref; /* reference count */ 622 u8 in_use; /* non-zero if used */ 623 }; 624 625 struct ice_masks { 626 struct mutex lock; /* lock to protect this structure */ 627 u16 first; /* first mask owned by the PF */ 628 u16 count; /* number of masks owned by the PF */ 629 #define ICE_PROF_MASK_COUNT 32 630 struct ice_mask masks[ICE_PROF_MASK_COUNT]; 631 }; 632 633 /* Tables per block */ 634 struct ice_blk_info { 635 struct ice_xlt1 xlt1; 636 struct ice_xlt2 xlt2; 637 struct ice_prof_tcam prof; 638 struct ice_prof_redir prof_redir; 639 struct ice_es es; 640 struct ice_masks masks; 641 u8 overwrite; /* set to true to allow overwrite of table entries */ 642 u8 is_list_init; 643 }; 644 645 enum ice_chg_type { 646 ICE_TCAM_NONE = 0, 647 ICE_PTG_ES_ADD, 648 ICE_TCAM_ADD, 649 ICE_VSIG_ADD, 650 ICE_VSIG_REM, 651 ICE_VSI_MOVE, 652 }; 653 654 struct ice_chs_chg { 655 struct list_head list_entry; 656 enum ice_chg_type type; 657 658 u8 add_ptg; 659 u8 add_vsig; 660 u8 add_tcam_idx; 661 u8 add_prof; 662 u16 ptype; 663 u8 ptg; 664 u8 prof_id; 665 u16 vsi; 666 u16 vsig; 667 u16 orig_vsig; 668 u16 tcam_idx; 669 struct ice_ptype_attrib_info attr; 670 }; 671 672 #define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT 673 674 enum ice_prof_type { 675 ICE_PROF_NON_TUN = 0x1, 676 ICE_PROF_TUN_UDP = 0x2, 677 ICE_PROF_TUN_GRE = 0x4, 678 ICE_PROF_TUN_GTPU = 0x8, 679 ICE_PROF_TUN_GTPC = 0x10, 680 ICE_PROF_TUN_ALL = 0x1E, 681 ICE_PROF_ALL = 0xFF, 682 }; 683 684 /* Number of bits/bytes contained in meta init entry. Note, this should be a 685 * multiple of 32 bits. 686 */ 687 #define ICE_META_INIT_BITS 192 688 #define ICE_META_INIT_DW_CNT (ICE_META_INIT_BITS / (sizeof(__le32) * \ 689 BITS_PER_BYTE)) 690 691 /* The meta init Flag field starts at this bit */ 692 #define ICE_META_FLAGS_ST 123 693 694 /* The entry and bit to check for Double VLAN Mode (DVM) support */ 695 #define ICE_META_VLAN_MODE_ENTRY 0 696 #define ICE_META_FLAG_VLAN_MODE 60 697 #define ICE_META_VLAN_MODE_BIT (ICE_META_FLAGS_ST + \ 698 ICE_META_FLAG_VLAN_MODE) 699 700 struct ice_meta_init_entry { 701 __le32 bm[ICE_META_INIT_DW_CNT]; 702 }; 703 704 struct ice_meta_init_section { 705 __le16 count; 706 __le16 offset; 707 struct ice_meta_init_entry entry; 708 }; 709 #endif /* _ICE_FLEX_TYPE_H_ */ 710