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1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc. */
3 
4 #include <linux/firmware.h>
5 #include "mt76_connac2_mac.h"
6 #include "mt76_connac_mcu.h"
7 
mt76_connac_mcu_start_firmware(struct mt76_dev * dev,u32 addr,u32 option)8 int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option)
9 {
10 	struct {
11 		__le32 option;
12 		__le32 addr;
13 	} req = {
14 		.option = cpu_to_le32(option),
15 		.addr = cpu_to_le32(addr),
16 	};
17 
18 	return mt76_mcu_send_msg(dev, MCU_CMD(FW_START_REQ), &req,
19 				 sizeof(req), true);
20 }
21 EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_firmware);
22 
mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev * dev,bool get)23 int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get)
24 {
25 	u32 op = get ? PATCH_SEM_GET : PATCH_SEM_RELEASE;
26 	struct {
27 		__le32 op;
28 	} req = {
29 		.op = cpu_to_le32(op),
30 	};
31 
32 	return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_SEM_CONTROL),
33 				 &req, sizeof(req), true);
34 }
35 EXPORT_SYMBOL_GPL(mt76_connac_mcu_patch_sem_ctrl);
36 
mt76_connac_mcu_start_patch(struct mt76_dev * dev)37 int mt76_connac_mcu_start_patch(struct mt76_dev *dev)
38 {
39 	struct {
40 		u8 check_crc;
41 		u8 reserved[3];
42 	} req = {
43 		.check_crc = 0,
44 	};
45 
46 	return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_FINISH_REQ),
47 				 &req, sizeof(req), true);
48 }
49 EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_patch);
50 
51 #define MCU_PATCH_ADDRESS	0x200000
52 
mt76_connac_mcu_init_download(struct mt76_dev * dev,u32 addr,u32 len,u32 mode)53 int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len,
54 				  u32 mode)
55 {
56 	struct {
57 		__le32 addr;
58 		__le32 len;
59 		__le32 mode;
60 	} req = {
61 		.addr = cpu_to_le32(addr),
62 		.len = cpu_to_le32(len),
63 		.mode = cpu_to_le32(mode),
64 	};
65 	int cmd;
66 
67 	if ((!is_connac_v1(dev) && addr == MCU_PATCH_ADDRESS) ||
68 	    (is_mt7921(dev) && addr == 0x900000))
69 		cmd = MCU_CMD(PATCH_START_REQ);
70 	else
71 		cmd = MCU_CMD(TARGET_ADDRESS_LEN_REQ);
72 
73 	return mt76_mcu_send_msg(dev, cmd, &req, sizeof(req), true);
74 }
75 EXPORT_SYMBOL_GPL(mt76_connac_mcu_init_download);
76 
mt76_connac_mcu_set_channel_domain(struct mt76_phy * phy)77 int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy)
78 {
79 	int len, i, n_max_channels, n_2ch = 0, n_5ch = 0, n_6ch = 0;
80 	struct mt76_connac_mcu_channel_domain {
81 		u8 alpha2[4]; /* regulatory_request.alpha2 */
82 		u8 bw_2g; /* BW_20_40M		0
83 			   * BW_20M		1
84 			   * BW_20_40_80M	2
85 			   * BW_20_40_80_160M	3
86 			   * BW_20_40_80_8080M	4
87 			   */
88 		u8 bw_5g;
89 		u8 bw_6g;
90 		u8 pad;
91 		u8 n_2ch;
92 		u8 n_5ch;
93 		u8 n_6ch;
94 		u8 pad2;
95 	} __packed hdr = {
96 		.bw_2g = 0,
97 		.bw_5g = 3, /* BW_20_40_80_160M */
98 		.bw_6g = 3,
99 	};
100 	struct mt76_connac_mcu_chan {
101 		__le16 hw_value;
102 		__le16 pad;
103 		__le32 flags;
104 	} __packed channel;
105 	struct mt76_dev *dev = phy->dev;
106 	struct ieee80211_channel *chan;
107 	struct sk_buff *skb;
108 
109 	n_max_channels = phy->sband_2g.sband.n_channels +
110 			 phy->sband_5g.sband.n_channels +
111 			 phy->sband_6g.sband.n_channels;
112 	len = sizeof(hdr) + n_max_channels * sizeof(channel);
113 
114 	skb = mt76_mcu_msg_alloc(dev, NULL, len);
115 	if (!skb)
116 		return -ENOMEM;
117 
118 	skb_reserve(skb, sizeof(hdr));
119 
120 	for (i = 0; i < phy->sband_2g.sband.n_channels; i++) {
121 		chan = &phy->sband_2g.sband.channels[i];
122 		if (chan->flags & IEEE80211_CHAN_DISABLED)
123 			continue;
124 
125 		channel.hw_value = cpu_to_le16(chan->hw_value);
126 		channel.flags = cpu_to_le32(chan->flags);
127 		channel.pad = 0;
128 
129 		skb_put_data(skb, &channel, sizeof(channel));
130 		n_2ch++;
131 	}
132 	for (i = 0; i < phy->sband_5g.sband.n_channels; i++) {
133 		chan = &phy->sband_5g.sband.channels[i];
134 		if (chan->flags & IEEE80211_CHAN_DISABLED)
135 			continue;
136 
137 		channel.hw_value = cpu_to_le16(chan->hw_value);
138 		channel.flags = cpu_to_le32(chan->flags);
139 		channel.pad = 0;
140 
141 		skb_put_data(skb, &channel, sizeof(channel));
142 		n_5ch++;
143 	}
144 	for (i = 0; i < phy->sband_6g.sband.n_channels; i++) {
145 		chan = &phy->sband_6g.sband.channels[i];
146 		if (chan->flags & IEEE80211_CHAN_DISABLED)
147 			continue;
148 
149 		channel.hw_value = cpu_to_le16(chan->hw_value);
150 		channel.flags = cpu_to_le32(chan->flags);
151 		channel.pad = 0;
152 
153 		skb_put_data(skb, &channel, sizeof(channel));
154 		n_6ch++;
155 	}
156 
157 	BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(hdr.alpha2));
158 	memcpy(hdr.alpha2, dev->alpha2, sizeof(dev->alpha2));
159 	hdr.n_2ch = n_2ch;
160 	hdr.n_5ch = n_5ch;
161 	hdr.n_6ch = n_6ch;
162 
163 	memcpy(__skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr));
164 
165 	return mt76_mcu_skb_send_msg(dev, skb, MCU_CE_CMD(SET_CHAN_DOMAIN),
166 				     false);
167 }
168 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_channel_domain);
169 
mt76_connac_mcu_set_mac_enable(struct mt76_dev * dev,int band,bool enable,bool hdr_trans)170 int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable,
171 				   bool hdr_trans)
172 {
173 	struct {
174 		u8 enable;
175 		u8 band;
176 		u8 rsv[2];
177 	} __packed req_mac = {
178 		.enable = enable,
179 		.band = band,
180 	};
181 
182 	return mt76_mcu_send_msg(dev, MCU_EXT_CMD(MAC_INIT_CTRL), &req_mac,
183 				 sizeof(req_mac), true);
184 }
185 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_mac_enable);
186 
mt76_connac_mcu_set_vif_ps(struct mt76_dev * dev,struct ieee80211_vif * vif)187 int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif)
188 {
189 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
190 	struct {
191 		u8 bss_idx;
192 		u8 ps_state; /* 0: device awake
193 			      * 1: static power save
194 			      * 2: dynamic power saving
195 			      */
196 	} req = {
197 		.bss_idx = mvif->idx,
198 		.ps_state = vif->cfg.ps ? 2 : 0,
199 	};
200 
201 	if (vif->type != NL80211_IFTYPE_STATION)
202 		return -EOPNOTSUPP;
203 
204 	return mt76_mcu_send_msg(dev, MCU_CE_CMD(SET_PS_PROFILE),
205 				 &req, sizeof(req), false);
206 }
207 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_vif_ps);
208 
mt76_connac_mcu_set_rts_thresh(struct mt76_dev * dev,u32 val,u8 band)209 int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band)
210 {
211 	struct {
212 		u8 prot_idx;
213 		u8 band;
214 		u8 rsv[2];
215 		__le32 len_thresh;
216 		__le32 pkt_thresh;
217 	} __packed req = {
218 		.prot_idx = 1,
219 		.band = band,
220 		.len_thresh = cpu_to_le32(val),
221 		.pkt_thresh = cpu_to_le32(0x2),
222 	};
223 
224 	return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PROTECT_CTRL), &req,
225 				 sizeof(req), true);
226 }
227 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rts_thresh);
228 
mt76_connac_mcu_beacon_loss_iter(void * priv,u8 * mac,struct ieee80211_vif * vif)229 void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac,
230 				      struct ieee80211_vif *vif)
231 {
232 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
233 	struct mt76_connac_beacon_loss_event *event = priv;
234 
235 	if (mvif->idx != event->bss_idx)
236 		return;
237 
238 	if (!(vif->driver_flags & IEEE80211_VIF_BEACON_FILTER))
239 		return;
240 
241 	ieee80211_beacon_loss(vif);
242 }
243 EXPORT_SYMBOL_GPL(mt76_connac_mcu_beacon_loss_iter);
244 
245 struct tlv *
mt76_connac_mcu_add_nested_tlv(struct sk_buff * skb,int tag,int len,void * sta_ntlv,void * sta_wtbl)246 mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, int len,
247 			       void *sta_ntlv, void *sta_wtbl)
248 {
249 	struct sta_ntlv_hdr *ntlv_hdr = sta_ntlv;
250 	struct tlv *sta_hdr = sta_wtbl;
251 	struct tlv *ptlv, tlv = {
252 		.tag = cpu_to_le16(tag),
253 		.len = cpu_to_le16(len),
254 	};
255 	u16 ntlv;
256 
257 	ptlv = skb_put(skb, len);
258 	memcpy(ptlv, &tlv, sizeof(tlv));
259 
260 	ntlv = le16_to_cpu(ntlv_hdr->tlv_num);
261 	ntlv_hdr->tlv_num = cpu_to_le16(ntlv + 1);
262 
263 	if (sta_hdr) {
264 		len += le16_to_cpu(sta_hdr->len);
265 		sta_hdr->len = cpu_to_le16(len);
266 	}
267 
268 	return ptlv;
269 }
270 EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_nested_tlv);
271 
272 struct sk_buff *
__mt76_connac_mcu_alloc_sta_req(struct mt76_dev * dev,struct mt76_vif * mvif,struct mt76_wcid * wcid,int len)273 __mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif,
274 				struct mt76_wcid *wcid, int len)
275 {
276 	struct sta_req_hdr hdr = {
277 		.bss_idx = mvif->idx,
278 		.muar_idx = wcid ? mvif->omac_idx : 0,
279 		.is_tlv_append = 1,
280 	};
281 	struct sk_buff *skb;
282 
283 	mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo,
284 				     &hdr.wlan_idx_hi);
285 	skb = mt76_mcu_msg_alloc(dev, NULL, len);
286 	if (!skb)
287 		return ERR_PTR(-ENOMEM);
288 
289 	skb_put_data(skb, &hdr, sizeof(hdr));
290 
291 	return skb;
292 }
293 EXPORT_SYMBOL_GPL(__mt76_connac_mcu_alloc_sta_req);
294 
295 struct wtbl_req_hdr *
mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev * dev,struct mt76_wcid * wcid,int cmd,void * sta_wtbl,struct sk_buff ** skb)296 mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid,
297 			       int cmd, void *sta_wtbl, struct sk_buff **skb)
298 {
299 	struct tlv *sta_hdr = sta_wtbl;
300 	struct wtbl_req_hdr hdr = {
301 		.operation = cmd,
302 	};
303 	struct sk_buff *nskb = *skb;
304 
305 	mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo,
306 				     &hdr.wlan_idx_hi);
307 	if (!nskb) {
308 		nskb = mt76_mcu_msg_alloc(dev, NULL,
309 					  MT76_CONNAC_WTBL_UPDATE_MAX_SIZE);
310 		if (!nskb)
311 			return ERR_PTR(-ENOMEM);
312 
313 		*skb = nskb;
314 	}
315 
316 	if (sta_hdr)
317 		le16_add_cpu(&sta_hdr->len, sizeof(hdr));
318 
319 	return skb_put_data(nskb, &hdr, sizeof(hdr));
320 }
321 EXPORT_SYMBOL_GPL(mt76_connac_mcu_alloc_wtbl_req);
322 
mt76_connac_mcu_bss_omac_tlv(struct sk_buff * skb,struct ieee80211_vif * vif)323 void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb,
324 				  struct ieee80211_vif *vif)
325 {
326 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
327 	u8 omac_idx = mvif->omac_idx;
328 	struct bss_info_omac *omac;
329 	struct tlv *tlv;
330 	u32 type = 0;
331 
332 	switch (vif->type) {
333 	case NL80211_IFTYPE_MONITOR:
334 	case NL80211_IFTYPE_MESH_POINT:
335 	case NL80211_IFTYPE_AP:
336 		if (vif->p2p)
337 			type = CONNECTION_P2P_GO;
338 		else
339 			type = CONNECTION_INFRA_AP;
340 		break;
341 	case NL80211_IFTYPE_STATION:
342 		if (vif->p2p)
343 			type = CONNECTION_P2P_GC;
344 		else
345 			type = CONNECTION_INFRA_STA;
346 		break;
347 	case NL80211_IFTYPE_ADHOC:
348 		type = CONNECTION_IBSS_ADHOC;
349 		break;
350 	default:
351 		WARN_ON(1);
352 		break;
353 	}
354 
355 	tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_OMAC, sizeof(*omac));
356 
357 	omac = (struct bss_info_omac *)tlv;
358 	omac->conn_type = cpu_to_le32(type);
359 	omac->omac_idx = mvif->omac_idx;
360 	omac->band_idx = mvif->band_idx;
361 	omac->hw_bss_idx = omac_idx > EXT_BSSID_START ? HW_BSSID_0 : omac_idx;
362 }
363 EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_omac_tlv);
364 
mt76_connac_mcu_sta_basic_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta,bool enable,bool newly)365 void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb,
366 				   struct ieee80211_vif *vif,
367 				   struct ieee80211_sta *sta,
368 				   bool enable, bool newly)
369 {
370 	struct sta_rec_basic *basic;
371 	struct tlv *tlv;
372 	int conn_type;
373 
374 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BASIC, sizeof(*basic));
375 
376 	basic = (struct sta_rec_basic *)tlv;
377 	basic->extra_info = cpu_to_le16(EXTRA_INFO_VER);
378 
379 	if (enable) {
380 		if (newly)
381 			basic->extra_info |= cpu_to_le16(EXTRA_INFO_NEW);
382 		basic->conn_state = CONN_STATE_PORT_SECURE;
383 	} else {
384 		basic->conn_state = CONN_STATE_DISCONNECT;
385 	}
386 
387 	if (!sta) {
388 		basic->conn_type = cpu_to_le32(CONNECTION_INFRA_BC);
389 		eth_broadcast_addr(basic->peer_addr);
390 		return;
391 	}
392 
393 	switch (vif->type) {
394 	case NL80211_IFTYPE_MESH_POINT:
395 	case NL80211_IFTYPE_AP:
396 		if (vif->p2p)
397 			conn_type = CONNECTION_P2P_GC;
398 		else
399 			conn_type = CONNECTION_INFRA_STA;
400 		basic->conn_type = cpu_to_le32(conn_type);
401 		basic->aid = cpu_to_le16(sta->aid);
402 		break;
403 	case NL80211_IFTYPE_STATION:
404 		if (vif->p2p)
405 			conn_type = CONNECTION_P2P_GO;
406 		else
407 			conn_type = CONNECTION_INFRA_AP;
408 		basic->conn_type = cpu_to_le32(conn_type);
409 		basic->aid = cpu_to_le16(vif->cfg.aid);
410 		break;
411 	case NL80211_IFTYPE_ADHOC:
412 		basic->conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC);
413 		basic->aid = cpu_to_le16(sta->aid);
414 		break;
415 	default:
416 		WARN_ON(1);
417 		break;
418 	}
419 
420 	memcpy(basic->peer_addr, sta->addr, ETH_ALEN);
421 	basic->qos = sta->wme;
422 }
423 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_basic_tlv);
424 
mt76_connac_mcu_sta_uapsd(struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta)425 void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif,
426 			       struct ieee80211_sta *sta)
427 {
428 	struct sta_rec_uapsd *uapsd;
429 	struct tlv *tlv;
430 
431 	if (vif->type != NL80211_IFTYPE_AP || !sta->wme)
432 		return;
433 
434 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_APPS, sizeof(*uapsd));
435 	uapsd = (struct sta_rec_uapsd *)tlv;
436 
437 	if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO) {
438 		uapsd->dac_map |= BIT(3);
439 		uapsd->tac_map |= BIT(3);
440 	}
441 	if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI) {
442 		uapsd->dac_map |= BIT(2);
443 		uapsd->tac_map |= BIT(2);
444 	}
445 	if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE) {
446 		uapsd->dac_map |= BIT(1);
447 		uapsd->tac_map |= BIT(1);
448 	}
449 	if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK) {
450 		uapsd->dac_map |= BIT(0);
451 		uapsd->tac_map |= BIT(0);
452 	}
453 	uapsd->max_sp = sta->max_sp;
454 }
455 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_uapsd);
456 
mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct mt76_wcid * wcid,void * sta_wtbl,void * wtbl_tlv)457 void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb,
458 					struct ieee80211_vif *vif,
459 					struct mt76_wcid *wcid,
460 					void *sta_wtbl, void *wtbl_tlv)
461 {
462 	struct wtbl_hdr_trans *htr;
463 	struct tlv *tlv;
464 
465 	tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HDR_TRANS,
466 					     sizeof(*htr),
467 					     wtbl_tlv, sta_wtbl);
468 	htr = (struct wtbl_hdr_trans *)tlv;
469 	htr->no_rx_trans = true;
470 
471 	if (vif->type == NL80211_IFTYPE_STATION)
472 		htr->to_ds = true;
473 	else
474 		htr->from_ds = true;
475 
476 	if (!wcid)
477 		return;
478 
479 	htr->no_rx_trans = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags);
480 	if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) {
481 		htr->to_ds = true;
482 		htr->from_ds = true;
483 	}
484 }
485 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_hdr_trans_tlv);
486 
mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev * dev,struct ieee80211_vif * vif,struct mt76_wcid * wcid,int cmd)487 int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev,
488 					 struct ieee80211_vif *vif,
489 					 struct mt76_wcid *wcid, int cmd)
490 {
491 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
492 	struct wtbl_req_hdr *wtbl_hdr;
493 	struct tlv *sta_wtbl;
494 	struct sk_buff *skb;
495 
496 	skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
497 	if (IS_ERR(skb))
498 		return PTR_ERR(skb);
499 
500 	sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
501 					   sizeof(struct tlv));
502 
503 	wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET,
504 						  sta_wtbl, &skb);
505 	if (IS_ERR(wtbl_hdr))
506 		return PTR_ERR(wtbl_hdr);
507 
508 	mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, sta_wtbl, wtbl_hdr);
509 
510 	return mt76_mcu_skb_send_msg(dev, skb, cmd, true);
511 }
512 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_update_hdr_trans);
513 
mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev * dev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)514 int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev,
515 					  struct ieee80211_vif *vif,
516 					  struct ieee80211_sta *sta)
517 {
518 	struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
519 	struct wtbl_req_hdr *wtbl_hdr;
520 	struct sk_buff *skb = NULL;
521 
522 	wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, NULL,
523 						  &skb);
524 	if (IS_ERR(wtbl_hdr))
525 		return PTR_ERR(wtbl_hdr);
526 
527 	mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, NULL, wtbl_hdr);
528 
529 	return mt76_mcu_skb_send_msg(dev, skb, MCU_EXT_CMD(WTBL_UPDATE), true);
530 }
531 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_update_hdr_trans);
532 
mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev * dev,struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta,void * sta_wtbl,void * wtbl_tlv)533 void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev,
534 				      struct sk_buff *skb,
535 				      struct ieee80211_vif *vif,
536 				      struct ieee80211_sta *sta,
537 				      void *sta_wtbl, void *wtbl_tlv)
538 {
539 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
540 	struct wtbl_generic *generic;
541 	struct wtbl_rx *rx;
542 	struct wtbl_spe *spe;
543 	struct tlv *tlv;
544 
545 	tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_GENERIC,
546 					     sizeof(*generic),
547 					     wtbl_tlv, sta_wtbl);
548 
549 	generic = (struct wtbl_generic *)tlv;
550 
551 	if (sta) {
552 		if (vif->type == NL80211_IFTYPE_STATION)
553 			generic->partial_aid = cpu_to_le16(vif->cfg.aid);
554 		else
555 			generic->partial_aid = cpu_to_le16(sta->aid);
556 		memcpy(generic->peer_addr, sta->addr, ETH_ALEN);
557 		generic->muar_idx = mvif->omac_idx;
558 		generic->qos = sta->wme;
559 	} else {
560 		if (!is_connac_v1(dev) && vif->type == NL80211_IFTYPE_STATION)
561 			memcpy(generic->peer_addr, vif->bss_conf.bssid,
562 			       ETH_ALEN);
563 		else
564 			eth_broadcast_addr(generic->peer_addr);
565 
566 		generic->muar_idx = 0xe;
567 	}
568 
569 	tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RX, sizeof(*rx),
570 					     wtbl_tlv, sta_wtbl);
571 
572 	rx = (struct wtbl_rx *)tlv;
573 	rx->rca1 = sta ? vif->type != NL80211_IFTYPE_AP : 1;
574 	rx->rca2 = 1;
575 	rx->rv = 1;
576 
577 	if (!is_connac_v1(dev))
578 		return;
579 
580 	tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SPE, sizeof(*spe),
581 					     wtbl_tlv, sta_wtbl);
582 	spe = (struct wtbl_spe *)tlv;
583 	spe->spe_idx = 24;
584 }
585 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_generic_tlv);
586 
587 static void
mt76_connac_mcu_sta_amsdu_tlv(struct sk_buff * skb,struct ieee80211_sta * sta,struct ieee80211_vif * vif)588 mt76_connac_mcu_sta_amsdu_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,
589 			      struct ieee80211_vif *vif)
590 {
591 	struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
592 	struct sta_rec_amsdu *amsdu;
593 	struct tlv *tlv;
594 
595 	if (vif->type != NL80211_IFTYPE_AP &&
596 	    vif->type != NL80211_IFTYPE_STATION)
597 		return;
598 
599 	if (!sta->deflink.agg.max_amsdu_len)
600 		return;
601 
602 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));
603 	amsdu = (struct sta_rec_amsdu *)tlv;
604 	amsdu->max_amsdu_num = 8;
605 	amsdu->amsdu_en = true;
606 	amsdu->max_mpdu_size = sta->deflink.agg.max_amsdu_len >=
607 			       IEEE80211_MAX_MPDU_LEN_VHT_7991;
608 
609 	wcid->amsdu = true;
610 }
611 
612 #define HE_PHY(p, c)	u8_get_bits(c, IEEE80211_HE_PHY_##p)
613 #define HE_MAC(m, c)	u8_get_bits(c, IEEE80211_HE_MAC_##m)
614 static void
mt76_connac_mcu_sta_he_tlv(struct sk_buff * skb,struct ieee80211_sta * sta)615 mt76_connac_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
616 {
617 	struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap;
618 	struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
619 	struct sta_rec_he *he;
620 	struct tlv *tlv;
621 	u32 cap = 0;
622 
623 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he));
624 
625 	he = (struct sta_rec_he *)tlv;
626 
627 	if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE)
628 		cap |= STA_REC_HE_CAP_HTC;
629 
630 	if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR)
631 		cap |= STA_REC_HE_CAP_BSR;
632 
633 	if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL)
634 		cap |= STA_REC_HE_CAP_OM;
635 
636 	if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU)
637 		cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU;
638 
639 	if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR)
640 		cap |= STA_REC_HE_CAP_BQR;
641 
642 	if (elem->phy_cap_info[0] &
643 	    (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G |
644 	     IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G))
645 		cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT;
646 
647 	if (elem->phy_cap_info[1] &
648 	    IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD)
649 		cap |= STA_REC_HE_CAP_LDPC;
650 
651 	if (elem->phy_cap_info[1] &
652 	    IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US)
653 		cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI;
654 
655 	if (elem->phy_cap_info[2] &
656 	    IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US)
657 		cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI;
658 
659 	if (elem->phy_cap_info[2] &
660 	    IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ)
661 		cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC;
662 
663 	if (elem->phy_cap_info[2] &
664 	    IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ)
665 		cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC;
666 
667 	if (elem->phy_cap_info[6] &
668 	    IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE)
669 		cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE;
670 
671 	if (elem->phy_cap_info[7] &
672 	    IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI)
673 		cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI;
674 
675 	if (elem->phy_cap_info[7] &
676 	    IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ)
677 		cap |= STA_REC_HE_CAP_GT_80M_TX_STBC;
678 
679 	if (elem->phy_cap_info[7] &
680 	    IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ)
681 		cap |= STA_REC_HE_CAP_GT_80M_RX_STBC;
682 
683 	if (elem->phy_cap_info[8] &
684 	    IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI)
685 		cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI;
686 
687 	if (elem->phy_cap_info[8] &
688 	    IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI)
689 		cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI;
690 
691 	if (elem->phy_cap_info[9] &
692 	    IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK)
693 		cap |= STA_REC_HE_CAP_TRIG_CQI_FK;
694 
695 	if (elem->phy_cap_info[9] &
696 	    IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU)
697 		cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242;
698 
699 	if (elem->phy_cap_info[9] &
700 	    IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU)
701 		cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242;
702 
703 	he->he_cap = cpu_to_le32(cap);
704 
705 	switch (sta->deflink.bandwidth) {
706 	case IEEE80211_STA_RX_BW_160:
707 		if (elem->phy_cap_info[0] &
708 		    IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
709 			he->max_nss_mcs[CMD_HE_MCS_BW8080] =
710 				he_cap->he_mcs_nss_supp.rx_mcs_80p80;
711 
712 		he->max_nss_mcs[CMD_HE_MCS_BW160] =
713 				he_cap->he_mcs_nss_supp.rx_mcs_160;
714 		fallthrough;
715 	default:
716 		he->max_nss_mcs[CMD_HE_MCS_BW80] =
717 				he_cap->he_mcs_nss_supp.rx_mcs_80;
718 		break;
719 	}
720 
721 	he->t_frame_dur =
722 		HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
723 	he->max_ampdu_exp =
724 		HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]);
725 
726 	he->bw_set =
727 		HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]);
728 	he->device_class =
729 		HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]);
730 	he->punc_pream_rx =
731 		HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
732 
733 	he->dcm_tx_mode =
734 		HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]);
735 	he->dcm_tx_max_nss =
736 		HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]);
737 	he->dcm_rx_mode =
738 		HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]);
739 	he->dcm_rx_max_nss =
740 		HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]);
741 	he->dcm_rx_max_nss =
742 		HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]);
743 
744 	he->pkt_ext = 2;
745 }
746 
747 static u8
mt76_connac_get_phy_mode_v2(struct mt76_phy * mphy,struct ieee80211_vif * vif,enum nl80211_band band,struct ieee80211_sta * sta)748 mt76_connac_get_phy_mode_v2(struct mt76_phy *mphy, struct ieee80211_vif *vif,
749 			    enum nl80211_band band, struct ieee80211_sta *sta)
750 {
751 	struct ieee80211_sta_ht_cap *ht_cap;
752 	struct ieee80211_sta_vht_cap *vht_cap;
753 	const struct ieee80211_sta_he_cap *he_cap;
754 	u8 mode = 0;
755 
756 	if (sta) {
757 		ht_cap = &sta->deflink.ht_cap;
758 		vht_cap = &sta->deflink.vht_cap;
759 		he_cap = &sta->deflink.he_cap;
760 	} else {
761 		struct ieee80211_supported_band *sband;
762 
763 		sband = mphy->hw->wiphy->bands[band];
764 		ht_cap = &sband->ht_cap;
765 		vht_cap = &sband->vht_cap;
766 		he_cap = ieee80211_get_he_iftype_cap(sband, vif->type);
767 	}
768 
769 	if (band == NL80211_BAND_2GHZ) {
770 		mode |= PHY_TYPE_BIT_HR_DSSS | PHY_TYPE_BIT_ERP;
771 
772 		if (ht_cap->ht_supported)
773 			mode |= PHY_TYPE_BIT_HT;
774 
775 		if (he_cap && he_cap->has_he)
776 			mode |= PHY_TYPE_BIT_HE;
777 	} else if (band == NL80211_BAND_5GHZ || band == NL80211_BAND_6GHZ) {
778 		mode |= PHY_TYPE_BIT_OFDM;
779 
780 		if (ht_cap->ht_supported)
781 			mode |= PHY_TYPE_BIT_HT;
782 
783 		if (vht_cap->vht_supported)
784 			mode |= PHY_TYPE_BIT_VHT;
785 
786 		if (he_cap && he_cap->has_he)
787 			mode |= PHY_TYPE_BIT_HE;
788 	}
789 
790 	return mode;
791 }
792 
mt76_connac_mcu_sta_tlv(struct mt76_phy * mphy,struct sk_buff * skb,struct ieee80211_sta * sta,struct ieee80211_vif * vif,u8 rcpi,u8 sta_state)793 void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb,
794 			     struct ieee80211_sta *sta,
795 			     struct ieee80211_vif *vif,
796 			     u8 rcpi, u8 sta_state)
797 {
798 	struct cfg80211_chan_def *chandef = &mphy->chandef;
799 	enum nl80211_band band = chandef->chan->band;
800 	struct mt76_dev *dev = mphy->dev;
801 	struct sta_rec_ra_info *ra_info;
802 	struct sta_rec_state *state;
803 	struct sta_rec_phy *phy;
804 	struct tlv *tlv;
805 	u16 supp_rates;
806 
807 	/* starec ht */
808 	if (sta->deflink.ht_cap.ht_supported) {
809 		struct sta_rec_ht *ht;
810 
811 		tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));
812 		ht = (struct sta_rec_ht *)tlv;
813 		ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap);
814 	}
815 
816 	/* starec vht */
817 	if (sta->deflink.vht_cap.vht_supported) {
818 		struct sta_rec_vht *vht;
819 		int len;
820 
821 		len = is_mt7921(dev) ? sizeof(*vht) : sizeof(*vht) - 4;
822 		tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, len);
823 		vht = (struct sta_rec_vht *)tlv;
824 		vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);
825 		vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;
826 		vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;
827 	}
828 
829 	/* starec uapsd */
830 	mt76_connac_mcu_sta_uapsd(skb, vif, sta);
831 
832 	if (!is_mt7921(dev))
833 		return;
834 
835 	if (sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he)
836 		mt76_connac_mcu_sta_amsdu_tlv(skb, sta, vif);
837 
838 	/* starec he */
839 	if (sta->deflink.he_cap.has_he) {
840 		mt76_connac_mcu_sta_he_tlv(skb, sta);
841 		if (band == NL80211_BAND_6GHZ &&
842 		    sta_state == MT76_STA_INFO_STATE_ASSOC) {
843 			struct sta_rec_he_6g_capa *he_6g_capa;
844 
845 			tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G,
846 						      sizeof(*he_6g_capa));
847 			he_6g_capa = (struct sta_rec_he_6g_capa *)tlv;
848 			he_6g_capa->capa = sta->deflink.he_6ghz_capa.capa;
849 		}
850 	}
851 
852 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy));
853 	phy = (struct sta_rec_phy *)tlv;
854 	phy->phy_type = mt76_connac_get_phy_mode_v2(mphy, vif, band, sta);
855 	phy->basic_rate = cpu_to_le16((u16)vif->bss_conf.basic_rates);
856 	phy->rcpi = rcpi;
857 	phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR,
858 				sta->deflink.ht_cap.ampdu_factor) |
859 		     FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY,
860 				sta->deflink.ht_cap.ampdu_density);
861 
862 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra_info));
863 	ra_info = (struct sta_rec_ra_info *)tlv;
864 
865 	supp_rates = sta->deflink.supp_rates[band];
866 	if (band == NL80211_BAND_2GHZ)
867 		supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates >> 4) |
868 			     FIELD_PREP(RA_LEGACY_CCK, supp_rates & 0xf);
869 	else
870 		supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates);
871 
872 	ra_info->legacy = cpu_to_le16(supp_rates);
873 
874 	if (sta->deflink.ht_cap.ht_supported)
875 		memcpy(ra_info->rx_mcs_bitmask,
876 		       sta->deflink.ht_cap.mcs.rx_mask,
877 		       HT_MCS_MASK_NUM);
878 
879 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_STATE, sizeof(*state));
880 	state = (struct sta_rec_state *)tlv;
881 	state->state = sta_state;
882 
883 	if (sta->deflink.vht_cap.vht_supported) {
884 		state->vht_opmode = sta->deflink.bandwidth;
885 		state->vht_opmode |= (sta->deflink.rx_nss - 1) <<
886 			IEEE80211_OPMODE_NOTIF_RX_NSS_SHIFT;
887 	}
888 }
889 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_tlv);
890 
mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff * skb,struct ieee80211_sta * sta,void * sta_wtbl,void * wtbl_tlv)891 void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb,
892 				   struct ieee80211_sta *sta,
893 				   void *sta_wtbl, void *wtbl_tlv)
894 {
895 	struct wtbl_smps *smps;
896 	struct tlv *tlv;
897 
898 	tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SMPS, sizeof(*smps),
899 					     wtbl_tlv, sta_wtbl);
900 	smps = (struct wtbl_smps *)tlv;
901 	smps->smps = (sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC);
902 }
903 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_smps_tlv);
904 
mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev * dev,struct sk_buff * skb,struct ieee80211_sta * sta,void * sta_wtbl,void * wtbl_tlv,bool ht_ldpc,bool vht_ldpc)905 void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb,
906 				 struct ieee80211_sta *sta, void *sta_wtbl,
907 				 void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc)
908 {
909 	struct wtbl_ht *ht = NULL;
910 	struct tlv *tlv;
911 	u32 flags = 0;
912 
913 	if (sta->deflink.ht_cap.ht_supported || sta->deflink.he_6ghz_capa.capa) {
914 		tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HT, sizeof(*ht),
915 						     wtbl_tlv, sta_wtbl);
916 		ht = (struct wtbl_ht *)tlv;
917 		ht->ldpc = ht_ldpc &&
918 			   !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING);
919 
920 		if (sta->deflink.ht_cap.ht_supported) {
921 			ht->af = sta->deflink.ht_cap.ampdu_factor;
922 			ht->mm = sta->deflink.ht_cap.ampdu_density;
923 		} else {
924 			ht->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
925 					       IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
926 			ht->mm = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
927 					       IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START);
928 		}
929 
930 		ht->ht = true;
931 	}
932 
933 	if (sta->deflink.vht_cap.vht_supported || sta->deflink.he_6ghz_capa.capa) {
934 		struct wtbl_vht *vht;
935 		u8 af;
936 
937 		tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_VHT,
938 						     sizeof(*vht), wtbl_tlv,
939 						     sta_wtbl);
940 		vht = (struct wtbl_vht *)tlv;
941 		vht->ldpc = vht_ldpc &&
942 			    !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC);
943 		vht->vht = true;
944 
945 		af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
946 			       sta->deflink.vht_cap.cap);
947 		if (ht)
948 			ht->af = max(ht->af, af);
949 	}
950 
951 	mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_tlv);
952 
953 	if (is_connac_v1(dev) && sta->deflink.ht_cap.ht_supported) {
954 		/* sgi */
955 		u32 msk = MT_WTBL_W5_SHORT_GI_20 | MT_WTBL_W5_SHORT_GI_40 |
956 			  MT_WTBL_W5_SHORT_GI_80 | MT_WTBL_W5_SHORT_GI_160;
957 		struct wtbl_raw *raw;
958 
959 		tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RAW_DATA,
960 						     sizeof(*raw), wtbl_tlv,
961 						     sta_wtbl);
962 
963 		if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
964 			flags |= MT_WTBL_W5_SHORT_GI_20;
965 		if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
966 			flags |= MT_WTBL_W5_SHORT_GI_40;
967 
968 		if (sta->deflink.vht_cap.vht_supported) {
969 			if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
970 				flags |= MT_WTBL_W5_SHORT_GI_80;
971 			if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)
972 				flags |= MT_WTBL_W5_SHORT_GI_160;
973 		}
974 		raw = (struct wtbl_raw *)tlv;
975 		raw->val = cpu_to_le32(flags);
976 		raw->msk = cpu_to_le32(~msk);
977 		raw->wtbl_idx = 1;
978 		raw->dw = 5;
979 	}
980 }
981 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ht_tlv);
982 
mt76_connac_mcu_sta_cmd(struct mt76_phy * phy,struct mt76_sta_cmd_info * info)983 int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy,
984 			    struct mt76_sta_cmd_info *info)
985 {
986 	struct mt76_vif *mvif = (struct mt76_vif *)info->vif->drv_priv;
987 	struct mt76_dev *dev = phy->dev;
988 	struct wtbl_req_hdr *wtbl_hdr;
989 	struct tlv *sta_wtbl;
990 	struct sk_buff *skb;
991 
992 	skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, info->wcid);
993 	if (IS_ERR(skb))
994 		return PTR_ERR(skb);
995 
996 	if (info->sta || !info->offload_fw)
997 		mt76_connac_mcu_sta_basic_tlv(skb, info->vif, info->sta,
998 					      info->enable, info->newly);
999 	if (info->sta && info->enable)
1000 		mt76_connac_mcu_sta_tlv(phy, skb, info->sta,
1001 					info->vif, info->rcpi,
1002 					info->state);
1003 
1004 	sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1005 					   sizeof(struct tlv));
1006 
1007 	wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, info->wcid,
1008 						  WTBL_RESET_AND_SET,
1009 						  sta_wtbl, &skb);
1010 	if (IS_ERR(wtbl_hdr))
1011 		return PTR_ERR(wtbl_hdr);
1012 
1013 	if (info->enable) {
1014 		mt76_connac_mcu_wtbl_generic_tlv(dev, skb, info->vif,
1015 						 info->sta, sta_wtbl,
1016 						 wtbl_hdr);
1017 		mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, info->vif, info->wcid,
1018 						   sta_wtbl, wtbl_hdr);
1019 		if (info->sta)
1020 			mt76_connac_mcu_wtbl_ht_tlv(dev, skb, info->sta,
1021 						    sta_wtbl, wtbl_hdr,
1022 						    true, true);
1023 	}
1024 
1025 	return mt76_mcu_skb_send_msg(dev, skb, info->cmd, true);
1026 }
1027 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_cmd);
1028 
mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev * dev,struct sk_buff * skb,struct ieee80211_ampdu_params * params,bool enable,bool tx,void * sta_wtbl,void * wtbl_tlv)1029 void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb,
1030 				 struct ieee80211_ampdu_params *params,
1031 				 bool enable, bool tx, void *sta_wtbl,
1032 				 void *wtbl_tlv)
1033 {
1034 	struct wtbl_ba *ba;
1035 	struct tlv *tlv;
1036 
1037 	tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_BA, sizeof(*ba),
1038 					     wtbl_tlv, sta_wtbl);
1039 
1040 	ba = (struct wtbl_ba *)tlv;
1041 	ba->tid = params->tid;
1042 
1043 	if (tx) {
1044 		ba->ba_type = MT_BA_TYPE_ORIGINATOR;
1045 		ba->sn = enable ? cpu_to_le16(params->ssn) : 0;
1046 		ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0;
1047 		ba->ba_en = enable;
1048 	} else {
1049 		memcpy(ba->peer_addr, params->sta->addr, ETH_ALEN);
1050 		ba->ba_type = MT_BA_TYPE_RECIPIENT;
1051 		ba->rst_ba_tid = params->tid;
1052 		ba->rst_ba_sel = RST_BA_MAC_TID_MATCH;
1053 		ba->rst_ba_sb = 1;
1054 	}
1055 
1056 	if (!is_connac_v1(dev)) {
1057 		ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0;
1058 		return;
1059 	}
1060 
1061 	if (enable && tx) {
1062 		static const u8 ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 };
1063 		int i;
1064 
1065 		for (i = 7; i > 0; i--) {
1066 			if (params->buf_size >= ba_range[i])
1067 				break;
1068 		}
1069 		ba->ba_winsize_idx = i;
1070 	}
1071 }
1072 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ba_tlv);
1073 
mt76_connac_mcu_uni_add_dev(struct mt76_phy * phy,struct ieee80211_vif * vif,struct mt76_wcid * wcid,bool enable)1074 int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy,
1075 				struct ieee80211_vif *vif,
1076 				struct mt76_wcid *wcid,
1077 				bool enable)
1078 {
1079 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1080 	struct mt76_dev *dev = phy->dev;
1081 	struct {
1082 		struct {
1083 			u8 omac_idx;
1084 			u8 band_idx;
1085 			__le16 pad;
1086 		} __packed hdr;
1087 		struct req_tlv {
1088 			__le16 tag;
1089 			__le16 len;
1090 			u8 active;
1091 			u8 pad;
1092 			u8 omac_addr[ETH_ALEN];
1093 		} __packed tlv;
1094 	} dev_req = {
1095 		.hdr = {
1096 			.omac_idx = mvif->omac_idx,
1097 			.band_idx = mvif->band_idx,
1098 		},
1099 		.tlv = {
1100 			.tag = cpu_to_le16(DEV_INFO_ACTIVE),
1101 			.len = cpu_to_le16(sizeof(struct req_tlv)),
1102 			.active = enable,
1103 		},
1104 	};
1105 	struct {
1106 		struct {
1107 			u8 bss_idx;
1108 			u8 pad[3];
1109 		} __packed hdr;
1110 		struct mt76_connac_bss_basic_tlv basic;
1111 	} basic_req = {
1112 		.hdr = {
1113 			.bss_idx = mvif->idx,
1114 		},
1115 		.basic = {
1116 			.tag = cpu_to_le16(UNI_BSS_INFO_BASIC),
1117 			.len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)),
1118 			.omac_idx = mvif->omac_idx,
1119 			.band_idx = mvif->band_idx,
1120 			.wmm_idx = mvif->wmm_idx,
1121 			.active = enable,
1122 			.bmc_tx_wlan_idx = cpu_to_le16(wcid->idx),
1123 			.sta_idx = cpu_to_le16(wcid->idx),
1124 			.conn_state = 1,
1125 		},
1126 	};
1127 	int err, idx, cmd, len;
1128 	void *data;
1129 
1130 	switch (vif->type) {
1131 	case NL80211_IFTYPE_MESH_POINT:
1132 	case NL80211_IFTYPE_MONITOR:
1133 	case NL80211_IFTYPE_AP:
1134 		basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_AP);
1135 		break;
1136 	case NL80211_IFTYPE_STATION:
1137 		basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_STA);
1138 		break;
1139 	case NL80211_IFTYPE_ADHOC:
1140 		basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC);
1141 		break;
1142 	default:
1143 		WARN_ON(1);
1144 		break;
1145 	}
1146 
1147 	idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx;
1148 	basic_req.basic.hw_bss_idx = idx;
1149 
1150 	memcpy(dev_req.tlv.omac_addr, vif->addr, ETH_ALEN);
1151 
1152 	cmd = enable ? MCU_UNI_CMD(DEV_INFO_UPDATE) : MCU_UNI_CMD(BSS_INFO_UPDATE);
1153 	data = enable ? (void *)&dev_req : (void *)&basic_req;
1154 	len = enable ? sizeof(dev_req) : sizeof(basic_req);
1155 
1156 	err = mt76_mcu_send_msg(dev, cmd, data, len, true);
1157 	if (err < 0)
1158 		return err;
1159 
1160 	cmd = enable ? MCU_UNI_CMD(BSS_INFO_UPDATE) : MCU_UNI_CMD(DEV_INFO_UPDATE);
1161 	data = enable ? (void *)&basic_req : (void *)&dev_req;
1162 	len = enable ? sizeof(basic_req) : sizeof(dev_req);
1163 
1164 	return mt76_mcu_send_msg(dev, cmd, data, len, true);
1165 }
1166 EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_dev);
1167 
mt76_connac_mcu_sta_ba_tlv(struct sk_buff * skb,struct ieee80211_ampdu_params * params,bool enable,bool tx)1168 void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb,
1169 				struct ieee80211_ampdu_params *params,
1170 				bool enable, bool tx)
1171 {
1172 	struct sta_rec_ba *ba;
1173 	struct tlv *tlv;
1174 
1175 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba));
1176 
1177 	ba = (struct sta_rec_ba *)tlv;
1178 	ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT;
1179 	ba->winsize = cpu_to_le16(params->buf_size);
1180 	ba->ssn = cpu_to_le16(params->ssn);
1181 	ba->ba_en = enable << params->tid;
1182 	ba->amsdu = params->amsdu;
1183 	ba->tid = params->tid;
1184 }
1185 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba_tlv);
1186 
mt76_connac_mcu_sta_ba(struct mt76_dev * dev,struct mt76_vif * mvif,struct ieee80211_ampdu_params * params,int cmd,bool enable,bool tx)1187 int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif,
1188 			   struct ieee80211_ampdu_params *params,
1189 			   int cmd, bool enable, bool tx)
1190 {
1191 	struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv;
1192 	struct wtbl_req_hdr *wtbl_hdr;
1193 	struct tlv *sta_wtbl;
1194 	struct sk_buff *skb;
1195 	int ret;
1196 
1197 	skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
1198 	if (IS_ERR(skb))
1199 		return PTR_ERR(skb);
1200 
1201 	sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1202 					   sizeof(struct tlv));
1203 
1204 	wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET,
1205 						  sta_wtbl, &skb);
1206 	if (IS_ERR(wtbl_hdr))
1207 		return PTR_ERR(wtbl_hdr);
1208 
1209 	mt76_connac_mcu_wtbl_ba_tlv(dev, skb, params, enable, tx, sta_wtbl,
1210 				    wtbl_hdr);
1211 
1212 	ret = mt76_mcu_skb_send_msg(dev, skb, cmd, true);
1213 	if (ret)
1214 		return ret;
1215 
1216 	skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
1217 	if (IS_ERR(skb))
1218 		return PTR_ERR(skb);
1219 
1220 	mt76_connac_mcu_sta_ba_tlv(skb, params, enable, tx);
1221 
1222 	return mt76_mcu_skb_send_msg(dev, skb, cmd, true);
1223 }
1224 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba);
1225 
mt76_connac_get_phy_mode(struct mt76_phy * phy,struct ieee80211_vif * vif,enum nl80211_band band,struct ieee80211_sta * sta)1226 u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif,
1227 			    enum nl80211_band band, struct ieee80211_sta *sta)
1228 {
1229 	struct mt76_dev *dev = phy->dev;
1230 	const struct ieee80211_sta_he_cap *he_cap;
1231 	struct ieee80211_sta_vht_cap *vht_cap;
1232 	struct ieee80211_sta_ht_cap *ht_cap;
1233 	u8 mode = 0;
1234 
1235 	if (is_connac_v1(dev))
1236 		return 0x38;
1237 
1238 	if (sta) {
1239 		ht_cap = &sta->deflink.ht_cap;
1240 		vht_cap = &sta->deflink.vht_cap;
1241 		he_cap = &sta->deflink.he_cap;
1242 	} else {
1243 		struct ieee80211_supported_band *sband;
1244 
1245 		sband = phy->hw->wiphy->bands[band];
1246 		ht_cap = &sband->ht_cap;
1247 		vht_cap = &sband->vht_cap;
1248 		he_cap = ieee80211_get_he_iftype_cap(sband, vif->type);
1249 	}
1250 
1251 	if (band == NL80211_BAND_2GHZ) {
1252 		mode |= PHY_MODE_B | PHY_MODE_G;
1253 
1254 		if (ht_cap->ht_supported)
1255 			mode |= PHY_MODE_GN;
1256 
1257 		if (he_cap && he_cap->has_he)
1258 			mode |= PHY_MODE_AX_24G;
1259 	} else if (band == NL80211_BAND_5GHZ) {
1260 		mode |= PHY_MODE_A;
1261 
1262 		if (ht_cap->ht_supported)
1263 			mode |= PHY_MODE_AN;
1264 
1265 		if (vht_cap->vht_supported)
1266 			mode |= PHY_MODE_AC;
1267 
1268 		if (he_cap && he_cap->has_he)
1269 			mode |= PHY_MODE_AX_5G;
1270 	} else if (band == NL80211_BAND_6GHZ) {
1271 		mode |= PHY_MODE_A | PHY_MODE_AN |
1272 			PHY_MODE_AC | PHY_MODE_AX_5G;
1273 	}
1274 
1275 	return mode;
1276 }
1277 EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode);
1278 
1279 const struct ieee80211_sta_he_cap *
mt76_connac_get_he_phy_cap(struct mt76_phy * phy,struct ieee80211_vif * vif)1280 mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif)
1281 {
1282 	enum nl80211_band band = phy->chandef.chan->band;
1283 	struct ieee80211_supported_band *sband;
1284 
1285 	sband = phy->hw->wiphy->bands[band];
1286 
1287 	return ieee80211_get_he_iftype_cap(sband, vif->type);
1288 }
1289 EXPORT_SYMBOL_GPL(mt76_connac_get_he_phy_cap);
1290 
1291 #define DEFAULT_HE_PE_DURATION		4
1292 #define DEFAULT_HE_DURATION_RTS_THRES	1023
1293 static void
mt76_connac_mcu_uni_bss_he_tlv(struct mt76_phy * phy,struct ieee80211_vif * vif,struct tlv * tlv)1294 mt76_connac_mcu_uni_bss_he_tlv(struct mt76_phy *phy, struct ieee80211_vif *vif,
1295 			       struct tlv *tlv)
1296 {
1297 	const struct ieee80211_sta_he_cap *cap;
1298 	struct bss_info_uni_he *he;
1299 
1300 	cap = mt76_connac_get_he_phy_cap(phy, vif);
1301 
1302 	he = (struct bss_info_uni_he *)tlv;
1303 	he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext;
1304 	if (!he->he_pe_duration)
1305 		he->he_pe_duration = DEFAULT_HE_PE_DURATION;
1306 
1307 	he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);
1308 	if (!he->he_rts_thres)
1309 		he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
1310 
1311 	he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;
1312 	he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;
1313 	he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;
1314 }
1315 
mt76_connac_mcu_uni_add_bss(struct mt76_phy * phy,struct ieee80211_vif * vif,struct mt76_wcid * wcid,bool enable)1316 int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy,
1317 				struct ieee80211_vif *vif,
1318 				struct mt76_wcid *wcid,
1319 				bool enable)
1320 {
1321 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1322 	struct cfg80211_chan_def *chandef = &phy->chandef;
1323 	int freq1 = chandef->center_freq1, freq2 = chandef->center_freq2;
1324 	enum nl80211_band band = chandef->chan->band;
1325 	struct mt76_dev *mdev = phy->dev;
1326 	struct {
1327 		struct {
1328 			u8 bss_idx;
1329 			u8 pad[3];
1330 		} __packed hdr;
1331 		struct mt76_connac_bss_basic_tlv basic;
1332 		struct mt76_connac_bss_qos_tlv qos;
1333 	} basic_req = {
1334 		.hdr = {
1335 			.bss_idx = mvif->idx,
1336 		},
1337 		.basic = {
1338 			.tag = cpu_to_le16(UNI_BSS_INFO_BASIC),
1339 			.len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)),
1340 			.bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int),
1341 			.dtim_period = vif->bss_conf.dtim_period,
1342 			.omac_idx = mvif->omac_idx,
1343 			.band_idx = mvif->band_idx,
1344 			.wmm_idx = mvif->wmm_idx,
1345 			.active = true, /* keep bss deactivated */
1346 			.phymode = mt76_connac_get_phy_mode(phy, vif, band, NULL),
1347 		},
1348 		.qos = {
1349 			.tag = cpu_to_le16(UNI_BSS_INFO_QBSS),
1350 			.len = cpu_to_le16(sizeof(struct mt76_connac_bss_qos_tlv)),
1351 			.qos = vif->bss_conf.qos,
1352 		},
1353 	};
1354 	struct {
1355 		struct {
1356 			u8 bss_idx;
1357 			u8 pad[3];
1358 		} __packed hdr;
1359 		struct rlm_tlv {
1360 			__le16 tag;
1361 			__le16 len;
1362 			u8 control_channel;
1363 			u8 center_chan;
1364 			u8 center_chan2;
1365 			u8 bw;
1366 			u8 tx_streams;
1367 			u8 rx_streams;
1368 			u8 short_st;
1369 			u8 ht_op_info;
1370 			u8 sco;
1371 			u8 band;
1372 			u8 pad[2];
1373 		} __packed rlm;
1374 	} __packed rlm_req = {
1375 		.hdr = {
1376 			.bss_idx = mvif->idx,
1377 		},
1378 		.rlm = {
1379 			.tag = cpu_to_le16(UNI_BSS_INFO_RLM),
1380 			.len = cpu_to_le16(sizeof(struct rlm_tlv)),
1381 			.control_channel = chandef->chan->hw_value,
1382 			.center_chan = ieee80211_frequency_to_channel(freq1),
1383 			.center_chan2 = ieee80211_frequency_to_channel(freq2),
1384 			.tx_streams = hweight8(phy->antenna_mask),
1385 			.ht_op_info = 4, /* set HT 40M allowed */
1386 			.rx_streams = phy->chainmask,
1387 			.short_st = true,
1388 			.band = band,
1389 		},
1390 	};
1391 	int err, conn_type;
1392 	u8 idx, basic_phy;
1393 
1394 	idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx;
1395 	basic_req.basic.hw_bss_idx = idx;
1396 	if (band == NL80211_BAND_6GHZ)
1397 		basic_req.basic.phymode_ext = PHY_MODE_AX_6G;
1398 
1399 	basic_phy = mt76_connac_get_phy_mode_v2(phy, vif, band, NULL);
1400 	basic_req.basic.nonht_basic_phy = cpu_to_le16(basic_phy);
1401 
1402 	switch (vif->type) {
1403 	case NL80211_IFTYPE_MESH_POINT:
1404 	case NL80211_IFTYPE_AP:
1405 		if (vif->p2p)
1406 			conn_type = CONNECTION_P2P_GO;
1407 		else
1408 			conn_type = CONNECTION_INFRA_AP;
1409 		basic_req.basic.conn_type = cpu_to_le32(conn_type);
1410 		/* Fully active/deactivate BSS network in AP mode only */
1411 		basic_req.basic.active = enable;
1412 		break;
1413 	case NL80211_IFTYPE_STATION:
1414 		if (vif->p2p)
1415 			conn_type = CONNECTION_P2P_GC;
1416 		else
1417 			conn_type = CONNECTION_INFRA_STA;
1418 		basic_req.basic.conn_type = cpu_to_le32(conn_type);
1419 		break;
1420 	case NL80211_IFTYPE_ADHOC:
1421 		basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC);
1422 		break;
1423 	default:
1424 		WARN_ON(1);
1425 		break;
1426 	}
1427 
1428 	memcpy(basic_req.basic.bssid, vif->bss_conf.bssid, ETH_ALEN);
1429 	basic_req.basic.bmc_tx_wlan_idx = cpu_to_le16(wcid->idx);
1430 	basic_req.basic.sta_idx = cpu_to_le16(wcid->idx);
1431 	basic_req.basic.conn_state = !enable;
1432 
1433 	err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &basic_req,
1434 				sizeof(basic_req), true);
1435 	if (err < 0)
1436 		return err;
1437 
1438 	if (vif->bss_conf.he_support) {
1439 		struct {
1440 			struct {
1441 				u8 bss_idx;
1442 				u8 pad[3];
1443 			} __packed hdr;
1444 			struct bss_info_uni_he he;
1445 			struct bss_info_uni_bss_color bss_color;
1446 		} he_req = {
1447 			.hdr = {
1448 				.bss_idx = mvif->idx,
1449 			},
1450 			.he = {
1451 				.tag = cpu_to_le16(UNI_BSS_INFO_HE_BASIC),
1452 				.len = cpu_to_le16(sizeof(struct bss_info_uni_he)),
1453 			},
1454 			.bss_color = {
1455 				.tag = cpu_to_le16(UNI_BSS_INFO_BSS_COLOR),
1456 				.len = cpu_to_le16(sizeof(struct bss_info_uni_bss_color)),
1457 				.enable = 0,
1458 				.bss_color = 0,
1459 			},
1460 		};
1461 
1462 		if (enable) {
1463 			he_req.bss_color.enable =
1464 				vif->bss_conf.he_bss_color.enabled;
1465 			he_req.bss_color.bss_color =
1466 				vif->bss_conf.he_bss_color.color;
1467 		}
1468 
1469 		mt76_connac_mcu_uni_bss_he_tlv(phy, vif,
1470 					       (struct tlv *)&he_req.he);
1471 		err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE),
1472 					&he_req, sizeof(he_req), true);
1473 		if (err < 0)
1474 			return err;
1475 	}
1476 
1477 	switch (chandef->width) {
1478 	case NL80211_CHAN_WIDTH_40:
1479 		rlm_req.rlm.bw = CMD_CBW_40MHZ;
1480 		break;
1481 	case NL80211_CHAN_WIDTH_80:
1482 		rlm_req.rlm.bw = CMD_CBW_80MHZ;
1483 		break;
1484 	case NL80211_CHAN_WIDTH_80P80:
1485 		rlm_req.rlm.bw = CMD_CBW_8080MHZ;
1486 		break;
1487 	case NL80211_CHAN_WIDTH_160:
1488 		rlm_req.rlm.bw = CMD_CBW_160MHZ;
1489 		break;
1490 	case NL80211_CHAN_WIDTH_5:
1491 		rlm_req.rlm.bw = CMD_CBW_5MHZ;
1492 		break;
1493 	case NL80211_CHAN_WIDTH_10:
1494 		rlm_req.rlm.bw = CMD_CBW_10MHZ;
1495 		break;
1496 	case NL80211_CHAN_WIDTH_20_NOHT:
1497 	case NL80211_CHAN_WIDTH_20:
1498 	default:
1499 		rlm_req.rlm.bw = CMD_CBW_20MHZ;
1500 		rlm_req.rlm.ht_op_info = 0;
1501 		break;
1502 	}
1503 
1504 	if (rlm_req.rlm.control_channel < rlm_req.rlm.center_chan)
1505 		rlm_req.rlm.sco = 1; /* SCA */
1506 	else if (rlm_req.rlm.control_channel > rlm_req.rlm.center_chan)
1507 		rlm_req.rlm.sco = 3; /* SCB */
1508 
1509 	return mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &rlm_req,
1510 				 sizeof(rlm_req), true);
1511 }
1512 EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_bss);
1513 
1514 #define MT76_CONNAC_SCAN_CHANNEL_TIME		60
mt76_connac_mcu_hw_scan(struct mt76_phy * phy,struct ieee80211_vif * vif,struct ieee80211_scan_request * scan_req)1515 int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif,
1516 			    struct ieee80211_scan_request *scan_req)
1517 {
1518 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1519 	struct cfg80211_scan_request *sreq = &scan_req->req;
1520 	int n_ssids = 0, err, i, duration;
1521 	int ext_channels_num = max_t(int, sreq->n_channels - 32, 0);
1522 	struct ieee80211_channel **scan_list = sreq->channels;
1523 	struct mt76_dev *mdev = phy->dev;
1524 	struct mt76_connac_mcu_scan_channel *chan;
1525 	struct mt76_connac_hw_scan_req *req;
1526 	struct sk_buff *skb;
1527 
1528 	skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req));
1529 	if (!skb)
1530 		return -ENOMEM;
1531 
1532 	set_bit(MT76_HW_SCANNING, &phy->state);
1533 	mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f;
1534 
1535 	req = (struct mt76_connac_hw_scan_req *)skb_put(skb, sizeof(*req));
1536 
1537 	req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7;
1538 	req->bss_idx = mvif->idx;
1539 	req->scan_type = sreq->n_ssids ? 1 : 0;
1540 	req->probe_req_num = sreq->n_ssids ? 2 : 0;
1541 	req->version = 1;
1542 
1543 	for (i = 0; i < sreq->n_ssids; i++) {
1544 		if (!sreq->ssids[i].ssid_len)
1545 			continue;
1546 
1547 		req->ssids[i].ssid_len = cpu_to_le32(sreq->ssids[i].ssid_len);
1548 		memcpy(req->ssids[i].ssid, sreq->ssids[i].ssid,
1549 		       sreq->ssids[i].ssid_len);
1550 		n_ssids++;
1551 	}
1552 	req->ssid_type = n_ssids ? BIT(2) : BIT(0);
1553 	req->ssid_type_ext = n_ssids ? BIT(0) : 0;
1554 	req->ssids_num = n_ssids;
1555 
1556 	duration = is_mt7921(phy->dev) ? 0 : MT76_CONNAC_SCAN_CHANNEL_TIME;
1557 	/* increase channel time for passive scan */
1558 	if (!sreq->n_ssids)
1559 		duration *= 2;
1560 	req->timeout_value = cpu_to_le16(sreq->n_channels * duration);
1561 	req->channel_min_dwell_time = cpu_to_le16(duration);
1562 	req->channel_dwell_time = cpu_to_le16(duration);
1563 
1564 	if (sreq->n_channels == 0 || sreq->n_channels > 64) {
1565 		req->channel_type = 0;
1566 		req->channels_num = 0;
1567 		req->ext_channels_num = 0;
1568 	} else {
1569 		req->channel_type = 4;
1570 		req->channels_num = min_t(u8, sreq->n_channels, 32);
1571 		req->ext_channels_num = min_t(u8, ext_channels_num, 32);
1572 	}
1573 
1574 	for (i = 0; i < req->channels_num + req->ext_channels_num; i++) {
1575 		if (i >= 32)
1576 			chan = &req->ext_channels[i - 32];
1577 		else
1578 			chan = &req->channels[i];
1579 
1580 		switch (scan_list[i]->band) {
1581 		case NL80211_BAND_2GHZ:
1582 			chan->band = 1;
1583 			break;
1584 		case NL80211_BAND_6GHZ:
1585 			chan->band = 3;
1586 			break;
1587 		default:
1588 			chan->band = 2;
1589 			break;
1590 		}
1591 		chan->channel_num = scan_list[i]->hw_value;
1592 	}
1593 
1594 	if (sreq->ie_len > 0) {
1595 		memcpy(req->ies, sreq->ie, sreq->ie_len);
1596 		req->ies_len = cpu_to_le16(sreq->ie_len);
1597 	}
1598 
1599 	if (is_mt7921(phy->dev))
1600 		req->scan_func |= SCAN_FUNC_SPLIT_SCAN;
1601 
1602 	memcpy(req->bssid, sreq->bssid, ETH_ALEN);
1603 	if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
1604 		get_random_mask_addr(req->random_mac, sreq->mac_addr,
1605 				     sreq->mac_addr_mask);
1606 		req->scan_func |= SCAN_FUNC_RANDOM_MAC;
1607 	}
1608 
1609 	err = mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(START_HW_SCAN),
1610 				    false);
1611 	if (err < 0)
1612 		clear_bit(MT76_HW_SCANNING, &phy->state);
1613 
1614 	return err;
1615 }
1616 EXPORT_SYMBOL_GPL(mt76_connac_mcu_hw_scan);
1617 
mt76_connac_mcu_cancel_hw_scan(struct mt76_phy * phy,struct ieee80211_vif * vif)1618 int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy,
1619 				   struct ieee80211_vif *vif)
1620 {
1621 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1622 	struct {
1623 		u8 seq_num;
1624 		u8 is_ext_channel;
1625 		u8 rsv[2];
1626 	} __packed req = {
1627 		.seq_num = mvif->scan_seq_num,
1628 	};
1629 
1630 	if (test_and_clear_bit(MT76_HW_SCANNING, &phy->state)) {
1631 		struct cfg80211_scan_info info = {
1632 			.aborted = true,
1633 		};
1634 
1635 		ieee80211_scan_completed(phy->hw, &info);
1636 	}
1637 
1638 	return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(CANCEL_HW_SCAN),
1639 				 &req, sizeof(req), false);
1640 }
1641 EXPORT_SYMBOL_GPL(mt76_connac_mcu_cancel_hw_scan);
1642 
mt76_connac_mcu_sched_scan_req(struct mt76_phy * phy,struct ieee80211_vif * vif,struct cfg80211_sched_scan_request * sreq)1643 int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy,
1644 				   struct ieee80211_vif *vif,
1645 				   struct cfg80211_sched_scan_request *sreq)
1646 {
1647 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1648 	struct ieee80211_channel **scan_list = sreq->channels;
1649 	struct mt76_connac_mcu_scan_channel *chan;
1650 	struct mt76_connac_sched_scan_req *req;
1651 	struct mt76_dev *mdev = phy->dev;
1652 	struct cfg80211_match_set *match;
1653 	struct cfg80211_ssid *ssid;
1654 	struct sk_buff *skb;
1655 	int i;
1656 
1657 	skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req) + sreq->ie_len);
1658 	if (!skb)
1659 		return -ENOMEM;
1660 
1661 	mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f;
1662 
1663 	req = (struct mt76_connac_sched_scan_req *)skb_put(skb, sizeof(*req));
1664 	req->version = 1;
1665 	req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7;
1666 
1667 	if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
1668 		u8 *addr = is_mt7663(phy->dev) ? req->mt7663.random_mac
1669 					       : req->mt7921.random_mac;
1670 
1671 		req->scan_func = 1;
1672 		get_random_mask_addr(addr, sreq->mac_addr,
1673 				     sreq->mac_addr_mask);
1674 	}
1675 	if (is_mt7921(phy->dev)) {
1676 		req->mt7921.bss_idx = mvif->idx;
1677 		req->mt7921.delay = cpu_to_le32(sreq->delay);
1678 	}
1679 
1680 	req->ssids_num = sreq->n_ssids;
1681 	for (i = 0; i < req->ssids_num; i++) {
1682 		ssid = &sreq->ssids[i];
1683 		memcpy(req->ssids[i].ssid, ssid->ssid, ssid->ssid_len);
1684 		req->ssids[i].ssid_len = cpu_to_le32(ssid->ssid_len);
1685 	}
1686 
1687 	req->match_num = sreq->n_match_sets;
1688 	for (i = 0; i < req->match_num; i++) {
1689 		match = &sreq->match_sets[i];
1690 		memcpy(req->match[i].ssid, match->ssid.ssid,
1691 		       match->ssid.ssid_len);
1692 		req->match[i].rssi_th = cpu_to_le32(match->rssi_thold);
1693 		req->match[i].ssid_len = match->ssid.ssid_len;
1694 	}
1695 
1696 	req->channel_type = sreq->n_channels ? 4 : 0;
1697 	req->channels_num = min_t(u8, sreq->n_channels, 64);
1698 	for (i = 0; i < req->channels_num; i++) {
1699 		chan = &req->channels[i];
1700 
1701 		switch (scan_list[i]->band) {
1702 		case NL80211_BAND_2GHZ:
1703 			chan->band = 1;
1704 			break;
1705 		case NL80211_BAND_6GHZ:
1706 			chan->band = 3;
1707 			break;
1708 		default:
1709 			chan->band = 2;
1710 			break;
1711 		}
1712 		chan->channel_num = scan_list[i]->hw_value;
1713 	}
1714 
1715 	req->intervals_num = sreq->n_scan_plans;
1716 	for (i = 0; i < req->intervals_num; i++)
1717 		req->intervals[i] = cpu_to_le16(sreq->scan_plans[i].interval);
1718 
1719 	if (sreq->ie_len > 0) {
1720 		req->ie_len = cpu_to_le16(sreq->ie_len);
1721 		memcpy(skb_put(skb, sreq->ie_len), sreq->ie, sreq->ie_len);
1722 	}
1723 
1724 	return mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(SCHED_SCAN_REQ),
1725 				     false);
1726 }
1727 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_req);
1728 
mt76_connac_mcu_sched_scan_enable(struct mt76_phy * phy,struct ieee80211_vif * vif,bool enable)1729 int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy,
1730 				      struct ieee80211_vif *vif,
1731 				      bool enable)
1732 {
1733 	struct {
1734 		u8 active; /* 0: enabled 1: disabled */
1735 		u8 rsv[3];
1736 	} __packed req = {
1737 		.active = !enable,
1738 	};
1739 
1740 	if (enable)
1741 		set_bit(MT76_HW_SCHED_SCANNING, &phy->state);
1742 	else
1743 		clear_bit(MT76_HW_SCHED_SCANNING, &phy->state);
1744 
1745 	return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SCHED_SCAN_ENABLE),
1746 				 &req, sizeof(req), false);
1747 }
1748 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_enable);
1749 
mt76_connac_mcu_chip_config(struct mt76_dev * dev)1750 int mt76_connac_mcu_chip_config(struct mt76_dev *dev)
1751 {
1752 	struct mt76_connac_config req = {
1753 		.resp_type = 0,
1754 	};
1755 
1756 	memcpy(req.data, "assert", 7);
1757 
1758 	return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG),
1759 				 &req, sizeof(req), false);
1760 }
1761 EXPORT_SYMBOL_GPL(mt76_connac_mcu_chip_config);
1762 
mt76_connac_mcu_set_deep_sleep(struct mt76_dev * dev,bool enable)1763 int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable)
1764 {
1765 	struct mt76_connac_config req = {
1766 		.resp_type = 0,
1767 	};
1768 
1769 	snprintf(req.data, sizeof(req.data), "KeepFullPwr %d", !enable);
1770 
1771 	return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG),
1772 				 &req, sizeof(req), false);
1773 }
1774 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_deep_sleep);
1775 
mt76_connac_sta_state_dp(struct mt76_dev * dev,enum ieee80211_sta_state old_state,enum ieee80211_sta_state new_state)1776 int mt76_connac_sta_state_dp(struct mt76_dev *dev,
1777 			     enum ieee80211_sta_state old_state,
1778 			     enum ieee80211_sta_state new_state)
1779 {
1780 	if ((old_state == IEEE80211_STA_ASSOC &&
1781 	     new_state == IEEE80211_STA_AUTHORIZED) ||
1782 	    (old_state == IEEE80211_STA_NONE &&
1783 	     new_state == IEEE80211_STA_NOTEXIST))
1784 		mt76_connac_mcu_set_deep_sleep(dev, true);
1785 
1786 	if ((old_state == IEEE80211_STA_NOTEXIST &&
1787 	     new_state == IEEE80211_STA_NONE) ||
1788 	    (old_state == IEEE80211_STA_AUTHORIZED &&
1789 	     new_state == IEEE80211_STA_ASSOC))
1790 		mt76_connac_mcu_set_deep_sleep(dev, false);
1791 
1792 	return 0;
1793 }
1794 EXPORT_SYMBOL_GPL(mt76_connac_sta_state_dp);
1795 
mt76_connac_mcu_coredump_event(struct mt76_dev * dev,struct sk_buff * skb,struct mt76_connac_coredump * coredump)1796 void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb,
1797 				    struct mt76_connac_coredump *coredump)
1798 {
1799 	spin_lock_bh(&dev->lock);
1800 	__skb_queue_tail(&coredump->msg_list, skb);
1801 	spin_unlock_bh(&dev->lock);
1802 
1803 	coredump->last_activity = jiffies;
1804 
1805 	queue_delayed_work(dev->wq, &coredump->work,
1806 			   MT76_CONNAC_COREDUMP_TIMEOUT);
1807 }
1808 EXPORT_SYMBOL_GPL(mt76_connac_mcu_coredump_event);
1809 
mt76_connac_mcu_parse_tx_resource(struct mt76_dev * dev,struct sk_buff * skb)1810 static void mt76_connac_mcu_parse_tx_resource(struct mt76_dev *dev,
1811 					      struct sk_buff *skb)
1812 {
1813 	struct mt76_sdio *sdio = &dev->sdio;
1814 	struct mt76_connac_tx_resource {
1815 		__le32 version;
1816 		__le32 pse_data_quota;
1817 		__le32 pse_mcu_quota;
1818 		__le32 ple_data_quota;
1819 		__le32 ple_mcu_quota;
1820 		__le16 pse_page_size;
1821 		__le16 ple_page_size;
1822 		u8 pp_padding;
1823 		u8 pad[3];
1824 	} __packed * tx_res;
1825 
1826 	tx_res = (struct mt76_connac_tx_resource *)skb->data;
1827 	sdio->sched.pse_data_quota = le32_to_cpu(tx_res->pse_data_quota);
1828 	sdio->sched.pse_mcu_quota = le32_to_cpu(tx_res->pse_mcu_quota);
1829 	sdio->sched.ple_data_quota = le32_to_cpu(tx_res->ple_data_quota);
1830 	sdio->sched.pse_page_size = le16_to_cpu(tx_res->pse_page_size);
1831 	sdio->sched.deficit = tx_res->pp_padding;
1832 }
1833 
mt76_connac_mcu_parse_phy_cap(struct mt76_dev * dev,struct sk_buff * skb)1834 static void mt76_connac_mcu_parse_phy_cap(struct mt76_dev *dev,
1835 					  struct sk_buff *skb)
1836 {
1837 	struct mt76_connac_phy_cap {
1838 		u8 ht;
1839 		u8 vht;
1840 		u8 _5g;
1841 		u8 max_bw;
1842 		u8 nss;
1843 		u8 dbdc;
1844 		u8 tx_ldpc;
1845 		u8 rx_ldpc;
1846 		u8 tx_stbc;
1847 		u8 rx_stbc;
1848 		u8 hw_path;
1849 		u8 he;
1850 	} __packed * cap;
1851 
1852 	enum {
1853 		WF0_24G,
1854 		WF0_5G
1855 	};
1856 
1857 	cap = (struct mt76_connac_phy_cap *)skb->data;
1858 
1859 	dev->phy.antenna_mask = BIT(cap->nss) - 1;
1860 	dev->phy.chainmask = dev->phy.antenna_mask;
1861 	dev->phy.cap.has_2ghz = cap->hw_path & BIT(WF0_24G);
1862 	dev->phy.cap.has_5ghz = cap->hw_path & BIT(WF0_5G);
1863 }
1864 
mt76_connac_mcu_get_nic_capability(struct mt76_phy * phy)1865 int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy)
1866 {
1867 	struct mt76_connac_cap_hdr {
1868 		__le16 n_element;
1869 		u8 rsv[2];
1870 	} __packed * hdr;
1871 	struct sk_buff *skb;
1872 	int ret, i;
1873 
1874 	ret = mt76_mcu_send_and_get_msg(phy->dev, MCU_CE_CMD(GET_NIC_CAPAB),
1875 					NULL, 0, true, &skb);
1876 	if (ret)
1877 		return ret;
1878 
1879 	hdr = (struct mt76_connac_cap_hdr *)skb->data;
1880 	if (skb->len < sizeof(*hdr)) {
1881 		ret = -EINVAL;
1882 		goto out;
1883 	}
1884 
1885 	skb_pull(skb, sizeof(*hdr));
1886 
1887 	for (i = 0; i < le16_to_cpu(hdr->n_element); i++) {
1888 		struct tlv_hdr {
1889 			__le32 type;
1890 			__le32 len;
1891 		} __packed * tlv = (struct tlv_hdr *)skb->data;
1892 		int len;
1893 
1894 		if (skb->len < sizeof(*tlv))
1895 			break;
1896 
1897 		skb_pull(skb, sizeof(*tlv));
1898 
1899 		len = le32_to_cpu(tlv->len);
1900 		if (skb->len < len)
1901 			break;
1902 
1903 		switch (le32_to_cpu(tlv->type)) {
1904 		case MT_NIC_CAP_6G:
1905 			phy->cap.has_6ghz = skb->data[0];
1906 			break;
1907 		case MT_NIC_CAP_MAC_ADDR:
1908 			memcpy(phy->macaddr, (void *)skb->data, ETH_ALEN);
1909 			break;
1910 		case MT_NIC_CAP_PHY:
1911 			mt76_connac_mcu_parse_phy_cap(phy->dev, skb);
1912 			break;
1913 		case MT_NIC_CAP_TX_RESOURCE:
1914 			if (mt76_is_sdio(phy->dev))
1915 				mt76_connac_mcu_parse_tx_resource(phy->dev,
1916 								  skb);
1917 			break;
1918 		default:
1919 			break;
1920 		}
1921 		skb_pull(skb, len);
1922 	}
1923 out:
1924 	dev_kfree_skb(skb);
1925 
1926 	return ret;
1927 }
1928 EXPORT_SYMBOL_GPL(mt76_connac_mcu_get_nic_capability);
1929 
1930 static void
mt76_connac_mcu_build_sku(struct mt76_dev * dev,s8 * sku,struct mt76_power_limits * limits,enum nl80211_band band)1931 mt76_connac_mcu_build_sku(struct mt76_dev *dev, s8 *sku,
1932 			  struct mt76_power_limits *limits,
1933 			  enum nl80211_band band)
1934 {
1935 	int max_power = is_mt7921(dev) ? 127 : 63;
1936 	int i, offset = sizeof(limits->cck);
1937 
1938 	memset(sku, max_power, MT_SKU_POWER_LIMIT);
1939 
1940 	if (band == NL80211_BAND_2GHZ) {
1941 		/* cck */
1942 		memcpy(sku, limits->cck, sizeof(limits->cck));
1943 	}
1944 
1945 	/* ofdm */
1946 	memcpy(&sku[offset], limits->ofdm, sizeof(limits->ofdm));
1947 	offset += sizeof(limits->ofdm);
1948 
1949 	/* ht */
1950 	for (i = 0; i < 2; i++) {
1951 		memcpy(&sku[offset], limits->mcs[i], 8);
1952 		offset += 8;
1953 	}
1954 	sku[offset++] = limits->mcs[0][0];
1955 
1956 	/* vht */
1957 	for (i = 0; i < ARRAY_SIZE(limits->mcs); i++) {
1958 		memcpy(&sku[offset], limits->mcs[i],
1959 		       ARRAY_SIZE(limits->mcs[i]));
1960 		offset += 12;
1961 	}
1962 
1963 	if (!is_mt7921(dev))
1964 		return;
1965 
1966 	/* he */
1967 	for (i = 0; i < ARRAY_SIZE(limits->ru); i++) {
1968 		memcpy(&sku[offset], limits->ru[i], ARRAY_SIZE(limits->ru[i]));
1969 		offset += ARRAY_SIZE(limits->ru[i]);
1970 	}
1971 }
1972 
mt76_connac_get_ch_power(struct mt76_phy * phy,struct ieee80211_channel * chan,s8 target_power)1973 static s8 mt76_connac_get_ch_power(struct mt76_phy *phy,
1974 				   struct ieee80211_channel *chan,
1975 				   s8 target_power)
1976 {
1977 	struct mt76_dev *dev = phy->dev;
1978 	struct ieee80211_supported_band *sband;
1979 	int i;
1980 
1981 	switch (chan->band) {
1982 	case NL80211_BAND_2GHZ:
1983 		sband = &phy->sband_2g.sband;
1984 		break;
1985 	case NL80211_BAND_5GHZ:
1986 		sband = &phy->sband_5g.sband;
1987 		break;
1988 	case NL80211_BAND_6GHZ:
1989 		sband = &phy->sband_6g.sband;
1990 		break;
1991 	default:
1992 		return target_power;
1993 	}
1994 
1995 	for (i = 0; i < sband->n_channels; i++) {
1996 		struct ieee80211_channel *ch = &sband->channels[i];
1997 
1998 		if (ch->hw_value == chan->hw_value) {
1999 			if (!(ch->flags & IEEE80211_CHAN_DISABLED)) {
2000 				int power = 2 * ch->max_reg_power;
2001 
2002 				if (is_mt7663(dev) && (power > 63 || power < -64))
2003 					power = 63;
2004 				target_power = min_t(s8, power, target_power);
2005 			}
2006 			break;
2007 		}
2008 	}
2009 
2010 	return target_power;
2011 }
2012 
2013 static int
mt76_connac_mcu_rate_txpower_band(struct mt76_phy * phy,enum nl80211_band band)2014 mt76_connac_mcu_rate_txpower_band(struct mt76_phy *phy,
2015 				  enum nl80211_band band)
2016 {
2017 	struct mt76_dev *dev = phy->dev;
2018 	int sku_len, batch_len = is_mt7921(dev) ? 8 : 16;
2019 	static const u8 chan_list_2ghz[] = {
2020 		1, 2,  3,  4,  5,  6,  7,
2021 		8, 9, 10, 11, 12, 13, 14
2022 	};
2023 	static const u8 chan_list_5ghz[] = {
2024 		 36,  38,  40,  42,  44,  46,  48,
2025 		 50,  52,  54,  56,  58,  60,  62,
2026 		 64, 100, 102, 104, 106, 108, 110,
2027 		112, 114, 116, 118, 120, 122, 124,
2028 		126, 128, 132, 134, 136, 138, 140,
2029 		142, 144, 149, 151, 153, 155, 157,
2030 		159, 161, 165
2031 	};
2032 	static const u8 chan_list_6ghz[] = {
2033 		  1,   3,   5,   7,   9,  11,  13,
2034 		 15,  17,  19,  21,  23,  25,  27,
2035 		 29,  33,  35,  37,  39,  41,  43,
2036 		 45,  47,  49,  51,  53,  55,  57,
2037 		 59,  61,  65,  67,  69,  71,  73,
2038 		 75,  77,  79,  81,  83,  85,  87,
2039 		 89,  91,  93,  97,  99, 101, 103,
2040 		105, 107, 109, 111, 113, 115, 117,
2041 		119, 121, 123, 125, 129, 131, 133,
2042 		135, 137, 139, 141, 143, 145, 147,
2043 		149, 151, 153, 155, 157, 161, 163,
2044 		165, 167, 169, 171, 173, 175, 177,
2045 		179, 181, 183, 185, 187, 189, 193,
2046 		195, 197, 199, 201, 203, 205, 207,
2047 		209, 211, 213, 215, 217, 219, 221,
2048 		225, 227, 229, 233
2049 	};
2050 	int i, n_chan, batch_size, idx = 0, tx_power, last_ch;
2051 	struct mt76_connac_sku_tlv sku_tlbv;
2052 	struct mt76_power_limits limits;
2053 	const u8 *ch_list;
2054 
2055 	sku_len = is_mt7921(dev) ? sizeof(sku_tlbv) : sizeof(sku_tlbv) - 92;
2056 	tx_power = 2 * phy->hw->conf.power_level;
2057 	if (!tx_power)
2058 		tx_power = 127;
2059 
2060 	if (band == NL80211_BAND_2GHZ) {
2061 		n_chan = ARRAY_SIZE(chan_list_2ghz);
2062 		ch_list = chan_list_2ghz;
2063 	} else if (band == NL80211_BAND_6GHZ) {
2064 		n_chan = ARRAY_SIZE(chan_list_6ghz);
2065 		ch_list = chan_list_6ghz;
2066 	} else {
2067 		n_chan = ARRAY_SIZE(chan_list_5ghz);
2068 		ch_list = chan_list_5ghz;
2069 	}
2070 	batch_size = DIV_ROUND_UP(n_chan, batch_len);
2071 
2072 	if (phy->cap.has_6ghz)
2073 		last_ch = chan_list_6ghz[ARRAY_SIZE(chan_list_6ghz) - 1];
2074 	else if (phy->cap.has_5ghz)
2075 		last_ch = chan_list_5ghz[ARRAY_SIZE(chan_list_5ghz) - 1];
2076 	else
2077 		last_ch = chan_list_2ghz[ARRAY_SIZE(chan_list_2ghz) - 1];
2078 
2079 	for (i = 0; i < batch_size; i++) {
2080 		struct mt76_connac_tx_power_limit_tlv tx_power_tlv = {};
2081 		int j, err, msg_len, num_ch;
2082 		struct sk_buff *skb;
2083 
2084 		num_ch = i == batch_size - 1 ? n_chan % batch_len : batch_len;
2085 		msg_len = sizeof(tx_power_tlv) + num_ch * sizeof(sku_tlbv);
2086 		skb = mt76_mcu_msg_alloc(dev, NULL, msg_len);
2087 		if (!skb)
2088 			return -ENOMEM;
2089 
2090 		skb_reserve(skb, sizeof(tx_power_tlv));
2091 
2092 		BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(tx_power_tlv.alpha2));
2093 		memcpy(tx_power_tlv.alpha2, dev->alpha2, sizeof(dev->alpha2));
2094 		tx_power_tlv.n_chan = num_ch;
2095 
2096 		switch (band) {
2097 		case NL80211_BAND_2GHZ:
2098 			tx_power_tlv.band = 1;
2099 			break;
2100 		case NL80211_BAND_6GHZ:
2101 			tx_power_tlv.band = 3;
2102 			break;
2103 		default:
2104 			tx_power_tlv.band = 2;
2105 			break;
2106 		}
2107 
2108 		for (j = 0; j < num_ch; j++, idx++) {
2109 			struct ieee80211_channel chan = {
2110 				.hw_value = ch_list[idx],
2111 				.band = band,
2112 			};
2113 			s8 reg_power, sar_power;
2114 
2115 			reg_power = mt76_connac_get_ch_power(phy, &chan,
2116 							     tx_power);
2117 			sar_power = mt76_get_sar_power(phy, &chan, reg_power);
2118 
2119 			mt76_get_rate_power_limits(phy, &chan, &limits,
2120 						   sar_power);
2121 
2122 			tx_power_tlv.last_msg = ch_list[idx] == last_ch;
2123 			sku_tlbv.channel = ch_list[idx];
2124 
2125 			mt76_connac_mcu_build_sku(dev, sku_tlbv.pwr_limit,
2126 						  &limits, band);
2127 			skb_put_data(skb, &sku_tlbv, sku_len);
2128 		}
2129 		__skb_push(skb, sizeof(tx_power_tlv));
2130 		memcpy(skb->data, &tx_power_tlv, sizeof(tx_power_tlv));
2131 
2132 		err = mt76_mcu_skb_send_msg(dev, skb,
2133 					    MCU_CE_CMD(SET_RATE_TX_POWER),
2134 					    false);
2135 		if (err < 0)
2136 			return err;
2137 	}
2138 
2139 	return 0;
2140 }
2141 
mt76_connac_mcu_set_rate_txpower(struct mt76_phy * phy)2142 int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy)
2143 {
2144 	int err;
2145 
2146 	if (phy->cap.has_2ghz) {
2147 		err = mt76_connac_mcu_rate_txpower_band(phy,
2148 							NL80211_BAND_2GHZ);
2149 		if (err < 0)
2150 			return err;
2151 	}
2152 	if (phy->cap.has_5ghz) {
2153 		err = mt76_connac_mcu_rate_txpower_band(phy,
2154 							NL80211_BAND_5GHZ);
2155 		if (err < 0)
2156 			return err;
2157 	}
2158 	if (phy->cap.has_6ghz) {
2159 		err = mt76_connac_mcu_rate_txpower_band(phy,
2160 							NL80211_BAND_6GHZ);
2161 		if (err < 0)
2162 			return err;
2163 	}
2164 
2165 	return 0;
2166 }
2167 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rate_txpower);
2168 
mt76_connac_mcu_update_arp_filter(struct mt76_dev * dev,struct mt76_vif * vif,struct ieee80211_bss_conf * info)2169 int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev,
2170 				      struct mt76_vif *vif,
2171 				      struct ieee80211_bss_conf *info)
2172 {
2173 	struct ieee80211_vif *mvif = container_of(info, struct ieee80211_vif,
2174 						  bss_conf);
2175 	struct sk_buff *skb;
2176 	int i, len = min_t(int, mvif->cfg.arp_addr_cnt,
2177 			   IEEE80211_BSS_ARP_ADDR_LIST_LEN);
2178 	struct {
2179 		struct {
2180 			u8 bss_idx;
2181 			u8 pad[3];
2182 		} __packed hdr;
2183 		struct mt76_connac_arpns_tlv arp;
2184 	} req_hdr = {
2185 		.hdr = {
2186 			.bss_idx = vif->idx,
2187 		},
2188 		.arp = {
2189 			.tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP),
2190 			.len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)),
2191 			.ips_num = len,
2192 			.mode = 2,  /* update */
2193 			.option = 1,
2194 		},
2195 	};
2196 
2197 	skb = mt76_mcu_msg_alloc(dev, NULL,
2198 				 sizeof(req_hdr) + len * sizeof(__be32));
2199 	if (!skb)
2200 		return -ENOMEM;
2201 
2202 	skb_put_data(skb, &req_hdr, sizeof(req_hdr));
2203 	for (i = 0; i < len; i++)
2204 		skb_put_data(skb, &mvif->cfg.arp_addr_list[i], sizeof(__be32));
2205 
2206 	return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(OFFLOAD), true);
2207 }
2208 EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_arp_filter);
2209 
mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw * hw,struct ieee80211_vif * vif)2210 int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw,
2211 				  struct ieee80211_vif *vif)
2212 {
2213 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2214 	int ct_window = vif->bss_conf.p2p_noa_attr.oppps_ctwindow;
2215 	struct mt76_phy *phy = hw->priv;
2216 	struct {
2217 		__le32 ct_win;
2218 		u8 bss_idx;
2219 		u8 rsv[3];
2220 	} __packed req = {
2221 		.ct_win = cpu_to_le32(ct_window),
2222 		.bss_idx = mvif->idx,
2223 	};
2224 
2225 	return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SET_P2P_OPPPS),
2226 				 &req, sizeof(req), false);
2227 }
2228 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_p2p_oppps);
2229 
2230 #ifdef CONFIG_PM
2231 
2232 const struct wiphy_wowlan_support mt76_connac_wowlan_support = {
2233 	.flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT |
2234 		 WIPHY_WOWLAN_SUPPORTS_GTK_REKEY | WIPHY_WOWLAN_NET_DETECT,
2235 	.n_patterns = 1,
2236 	.pattern_min_len = 1,
2237 	.pattern_max_len = MT76_CONNAC_WOW_PATTEN_MAX_LEN,
2238 	.max_nd_match_sets = 10,
2239 };
2240 EXPORT_SYMBOL_GPL(mt76_connac_wowlan_support);
2241 
2242 static void
mt76_connac_mcu_key_iter(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key,void * data)2243 mt76_connac_mcu_key_iter(struct ieee80211_hw *hw,
2244 			 struct ieee80211_vif *vif,
2245 			 struct ieee80211_sta *sta,
2246 			 struct ieee80211_key_conf *key,
2247 			 void *data)
2248 {
2249 	struct mt76_connac_gtk_rekey_tlv *gtk_tlv = data;
2250 	u32 cipher;
2251 
2252 	if (key->cipher != WLAN_CIPHER_SUITE_AES_CMAC &&
2253 	    key->cipher != WLAN_CIPHER_SUITE_CCMP &&
2254 	    key->cipher != WLAN_CIPHER_SUITE_TKIP)
2255 		return;
2256 
2257 	if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
2258 		cipher = BIT(3);
2259 	else
2260 		cipher = BIT(4);
2261 
2262 	/* we are assuming here to have a single pairwise key */
2263 	if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) {
2264 		if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
2265 			gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_1);
2266 		else
2267 			gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_2);
2268 
2269 		gtk_tlv->pairwise_cipher = cpu_to_le32(cipher);
2270 		gtk_tlv->keyid = key->keyidx;
2271 	} else {
2272 		gtk_tlv->group_cipher = cpu_to_le32(cipher);
2273 	}
2274 }
2275 
mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct cfg80211_gtk_rekey_data * key)2276 int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw,
2277 				     struct ieee80211_vif *vif,
2278 				     struct cfg80211_gtk_rekey_data *key)
2279 {
2280 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2281 	struct mt76_connac_gtk_rekey_tlv *gtk_tlv;
2282 	struct mt76_phy *phy = hw->priv;
2283 	struct sk_buff *skb;
2284 	struct {
2285 		u8 bss_idx;
2286 		u8 pad[3];
2287 	} __packed hdr = {
2288 		.bss_idx = mvif->idx,
2289 	};
2290 
2291 	skb = mt76_mcu_msg_alloc(phy->dev, NULL,
2292 				 sizeof(hdr) + sizeof(*gtk_tlv));
2293 	if (!skb)
2294 		return -ENOMEM;
2295 
2296 	skb_put_data(skb, &hdr, sizeof(hdr));
2297 	gtk_tlv = (struct mt76_connac_gtk_rekey_tlv *)skb_put(skb,
2298 							 sizeof(*gtk_tlv));
2299 	gtk_tlv->tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY);
2300 	gtk_tlv->len = cpu_to_le16(sizeof(*gtk_tlv));
2301 	gtk_tlv->rekey_mode = 2;
2302 	gtk_tlv->option = 1;
2303 
2304 	rcu_read_lock();
2305 	ieee80211_iter_keys_rcu(hw, vif, mt76_connac_mcu_key_iter, gtk_tlv);
2306 	rcu_read_unlock();
2307 
2308 	memcpy(gtk_tlv->kek, key->kek, NL80211_KEK_LEN);
2309 	memcpy(gtk_tlv->kck, key->kck, NL80211_KCK_LEN);
2310 	memcpy(gtk_tlv->replay_ctr, key->replay_ctr, NL80211_REPLAY_CTR_LEN);
2311 
2312 	return mt76_mcu_skb_send_msg(phy->dev, skb,
2313 				     MCU_UNI_CMD(OFFLOAD), true);
2314 }
2315 EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_gtk_rekey);
2316 
2317 static int
mt76_connac_mcu_set_arp_filter(struct mt76_dev * dev,struct ieee80211_vif * vif,bool suspend)2318 mt76_connac_mcu_set_arp_filter(struct mt76_dev *dev, struct ieee80211_vif *vif,
2319 			       bool suspend)
2320 {
2321 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2322 	struct {
2323 		struct {
2324 			u8 bss_idx;
2325 			u8 pad[3];
2326 		} __packed hdr;
2327 		struct mt76_connac_arpns_tlv arpns;
2328 	} req = {
2329 		.hdr = {
2330 			.bss_idx = mvif->idx,
2331 		},
2332 		.arpns = {
2333 			.tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP),
2334 			.len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)),
2335 			.mode = suspend,
2336 		},
2337 	};
2338 
2339 	return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req,
2340 				 sizeof(req), true);
2341 }
2342 
2343 static int
mt76_connac_mcu_set_gtk_rekey(struct mt76_dev * dev,struct ieee80211_vif * vif,bool suspend)2344 mt76_connac_mcu_set_gtk_rekey(struct mt76_dev *dev, struct ieee80211_vif *vif,
2345 			      bool suspend)
2346 {
2347 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2348 	struct {
2349 		struct {
2350 			u8 bss_idx;
2351 			u8 pad[3];
2352 		} __packed hdr;
2353 		struct mt76_connac_gtk_rekey_tlv gtk_tlv;
2354 	} __packed req = {
2355 		.hdr = {
2356 			.bss_idx = mvif->idx,
2357 		},
2358 		.gtk_tlv = {
2359 			.tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY),
2360 			.len = cpu_to_le16(sizeof(struct mt76_connac_gtk_rekey_tlv)),
2361 			.rekey_mode = !suspend,
2362 		},
2363 	};
2364 
2365 	return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req,
2366 				 sizeof(req), true);
2367 }
2368 
2369 static int
mt76_connac_mcu_set_suspend_mode(struct mt76_dev * dev,struct ieee80211_vif * vif,bool enable,u8 mdtim,bool wow_suspend)2370 mt76_connac_mcu_set_suspend_mode(struct mt76_dev *dev,
2371 				 struct ieee80211_vif *vif,
2372 				 bool enable, u8 mdtim,
2373 				 bool wow_suspend)
2374 {
2375 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2376 	struct {
2377 		struct {
2378 			u8 bss_idx;
2379 			u8 pad[3];
2380 		} __packed hdr;
2381 		struct mt76_connac_suspend_tlv suspend_tlv;
2382 	} req = {
2383 		.hdr = {
2384 			.bss_idx = mvif->idx,
2385 		},
2386 		.suspend_tlv = {
2387 			.tag = cpu_to_le16(UNI_SUSPEND_MODE_SETTING),
2388 			.len = cpu_to_le16(sizeof(struct mt76_connac_suspend_tlv)),
2389 			.enable = enable,
2390 			.mdtim = mdtim,
2391 			.wow_suspend = wow_suspend,
2392 		},
2393 	};
2394 
2395 	return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req,
2396 				 sizeof(req), true);
2397 }
2398 
2399 static int
mt76_connac_mcu_set_wow_pattern(struct mt76_dev * dev,struct ieee80211_vif * vif,u8 index,bool enable,struct cfg80211_pkt_pattern * pattern)2400 mt76_connac_mcu_set_wow_pattern(struct mt76_dev *dev,
2401 				struct ieee80211_vif *vif,
2402 				u8 index, bool enable,
2403 				struct cfg80211_pkt_pattern *pattern)
2404 {
2405 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2406 	struct mt76_connac_wow_pattern_tlv *ptlv;
2407 	struct sk_buff *skb;
2408 	struct req_hdr {
2409 		u8 bss_idx;
2410 		u8 pad[3];
2411 	} __packed hdr = {
2412 		.bss_idx = mvif->idx,
2413 	};
2414 
2415 	skb = mt76_mcu_msg_alloc(dev, NULL, sizeof(hdr) + sizeof(*ptlv));
2416 	if (!skb)
2417 		return -ENOMEM;
2418 
2419 	skb_put_data(skb, &hdr, sizeof(hdr));
2420 	ptlv = (struct mt76_connac_wow_pattern_tlv *)skb_put(skb, sizeof(*ptlv));
2421 	ptlv->tag = cpu_to_le16(UNI_SUSPEND_WOW_PATTERN);
2422 	ptlv->len = cpu_to_le16(sizeof(*ptlv));
2423 	ptlv->data_len = pattern->pattern_len;
2424 	ptlv->enable = enable;
2425 	ptlv->index = index;
2426 
2427 	memcpy(ptlv->pattern, pattern->pattern, pattern->pattern_len);
2428 	memcpy(ptlv->mask, pattern->mask, DIV_ROUND_UP(pattern->pattern_len, 8));
2429 
2430 	return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(SUSPEND), true);
2431 }
2432 
2433 static int
mt76_connac_mcu_set_wow_ctrl(struct mt76_phy * phy,struct ieee80211_vif * vif,bool suspend,struct cfg80211_wowlan * wowlan)2434 mt76_connac_mcu_set_wow_ctrl(struct mt76_phy *phy, struct ieee80211_vif *vif,
2435 			     bool suspend, struct cfg80211_wowlan *wowlan)
2436 {
2437 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2438 	struct mt76_dev *dev = phy->dev;
2439 	struct {
2440 		struct {
2441 			u8 bss_idx;
2442 			u8 pad[3];
2443 		} __packed hdr;
2444 		struct mt76_connac_wow_ctrl_tlv wow_ctrl_tlv;
2445 		struct mt76_connac_wow_gpio_param_tlv gpio_tlv;
2446 	} req = {
2447 		.hdr = {
2448 			.bss_idx = mvif->idx,
2449 		},
2450 		.wow_ctrl_tlv = {
2451 			.tag = cpu_to_le16(UNI_SUSPEND_WOW_CTRL),
2452 			.len = cpu_to_le16(sizeof(struct mt76_connac_wow_ctrl_tlv)),
2453 			.cmd = suspend ? 1 : 2,
2454 		},
2455 		.gpio_tlv = {
2456 			.tag = cpu_to_le16(UNI_SUSPEND_WOW_GPIO_PARAM),
2457 			.len = cpu_to_le16(sizeof(struct mt76_connac_wow_gpio_param_tlv)),
2458 			.gpio_pin = 0xff, /* follow fw about GPIO pin */
2459 		},
2460 	};
2461 
2462 	if (wowlan->magic_pkt)
2463 		req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_MAGIC;
2464 	if (wowlan->disconnect)
2465 		req.wow_ctrl_tlv.trigger |= (UNI_WOW_DETECT_TYPE_DISCONNECT |
2466 					     UNI_WOW_DETECT_TYPE_BCN_LOST);
2467 	if (wowlan->nd_config) {
2468 		mt76_connac_mcu_sched_scan_req(phy, vif, wowlan->nd_config);
2469 		req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT;
2470 		mt76_connac_mcu_sched_scan_enable(phy, vif, suspend);
2471 	}
2472 	if (wowlan->n_patterns)
2473 		req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_BITMAP;
2474 
2475 	if (mt76_is_mmio(dev))
2476 		req.wow_ctrl_tlv.wakeup_hif = WOW_PCIE;
2477 	else if (mt76_is_usb(dev))
2478 		req.wow_ctrl_tlv.wakeup_hif = WOW_USB;
2479 	else if (mt76_is_sdio(dev))
2480 		req.wow_ctrl_tlv.wakeup_hif = WOW_GPIO;
2481 
2482 	return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req,
2483 				 sizeof(req), true);
2484 }
2485 
mt76_connac_mcu_set_hif_suspend(struct mt76_dev * dev,bool suspend)2486 int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend)
2487 {
2488 	struct {
2489 		struct {
2490 			u8 hif_type; /* 0x0: HIF_SDIO
2491 				      * 0x1: HIF_USB
2492 				      * 0x2: HIF_PCIE
2493 				      */
2494 			u8 pad[3];
2495 		} __packed hdr;
2496 		struct hif_suspend_tlv {
2497 			__le16 tag;
2498 			__le16 len;
2499 			u8 suspend;
2500 		} __packed hif_suspend;
2501 	} req = {
2502 		.hif_suspend = {
2503 			.tag = cpu_to_le16(0), /* 0: UNI_HIF_CTRL_BASIC */
2504 			.len = cpu_to_le16(sizeof(struct hif_suspend_tlv)),
2505 			.suspend = suspend,
2506 		},
2507 	};
2508 
2509 	if (mt76_is_mmio(dev))
2510 		req.hdr.hif_type = 2;
2511 	else if (mt76_is_usb(dev))
2512 		req.hdr.hif_type = 1;
2513 	else if (mt76_is_sdio(dev))
2514 		req.hdr.hif_type = 0;
2515 
2516 	return mt76_mcu_send_msg(dev, MCU_UNI_CMD(HIF_CTRL), &req,
2517 				 sizeof(req), true);
2518 }
2519 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_hif_suspend);
2520 
mt76_connac_mcu_set_suspend_iter(void * priv,u8 * mac,struct ieee80211_vif * vif)2521 void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac,
2522 				      struct ieee80211_vif *vif)
2523 {
2524 	struct mt76_phy *phy = priv;
2525 	bool suspend = !test_bit(MT76_STATE_RUNNING, &phy->state);
2526 	struct ieee80211_hw *hw = phy->hw;
2527 	struct cfg80211_wowlan *wowlan = hw->wiphy->wowlan_config;
2528 	int i;
2529 
2530 	mt76_connac_mcu_set_gtk_rekey(phy->dev, vif, suspend);
2531 	mt76_connac_mcu_set_arp_filter(phy->dev, vif, suspend);
2532 
2533 	mt76_connac_mcu_set_suspend_mode(phy->dev, vif, suspend, 1, true);
2534 
2535 	for (i = 0; i < wowlan->n_patterns; i++)
2536 		mt76_connac_mcu_set_wow_pattern(phy->dev, vif, i, suspend,
2537 						&wowlan->patterns[i]);
2538 	mt76_connac_mcu_set_wow_ctrl(phy, vif, suspend, wowlan);
2539 }
2540 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_suspend_iter);
2541 #endif /* CONFIG_PM */
2542 
mt76_connac_mcu_reg_rr(struct mt76_dev * dev,u32 offset)2543 u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset)
2544 {
2545 	struct {
2546 		__le32 addr;
2547 		__le32 val;
2548 	} __packed req = {
2549 		.addr = cpu_to_le32(offset),
2550 	};
2551 
2552 	return mt76_mcu_send_msg(dev, MCU_CE_QUERY(REG_READ), &req,
2553 				 sizeof(req), true);
2554 }
2555 EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_rr);
2556 
mt76_connac_mcu_reg_wr(struct mt76_dev * dev,u32 offset,u32 val)2557 void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val)
2558 {
2559 	struct {
2560 		__le32 addr;
2561 		__le32 val;
2562 	} __packed req = {
2563 		.addr = cpu_to_le32(offset),
2564 		.val = cpu_to_le32(val),
2565 	};
2566 
2567 	mt76_mcu_send_msg(dev, MCU_CE_CMD(REG_WRITE), &req,
2568 			  sizeof(req), false);
2569 }
2570 EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_wr);
2571 
2572 static int
mt76_connac_mcu_sta_key_tlv(struct mt76_connac_sta_key_conf * sta_key_conf,struct sk_buff * skb,struct ieee80211_key_conf * key,enum set_key_cmd cmd)2573 mt76_connac_mcu_sta_key_tlv(struct mt76_connac_sta_key_conf *sta_key_conf,
2574 			    struct sk_buff *skb,
2575 			    struct ieee80211_key_conf *key,
2576 			    enum set_key_cmd cmd)
2577 {
2578 	struct sta_rec_sec *sec;
2579 	u32 len = sizeof(*sec);
2580 	struct tlv *tlv;
2581 
2582 	tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec));
2583 	sec = (struct sta_rec_sec *)tlv;
2584 	sec->add = cmd;
2585 
2586 	if (cmd == SET_KEY) {
2587 		struct sec_key *sec_key;
2588 		u8 cipher;
2589 
2590 		cipher = mt76_connac_mcu_get_cipher(key->cipher);
2591 		if (cipher == MCU_CIPHER_NONE)
2592 			return -EOPNOTSUPP;
2593 
2594 		sec_key = &sec->key[0];
2595 		sec_key->cipher_len = sizeof(*sec_key);
2596 
2597 		if (cipher == MCU_CIPHER_BIP_CMAC_128) {
2598 			sec_key->cipher_id = MCU_CIPHER_AES_CCMP;
2599 			sec_key->key_id = sta_key_conf->keyidx;
2600 			sec_key->key_len = 16;
2601 			memcpy(sec_key->key, sta_key_conf->key, 16);
2602 
2603 			sec_key = &sec->key[1];
2604 			sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128;
2605 			sec_key->cipher_len = sizeof(*sec_key);
2606 			sec_key->key_len = 16;
2607 			memcpy(sec_key->key, key->key, 16);
2608 			sec->n_cipher = 2;
2609 		} else {
2610 			sec_key->cipher_id = cipher;
2611 			sec_key->key_id = key->keyidx;
2612 			sec_key->key_len = key->keylen;
2613 			memcpy(sec_key->key, key->key, key->keylen);
2614 
2615 			if (cipher == MCU_CIPHER_TKIP) {
2616 				/* Rx/Tx MIC keys are swapped */
2617 				memcpy(sec_key->key + 16, key->key + 24, 8);
2618 				memcpy(sec_key->key + 24, key->key + 16, 8);
2619 			}
2620 
2621 			/* store key_conf for BIP batch update */
2622 			if (cipher == MCU_CIPHER_AES_CCMP) {
2623 				memcpy(sta_key_conf->key, key->key, key->keylen);
2624 				sta_key_conf->keyidx = key->keyidx;
2625 			}
2626 
2627 			len -= sizeof(*sec_key);
2628 			sec->n_cipher = 1;
2629 		}
2630 	} else {
2631 		len -= sizeof(sec->key);
2632 		sec->n_cipher = 0;
2633 	}
2634 	sec->len = cpu_to_le16(len);
2635 
2636 	return 0;
2637 }
2638 
mt76_connac_mcu_add_key(struct mt76_dev * dev,struct ieee80211_vif * vif,struct mt76_connac_sta_key_conf * sta_key_conf,struct ieee80211_key_conf * key,int mcu_cmd,struct mt76_wcid * wcid,enum set_key_cmd cmd)2639 int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,
2640 			    struct mt76_connac_sta_key_conf *sta_key_conf,
2641 			    struct ieee80211_key_conf *key, int mcu_cmd,
2642 			    struct mt76_wcid *wcid, enum set_key_cmd cmd)
2643 {
2644 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2645 	struct sk_buff *skb;
2646 	int ret;
2647 
2648 	skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
2649 	if (IS_ERR(skb))
2650 		return PTR_ERR(skb);
2651 
2652 	ret = mt76_connac_mcu_sta_key_tlv(sta_key_conf, skb, key, cmd);
2653 	if (ret)
2654 		return ret;
2655 
2656 	return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true);
2657 }
2658 EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_key);
2659 
2660 /* SIFS 20us + 512 byte beacon transmitted by 1Mbps (3906us) */
2661 #define BCN_TX_ESTIMATE_TIME (4096 + 20)
mt76_connac_mcu_bss_ext_tlv(struct sk_buff * skb,struct mt76_vif * mvif)2662 void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif)
2663 {
2664 	struct bss_info_ext_bss *ext;
2665 	int ext_bss_idx, tsf_offset;
2666 	struct tlv *tlv;
2667 
2668 	ext_bss_idx = mvif->omac_idx - EXT_BSSID_START;
2669 	if (ext_bss_idx < 0)
2670 		return;
2671 
2672 	tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_EXT_BSS, sizeof(*ext));
2673 
2674 	ext = (struct bss_info_ext_bss *)tlv;
2675 	tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME;
2676 	ext->mbss_tsf_offset = cpu_to_le32(tsf_offset);
2677 }
2678 EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_ext_tlv);
2679 
mt76_connac_mcu_bss_basic_tlv(struct sk_buff * skb,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct mt76_phy * phy,u16 wlan_idx,bool enable)2680 int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb,
2681 				  struct ieee80211_vif *vif,
2682 				  struct ieee80211_sta *sta,
2683 				  struct mt76_phy *phy, u16 wlan_idx,
2684 				  bool enable)
2685 {
2686 	struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2687 	u32 type = vif->p2p ? NETWORK_P2P : NETWORK_INFRA;
2688 	struct bss_info_basic *bss;
2689 	struct tlv *tlv;
2690 
2691 	tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss));
2692 	bss = (struct bss_info_basic *)tlv;
2693 
2694 	switch (vif->type) {
2695 	case NL80211_IFTYPE_MESH_POINT:
2696 	case NL80211_IFTYPE_MONITOR:
2697 		break;
2698 	case NL80211_IFTYPE_AP:
2699 		if (ieee80211_hw_check(phy->hw, SUPPORTS_MULTI_BSSID)) {
2700 			u8 bssid_id = vif->bss_conf.bssid_indicator;
2701 			struct wiphy *wiphy = phy->hw->wiphy;
2702 
2703 			if (bssid_id > ilog2(wiphy->mbssid_max_interfaces))
2704 				return -EINVAL;
2705 
2706 			bss->non_tx_bssid = vif->bss_conf.bssid_index;
2707 			bss->max_bssid = bssid_id;
2708 		}
2709 		break;
2710 	case NL80211_IFTYPE_STATION:
2711 		if (enable) {
2712 			rcu_read_lock();
2713 			if (!sta)
2714 				sta = ieee80211_find_sta(vif,
2715 							 vif->bss_conf.bssid);
2716 			/* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */
2717 			if (sta) {
2718 				struct mt76_wcid *wcid;
2719 
2720 				wcid = (struct mt76_wcid *)sta->drv_priv;
2721 				wlan_idx = wcid->idx;
2722 			}
2723 			rcu_read_unlock();
2724 		}
2725 		break;
2726 	case NL80211_IFTYPE_ADHOC:
2727 		type = NETWORK_IBSS;
2728 		break;
2729 	default:
2730 		WARN_ON(1);
2731 		break;
2732 	}
2733 
2734 	bss->network_type = cpu_to_le32(type);
2735 	bss->bmc_wcid_lo = to_wcid_lo(wlan_idx);
2736 	bss->bmc_wcid_hi = to_wcid_hi(wlan_idx);
2737 	bss->wmm_idx = mvif->wmm_idx;
2738 	bss->active = enable;
2739 	bss->cipher = mvif->cipher;
2740 
2741 	if (vif->type != NL80211_IFTYPE_MONITOR) {
2742 		struct cfg80211_chan_def *chandef = &phy->chandef;
2743 
2744 		memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN);
2745 		bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int);
2746 		bss->dtim_period = vif->bss_conf.dtim_period;
2747 		bss->phy_mode = mt76_connac_get_phy_mode(phy, vif,
2748 							 chandef->chan->band, NULL);
2749 	} else {
2750 		memcpy(bss->bssid, phy->macaddr, ETH_ALEN);
2751 	}
2752 
2753 	return 0;
2754 }
2755 EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_basic_tlv);
2756 
2757 #define ENTER_PM_STATE		1
2758 #define EXIT_PM_STATE		2
mt76_connac_mcu_set_pm(struct mt76_dev * dev,int band,int enter)2759 int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter)
2760 {
2761 	struct {
2762 		u8 pm_number;
2763 		u8 pm_state;
2764 		u8 bssid[ETH_ALEN];
2765 		u8 dtim_period;
2766 		u8 wlan_idx_lo;
2767 		__le16 bcn_interval;
2768 		__le32 aid;
2769 		__le32 rx_filter;
2770 		u8 band_idx;
2771 		u8 wlan_idx_hi;
2772 		u8 rsv[2];
2773 		__le32 feature;
2774 		u8 omac_idx;
2775 		u8 wmm_idx;
2776 		u8 bcn_loss_cnt;
2777 		u8 bcn_sp_duration;
2778 	} __packed req = {
2779 		.pm_number = 5,
2780 		.pm_state = enter ? ENTER_PM_STATE : EXIT_PM_STATE,
2781 		.band_idx = band,
2782 	};
2783 
2784 	return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PM_STATE_CTRL), &req,
2785 				 sizeof(req), true);
2786 }
2787 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_pm);
2788 
mt76_connac_mcu_restart(struct mt76_dev * dev)2789 int mt76_connac_mcu_restart(struct mt76_dev *dev)
2790 {
2791 	struct {
2792 		u8 power_mode;
2793 		u8 rsv[3];
2794 	} req = {
2795 		.power_mode = 1,
2796 	};
2797 
2798 	return mt76_mcu_send_msg(dev, MCU_CMD(NIC_POWER_CTRL), &req,
2799 				 sizeof(req), false);
2800 }
2801 EXPORT_SYMBOL_GPL(mt76_connac_mcu_restart);
2802 
mt76_connac_mcu_rdd_cmd(struct mt76_dev * dev,int cmd,u8 index,u8 rx_sel,u8 val)2803 int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index,
2804 			    u8 rx_sel, u8 val)
2805 {
2806 	struct {
2807 		u8 ctrl;
2808 		u8 rdd_idx;
2809 		u8 rdd_rx_sel;
2810 		u8 val;
2811 		u8 rsv[4];
2812 	} __packed req = {
2813 		.ctrl = cmd,
2814 		.rdd_idx = index,
2815 		.rdd_rx_sel = rx_sel,
2816 		.val = val,
2817 	};
2818 
2819 	return mt76_mcu_send_msg(dev, MCU_EXT_CMD(SET_RDD_CTRL), &req,
2820 				 sizeof(req), true);
2821 }
2822 EXPORT_SYMBOL_GPL(mt76_connac_mcu_rdd_cmd);
2823 
2824 static int
mt76_connac_mcu_send_ram_firmware(struct mt76_dev * dev,const struct mt76_connac2_fw_trailer * hdr,const u8 * data,bool is_wa)2825 mt76_connac_mcu_send_ram_firmware(struct mt76_dev *dev,
2826 				  const struct mt76_connac2_fw_trailer *hdr,
2827 				  const u8 *data, bool is_wa)
2828 {
2829 	int i, offset = 0, max_len = mt76_is_sdio(dev) ? 2048 : 4096;
2830 	u32 override = 0, option = 0;
2831 
2832 	for (i = 0; i < hdr->n_region; i++) {
2833 		const struct mt76_connac2_fw_region *region;
2834 		u32 len, addr, mode;
2835 		int err;
2836 
2837 		region = (const void *)((const u8 *)hdr -
2838 					(hdr->n_region - i) * sizeof(*region));
2839 		mode = mt76_connac_mcu_gen_dl_mode(dev, region->feature_set,
2840 						   is_wa);
2841 		len = le32_to_cpu(region->len);
2842 		addr = le32_to_cpu(region->addr);
2843 
2844 		if (region->feature_set & FW_FEATURE_NON_DL)
2845 			goto next;
2846 
2847 		if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR)
2848 			override = addr;
2849 
2850 		err = mt76_connac_mcu_init_download(dev, addr, len, mode);
2851 		if (err) {
2852 			dev_err(dev->dev, "Download request failed\n");
2853 			return err;
2854 		}
2855 
2856 		err = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER),
2857 					       data + offset, len, max_len);
2858 		if (err) {
2859 			dev_err(dev->dev, "Failed to send firmware.\n");
2860 			return err;
2861 		}
2862 
2863 next:
2864 		offset += len;
2865 	}
2866 
2867 	if (override)
2868 		option |= FW_START_OVERRIDE;
2869 	if (is_wa)
2870 		option |= FW_START_WORKING_PDA_CR4;
2871 
2872 	return mt76_connac_mcu_start_firmware(dev, override, option);
2873 }
2874 
mt76_connac2_load_ram(struct mt76_dev * dev,const char * fw_wm,const char * fw_wa)2875 int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm,
2876 			  const char *fw_wa)
2877 {
2878 	const struct mt76_connac2_fw_trailer *hdr;
2879 	const struct firmware *fw;
2880 	int ret;
2881 
2882 	ret = request_firmware(&fw, fw_wm, dev->dev);
2883 	if (ret)
2884 		return ret;
2885 
2886 	if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2887 		dev_err(dev->dev, "Invalid firmware\n");
2888 		ret = -EINVAL;
2889 		goto out;
2890 	}
2891 
2892 	hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
2893 	dev_info(dev->dev, "WM Firmware Version: %.10s, Build Time: %.15s\n",
2894 		 hdr->fw_ver, hdr->build_date);
2895 
2896 	ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, false);
2897 	if (ret) {
2898 		dev_err(dev->dev, "Failed to start WM firmware\n");
2899 		goto out;
2900 	}
2901 
2902 	snprintf(dev->hw->wiphy->fw_version,
2903 		 sizeof(dev->hw->wiphy->fw_version),
2904 		 "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
2905 
2906 	release_firmware(fw);
2907 
2908 	if (!fw_wa)
2909 		return 0;
2910 
2911 	ret = request_firmware(&fw, fw_wa, dev->dev);
2912 	if (ret)
2913 		return ret;
2914 
2915 	if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2916 		dev_err(dev->dev, "Invalid firmware\n");
2917 		ret = -EINVAL;
2918 		goto out;
2919 	}
2920 
2921 	hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
2922 	dev_info(dev->dev, "WA Firmware Version: %.10s, Build Time: %.15s\n",
2923 		 hdr->fw_ver, hdr->build_date);
2924 
2925 	ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, true);
2926 	if (ret) {
2927 		dev_err(dev->dev, "Failed to start WA firmware\n");
2928 		goto out;
2929 	}
2930 
2931 	snprintf(dev->hw->wiphy->fw_version,
2932 		 sizeof(dev->hw->wiphy->fw_version),
2933 		 "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
2934 
2935 out:
2936 	release_firmware(fw);
2937 
2938 	return ret;
2939 }
2940 EXPORT_SYMBOL_GPL(mt76_connac2_load_ram);
2941 
mt76_connac2_get_data_mode(struct mt76_dev * dev,u32 info)2942 static u32 mt76_connac2_get_data_mode(struct mt76_dev *dev, u32 info)
2943 {
2944 	u32 mode = DL_MODE_NEED_RSP;
2945 
2946 	if (!is_mt7921(dev) || info == PATCH_SEC_NOT_SUPPORT)
2947 		return mode;
2948 
2949 	switch (FIELD_GET(PATCH_SEC_ENC_TYPE_MASK, info)) {
2950 	case PATCH_SEC_ENC_TYPE_PLAIN:
2951 		break;
2952 	case PATCH_SEC_ENC_TYPE_AES:
2953 		mode |= DL_MODE_ENCRYPT;
2954 		mode |= FIELD_PREP(DL_MODE_KEY_IDX,
2955 				(info & PATCH_SEC_ENC_AES_KEY_MASK)) & DL_MODE_KEY_IDX;
2956 		mode |= DL_MODE_RESET_SEC_IV;
2957 		break;
2958 	case PATCH_SEC_ENC_TYPE_SCRAMBLE:
2959 		mode |= DL_MODE_ENCRYPT;
2960 		mode |= DL_CONFIG_ENCRY_MODE_SEL;
2961 		mode |= DL_MODE_RESET_SEC_IV;
2962 		break;
2963 	default:
2964 		dev_err(dev->dev, "Encryption type not support!\n");
2965 	}
2966 
2967 	return mode;
2968 }
2969 
mt76_connac2_load_patch(struct mt76_dev * dev,const char * fw_name)2970 int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name)
2971 {
2972 	int i, ret, sem, max_len = mt76_is_sdio(dev) ? 2048 : 4096;
2973 	const struct mt76_connac2_patch_hdr *hdr;
2974 	const struct firmware *fw = NULL;
2975 
2976 	sem = mt76_connac_mcu_patch_sem_ctrl(dev, true);
2977 	switch (sem) {
2978 	case PATCH_IS_DL:
2979 		return 0;
2980 	case PATCH_NOT_DL_SEM_SUCCESS:
2981 		break;
2982 	default:
2983 		dev_err(dev->dev, "Failed to get patch semaphore\n");
2984 		return -EAGAIN;
2985 	}
2986 
2987 	ret = request_firmware(&fw, fw_name, dev->dev);
2988 	if (ret)
2989 		goto out;
2990 
2991 	if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2992 		dev_err(dev->dev, "Invalid firmware\n");
2993 		ret = -EINVAL;
2994 		goto out;
2995 	}
2996 
2997 	hdr = (const void *)fw->data;
2998 	dev_info(dev->dev, "HW/SW Version: 0x%x, Build Time: %.16s\n",
2999 		 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date);
3000 
3001 	for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) {
3002 		struct mt76_connac2_patch_sec *sec;
3003 		u32 len, addr, mode;
3004 		const u8 *dl;
3005 		u32 sec_info;
3006 
3007 		sec = (void *)(fw->data + sizeof(*hdr) + i * sizeof(*sec));
3008 		if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) !=
3009 		    PATCH_SEC_TYPE_INFO) {
3010 			ret = -EINVAL;
3011 			goto out;
3012 		}
3013 
3014 		addr = be32_to_cpu(sec->info.addr);
3015 		len = be32_to_cpu(sec->info.len);
3016 		dl = fw->data + be32_to_cpu(sec->offs);
3017 		sec_info = be32_to_cpu(sec->info.sec_key_idx);
3018 		mode = mt76_connac2_get_data_mode(dev, sec_info);
3019 
3020 		ret = mt76_connac_mcu_init_download(dev, addr, len, mode);
3021 		if (ret) {
3022 			dev_err(dev->dev, "Download request failed\n");
3023 			goto out;
3024 		}
3025 
3026 		ret = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER),
3027 					       dl, len, max_len);
3028 		if (ret) {
3029 			dev_err(dev->dev, "Failed to send patch\n");
3030 			goto out;
3031 		}
3032 	}
3033 
3034 	ret = mt76_connac_mcu_start_patch(dev);
3035 	if (ret)
3036 		dev_err(dev->dev, "Failed to start patch\n");
3037 
3038 out:
3039 	sem = mt76_connac_mcu_patch_sem_ctrl(dev, false);
3040 	switch (sem) {
3041 	case PATCH_REL_SEM_SUCCESS:
3042 		break;
3043 	default:
3044 		ret = -EAGAIN;
3045 		dev_err(dev->dev, "Failed to release patch semaphore\n");
3046 		break;
3047 	}
3048 
3049 	release_firmware(fw);
3050 
3051 	return ret;
3052 }
3053 EXPORT_SYMBOL_GPL(mt76_connac2_load_patch);
3054 
mt76_connac2_mcu_fill_message(struct mt76_dev * dev,struct sk_buff * skb,int cmd,int * wait_seq)3055 int mt76_connac2_mcu_fill_message(struct mt76_dev *dev, struct sk_buff *skb,
3056 				  int cmd, int *wait_seq)
3057 {
3058 	int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
3059 	struct mt76_connac2_mcu_uni_txd *uni_txd;
3060 	struct mt76_connac2_mcu_txd *mcu_txd;
3061 	__le32 *txd;
3062 	u32 val;
3063 	u8 seq;
3064 
3065 	/* TODO: make dynamic based on msg type */
3066 	dev->mcu.timeout = 20 * HZ;
3067 
3068 	seq = ++dev->mcu.msg_seq & 0xf;
3069 	if (!seq)
3070 		seq = ++dev->mcu.msg_seq & 0xf;
3071 
3072 	if (cmd == MCU_CMD(FW_SCATTER))
3073 		goto exit;
3074 
3075 	txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd);
3076 	txd = (__le32 *)skb_push(skb, txd_len);
3077 
3078 	val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |
3079 	      FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) |
3080 	      FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0);
3081 	txd[0] = cpu_to_le32(val);
3082 
3083 	val = MT_TXD1_LONG_FORMAT |
3084 	      FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD);
3085 	txd[1] = cpu_to_le32(val);
3086 
3087 	if (cmd & __MCU_CMD_FIELD_UNI) {
3088 		uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd;
3089 		uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd));
3090 		uni_txd->option = MCU_CMD_UNI_EXT_ACK;
3091 		uni_txd->cid = cpu_to_le16(mcu_cmd);
3092 		uni_txd->s2d_index = MCU_S2D_H2N;
3093 		uni_txd->pkt_type = MCU_PKT_ID;
3094 		uni_txd->seq = seq;
3095 
3096 		goto exit;
3097 	}
3098 
3099 	mcu_txd = (struct mt76_connac2_mcu_txd *)txd;
3100 	mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd));
3101 	mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU,
3102 					       MT_TX_MCU_PORT_RX_Q0));
3103 	mcu_txd->pkt_type = MCU_PKT_ID;
3104 	mcu_txd->seq = seq;
3105 	mcu_txd->cid = mcu_cmd;
3106 	mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd);
3107 
3108 	if (mcu_txd->ext_cid || (cmd & __MCU_CMD_FIELD_CE)) {
3109 		if (cmd & __MCU_CMD_FIELD_QUERY)
3110 			mcu_txd->set_query = MCU_Q_QUERY;
3111 		else
3112 			mcu_txd->set_query = MCU_Q_SET;
3113 		mcu_txd->ext_cid_ack = !!mcu_txd->ext_cid;
3114 	} else {
3115 		mcu_txd->set_query = MCU_Q_NA;
3116 	}
3117 
3118 	if (cmd & __MCU_CMD_FIELD_WA)
3119 		mcu_txd->s2d_index = MCU_S2D_H2C;
3120 	else
3121 		mcu_txd->s2d_index = MCU_S2D_H2N;
3122 
3123 exit:
3124 	if (wait_seq)
3125 		*wait_seq = seq;
3126 
3127 	return 0;
3128 }
3129 EXPORT_SYMBOL_GPL(mt76_connac2_mcu_fill_message);
3130 
3131 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
3132 MODULE_LICENSE("Dual BSD/GPL");
3133