1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
20 *
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
23 * of the Software.
24 *
25 */
26 /*
27 * Authors:
28 * Christian König <deathsimple@vodafone.de>
29 */
30
31 #include <linux/uaccess.h>
32
33 #include "amdgpu.h"
34 #include "amdgpu_trace.h"
35
36 #define AMDGPU_BO_LIST_MAX_PRIORITY 32u
37 #define AMDGPU_BO_LIST_NUM_BUCKETS (AMDGPU_BO_LIST_MAX_PRIORITY + 1)
38
amdgpu_bo_list_free_rcu(struct rcu_head * rcu)39 static void amdgpu_bo_list_free_rcu(struct rcu_head *rcu)
40 {
41 struct amdgpu_bo_list *list = container_of(rcu, struct amdgpu_bo_list,
42 rhead);
43 mutex_destroy(&list->bo_list_mutex);
44 kvfree(list);
45 }
46
amdgpu_bo_list_free(struct kref * ref)47 static void amdgpu_bo_list_free(struct kref *ref)
48 {
49 struct amdgpu_bo_list *list = container_of(ref, struct amdgpu_bo_list,
50 refcount);
51 struct amdgpu_bo_list_entry *e;
52
53 amdgpu_bo_list_for_each_entry(e, list) {
54 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
55
56 amdgpu_bo_unref(&bo);
57 }
58
59 call_rcu(&list->rhead, amdgpu_bo_list_free_rcu);
60 }
61
amdgpu_bo_list_create(struct amdgpu_device * adev,struct drm_file * filp,struct drm_amdgpu_bo_list_entry * info,size_t num_entries,struct amdgpu_bo_list ** result)62 int amdgpu_bo_list_create(struct amdgpu_device *adev, struct drm_file *filp,
63 struct drm_amdgpu_bo_list_entry *info,
64 size_t num_entries, struct amdgpu_bo_list **result)
65 {
66 unsigned last_entry = 0, first_userptr = num_entries;
67 struct amdgpu_bo_list_entry *array;
68 struct amdgpu_bo_list *list;
69 uint64_t total_size = 0;
70 size_t size;
71 unsigned i;
72 int r;
73
74 if (num_entries > (SIZE_MAX - sizeof(struct amdgpu_bo_list))
75 / sizeof(struct amdgpu_bo_list_entry))
76 return -EINVAL;
77
78 size = sizeof(struct amdgpu_bo_list);
79 size += num_entries * sizeof(struct amdgpu_bo_list_entry);
80 list = kvmalloc(size, GFP_KERNEL);
81 if (!list)
82 return -ENOMEM;
83
84 kref_init(&list->refcount);
85 list->gds_obj = NULL;
86 list->gws_obj = NULL;
87 list->oa_obj = NULL;
88
89 array = amdgpu_bo_list_array_entry(list, 0);
90 memset(array, 0, num_entries * sizeof(struct amdgpu_bo_list_entry));
91
92 for (i = 0; i < num_entries; ++i) {
93 struct amdgpu_bo_list_entry *entry;
94 struct drm_gem_object *gobj;
95 struct amdgpu_bo *bo;
96 struct mm_struct *usermm;
97
98 gobj = drm_gem_object_lookup(filp, info[i].bo_handle);
99 if (!gobj) {
100 r = -ENOENT;
101 goto error_free;
102 }
103
104 bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
105 drm_gem_object_put(gobj);
106
107 usermm = amdgpu_ttm_tt_get_usermm(bo->tbo.ttm);
108 if (usermm) {
109 if (usermm != current->mm) {
110 amdgpu_bo_unref(&bo);
111 r = -EPERM;
112 goto error_free;
113 }
114 entry = &array[--first_userptr];
115 } else {
116 entry = &array[last_entry++];
117 }
118
119 entry->priority = min(info[i].bo_priority,
120 AMDGPU_BO_LIST_MAX_PRIORITY);
121 entry->tv.bo = &bo->tbo;
122
123 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GDS)
124 list->gds_obj = bo;
125 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GWS)
126 list->gws_obj = bo;
127 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_OA)
128 list->oa_obj = bo;
129
130 total_size += amdgpu_bo_size(bo);
131 trace_amdgpu_bo_list_set(list, bo);
132 }
133
134 list->first_userptr = first_userptr;
135 list->num_entries = num_entries;
136
137 trace_amdgpu_cs_bo_status(list->num_entries, total_size);
138
139 mutex_init(&list->bo_list_mutex);
140 *result = list;
141 return 0;
142
143 error_free:
144 for (i = 0; i < last_entry; ++i) {
145 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(array[i].tv.bo);
146
147 amdgpu_bo_unref(&bo);
148 }
149 for (i = first_userptr; i < num_entries; ++i) {
150 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(array[i].tv.bo);
151
152 amdgpu_bo_unref(&bo);
153 }
154 kvfree(list);
155 return r;
156
157 }
158
amdgpu_bo_list_destroy(struct amdgpu_fpriv * fpriv,int id)159 static void amdgpu_bo_list_destroy(struct amdgpu_fpriv *fpriv, int id)
160 {
161 struct amdgpu_bo_list *list;
162
163 mutex_lock(&fpriv->bo_list_lock);
164 list = idr_remove(&fpriv->bo_list_handles, id);
165 mutex_unlock(&fpriv->bo_list_lock);
166 if (list)
167 kref_put(&list->refcount, amdgpu_bo_list_free);
168 }
169
amdgpu_bo_list_get(struct amdgpu_fpriv * fpriv,int id,struct amdgpu_bo_list ** result)170 int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id,
171 struct amdgpu_bo_list **result)
172 {
173 rcu_read_lock();
174 *result = idr_find(&fpriv->bo_list_handles, id);
175
176 if (*result && kref_get_unless_zero(&(*result)->refcount)) {
177 rcu_read_unlock();
178 return 0;
179 }
180
181 rcu_read_unlock();
182 *result = NULL;
183 return -ENOENT;
184 }
185
amdgpu_bo_list_get_list(struct amdgpu_bo_list * list,struct list_head * validated)186 void amdgpu_bo_list_get_list(struct amdgpu_bo_list *list,
187 struct list_head *validated)
188 {
189 /* This is based on the bucket sort with O(n) time complexity.
190 * An item with priority "i" is added to bucket[i]. The lists are then
191 * concatenated in descending order.
192 */
193 struct list_head bucket[AMDGPU_BO_LIST_NUM_BUCKETS];
194 struct amdgpu_bo_list_entry *e;
195 unsigned i;
196
197 for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++)
198 INIT_LIST_HEAD(&bucket[i]);
199
200 /* Since buffers which appear sooner in the relocation list are
201 * likely to be used more often than buffers which appear later
202 * in the list, the sort mustn't change the ordering of buffers
203 * with the same priority, i.e. it must be stable.
204 */
205 amdgpu_bo_list_for_each_entry(e, list) {
206 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
207 unsigned priority = e->priority;
208
209 if (!bo->parent)
210 list_add_tail(&e->tv.head, &bucket[priority]);
211
212 e->user_pages = NULL;
213 e->range = NULL;
214 }
215
216 /* Connect the sorted buckets in the output list. */
217 for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++)
218 list_splice(&bucket[i], validated);
219 }
220
amdgpu_bo_list_put(struct amdgpu_bo_list * list)221 void amdgpu_bo_list_put(struct amdgpu_bo_list *list)
222 {
223 kref_put(&list->refcount, amdgpu_bo_list_free);
224 }
225
amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in * in,struct drm_amdgpu_bo_list_entry ** info_param)226 int amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in *in,
227 struct drm_amdgpu_bo_list_entry **info_param)
228 {
229 const void __user *uptr = u64_to_user_ptr(in->bo_info_ptr);
230 const uint32_t info_size = sizeof(struct drm_amdgpu_bo_list_entry);
231 struct drm_amdgpu_bo_list_entry *info;
232 int r;
233
234 info = kvmalloc_array(in->bo_number, info_size, GFP_KERNEL);
235 if (!info)
236 return -ENOMEM;
237
238 /* copy the handle array from userspace to a kernel buffer */
239 r = -EFAULT;
240 if (likely(info_size == in->bo_info_size)) {
241 unsigned long bytes = in->bo_number *
242 in->bo_info_size;
243
244 if (copy_from_user(info, uptr, bytes))
245 goto error_free;
246
247 } else {
248 unsigned long bytes = min(in->bo_info_size, info_size);
249 unsigned i;
250
251 memset(info, 0, in->bo_number * info_size);
252 for (i = 0; i < in->bo_number; ++i) {
253 if (copy_from_user(&info[i], uptr, bytes))
254 goto error_free;
255
256 uptr += in->bo_info_size;
257 }
258 }
259
260 *info_param = info;
261 return 0;
262
263 error_free:
264 kvfree(info);
265 return r;
266 }
267
amdgpu_bo_list_ioctl(struct drm_device * dev,void * data,struct drm_file * filp)268 int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data,
269 struct drm_file *filp)
270 {
271 struct amdgpu_device *adev = drm_to_adev(dev);
272 struct amdgpu_fpriv *fpriv = filp->driver_priv;
273 union drm_amdgpu_bo_list *args = data;
274 uint32_t handle = args->in.list_handle;
275 struct drm_amdgpu_bo_list_entry *info = NULL;
276 struct amdgpu_bo_list *list, *old;
277 int r;
278
279 r = amdgpu_bo_create_list_entry_array(&args->in, &info);
280 if (r)
281 return r;
282
283 switch (args->in.operation) {
284 case AMDGPU_BO_LIST_OP_CREATE:
285 r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number,
286 &list);
287 if (r)
288 goto error_free;
289
290 mutex_lock(&fpriv->bo_list_lock);
291 r = idr_alloc(&fpriv->bo_list_handles, list, 1, 0, GFP_KERNEL);
292 mutex_unlock(&fpriv->bo_list_lock);
293 if (r < 0) {
294 goto error_put_list;
295 }
296
297 handle = r;
298 break;
299
300 case AMDGPU_BO_LIST_OP_DESTROY:
301 amdgpu_bo_list_destroy(fpriv, handle);
302 handle = 0;
303 break;
304
305 case AMDGPU_BO_LIST_OP_UPDATE:
306 r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number,
307 &list);
308 if (r)
309 goto error_free;
310
311 mutex_lock(&fpriv->bo_list_lock);
312 old = idr_replace(&fpriv->bo_list_handles, list, handle);
313 mutex_unlock(&fpriv->bo_list_lock);
314
315 if (IS_ERR(old)) {
316 r = PTR_ERR(old);
317 goto error_put_list;
318 }
319
320 amdgpu_bo_list_put(old);
321 break;
322
323 default:
324 r = -EINVAL;
325 goto error_free;
326 }
327
328 memset(args, 0, sizeof(*args));
329 args->out.list_handle = handle;
330 kvfree(info);
331
332 return 0;
333
334 error_put_list:
335 amdgpu_bo_list_put(list);
336
337 error_free:
338 kvfree(info);
339 return r;
340 }
341