1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * CAAM/SEC 4.x transport/backend driver
4 * JobR backend functionality
5 *
6 * Copyright 2008-2012 Freescale Semiconductor, Inc.
7 * Copyright 2019 NXP
8 */
9
10 #include <linux/of_irq.h>
11 #include <linux/of_address.h>
12
13 #include "compat.h"
14 #include "ctrl.h"
15 #include "regs.h"
16 #include "jr.h"
17 #include "desc.h"
18 #include "intern.h"
19
20 struct jr_driver_data {
21 /* List of Physical JobR's with the Driver */
22 struct list_head jr_list;
23 spinlock_t jr_alloc_lock; /* jr_list lock */
24 } ____cacheline_aligned;
25
26 static struct jr_driver_data driver_data;
27 static DEFINE_MUTEX(algs_lock);
28 static unsigned int active_devs;
29
register_algs(struct caam_drv_private_jr * jrpriv,struct device * dev)30 static void register_algs(struct caam_drv_private_jr *jrpriv,
31 struct device *dev)
32 {
33 mutex_lock(&algs_lock);
34
35 if (++active_devs != 1)
36 goto algs_unlock;
37
38 caam_algapi_init(dev);
39 caam_algapi_hash_init(dev);
40 caam_pkc_init(dev);
41 jrpriv->hwrng = !caam_rng_init(dev);
42 caam_prng_register(dev);
43 caam_qi_algapi_init(dev);
44
45 algs_unlock:
46 mutex_unlock(&algs_lock);
47 }
48
unregister_algs(void)49 static void unregister_algs(void)
50 {
51 mutex_lock(&algs_lock);
52
53 if (--active_devs != 0)
54 goto algs_unlock;
55
56 caam_qi_algapi_exit();
57 caam_prng_unregister(NULL);
58 caam_pkc_exit();
59 caam_algapi_hash_exit();
60 caam_algapi_exit();
61
62 algs_unlock:
63 mutex_unlock(&algs_lock);
64 }
65
caam_jr_crypto_engine_exit(void * data)66 static void caam_jr_crypto_engine_exit(void *data)
67 {
68 struct device *jrdev = data;
69 struct caam_drv_private_jr *jrpriv = dev_get_drvdata(jrdev);
70
71 /* Free the resources of crypto-engine */
72 crypto_engine_exit(jrpriv->engine);
73 }
74
caam_reset_hw_jr(struct device * dev)75 static int caam_reset_hw_jr(struct device *dev)
76 {
77 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
78 unsigned int timeout = 100000;
79
80 /*
81 * mask interrupts since we are going to poll
82 * for reset completion status
83 */
84 clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);
85
86 /* initiate flush (required prior to reset) */
87 wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
88 while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) ==
89 JRINT_ERR_HALT_INPROGRESS) && --timeout)
90 cpu_relax();
91
92 if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) !=
93 JRINT_ERR_HALT_COMPLETE || timeout == 0) {
94 dev_err(dev, "failed to flush job ring %d\n", jrp->ridx);
95 return -EIO;
96 }
97
98 /* initiate reset */
99 timeout = 100000;
100 wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
101 while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout)
102 cpu_relax();
103
104 if (timeout == 0) {
105 dev_err(dev, "failed to reset job ring %d\n", jrp->ridx);
106 return -EIO;
107 }
108
109 /* unmask interrupts */
110 clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);
111
112 return 0;
113 }
114
115 /*
116 * Shutdown JobR independent of platform property code
117 */
caam_jr_shutdown(struct device * dev)118 static int caam_jr_shutdown(struct device *dev)
119 {
120 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
121 int ret;
122
123 ret = caam_reset_hw_jr(dev);
124
125 tasklet_kill(&jrp->irqtask);
126
127 return ret;
128 }
129
caam_jr_remove(struct platform_device * pdev)130 static int caam_jr_remove(struct platform_device *pdev)
131 {
132 int ret;
133 struct device *jrdev;
134 struct caam_drv_private_jr *jrpriv;
135
136 jrdev = &pdev->dev;
137 jrpriv = dev_get_drvdata(jrdev);
138
139 if (jrpriv->hwrng)
140 caam_rng_exit(jrdev->parent);
141
142 /*
143 * Return EBUSY if job ring already allocated.
144 */
145 if (atomic_read(&jrpriv->tfm_count)) {
146 dev_err(jrdev, "Device is busy\n");
147 return -EBUSY;
148 }
149
150 /* Unregister JR-based RNG & crypto algorithms */
151 unregister_algs();
152
153 /* Remove the node from Physical JobR list maintained by driver */
154 spin_lock(&driver_data.jr_alloc_lock);
155 list_del(&jrpriv->list_node);
156 spin_unlock(&driver_data.jr_alloc_lock);
157
158 /* Release ring */
159 ret = caam_jr_shutdown(jrdev);
160 if (ret)
161 dev_err(jrdev, "Failed to shut down job ring\n");
162
163 return ret;
164 }
165
166 /* Main per-ring interrupt handler */
caam_jr_interrupt(int irq,void * st_dev)167 static irqreturn_t caam_jr_interrupt(int irq, void *st_dev)
168 {
169 struct device *dev = st_dev;
170 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
171 u32 irqstate;
172
173 /*
174 * Check the output ring for ready responses, kick
175 * tasklet if jobs done.
176 */
177 irqstate = rd_reg32(&jrp->rregs->jrintstatus);
178 if (!irqstate)
179 return IRQ_NONE;
180
181 /*
182 * If JobR error, we got more development work to do
183 * Flag a bug now, but we really need to shut down and
184 * restart the queue (and fix code).
185 */
186 if (irqstate & JRINT_JR_ERROR) {
187 dev_err(dev, "job ring error: irqstate: %08x\n", irqstate);
188 BUG();
189 }
190
191 /* mask valid interrupts */
192 clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);
193
194 /* Have valid interrupt at this point, just ACK and trigger */
195 wr_reg32(&jrp->rregs->jrintstatus, irqstate);
196
197 preempt_disable();
198 tasklet_schedule(&jrp->irqtask);
199 preempt_enable();
200
201 return IRQ_HANDLED;
202 }
203
204 /* Deferred service handler, run as interrupt-fired tasklet */
caam_jr_dequeue(unsigned long devarg)205 static void caam_jr_dequeue(unsigned long devarg)
206 {
207 int hw_idx, sw_idx, i, head, tail;
208 struct device *dev = (struct device *)devarg;
209 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
210 void (*usercall)(struct device *dev, u32 *desc, u32 status, void *arg);
211 u32 *userdesc, userstatus;
212 void *userarg;
213 u32 outring_used = 0;
214
215 while (outring_used ||
216 (outring_used = rd_reg32(&jrp->rregs->outring_used))) {
217
218 head = READ_ONCE(jrp->head);
219
220 sw_idx = tail = jrp->tail;
221 hw_idx = jrp->out_ring_read_index;
222
223 for (i = 0; CIRC_CNT(head, tail + i, JOBR_DEPTH) >= 1; i++) {
224 sw_idx = (tail + i) & (JOBR_DEPTH - 1);
225
226 if (jr_outentry_desc(jrp->outring, hw_idx) ==
227 caam_dma_to_cpu(jrp->entinfo[sw_idx].desc_addr_dma))
228 break; /* found */
229 }
230 /* we should never fail to find a matching descriptor */
231 BUG_ON(CIRC_CNT(head, tail + i, JOBR_DEPTH) <= 0);
232
233 /* Unmap just-run descriptor so we can post-process */
234 dma_unmap_single(dev,
235 caam_dma_to_cpu(jr_outentry_desc(jrp->outring,
236 hw_idx)),
237 jrp->entinfo[sw_idx].desc_size,
238 DMA_TO_DEVICE);
239
240 /* mark completed, avoid matching on a recycled desc addr */
241 jrp->entinfo[sw_idx].desc_addr_dma = 0;
242
243 /* Stash callback params */
244 usercall = jrp->entinfo[sw_idx].callbk;
245 userarg = jrp->entinfo[sw_idx].cbkarg;
246 userdesc = jrp->entinfo[sw_idx].desc_addr_virt;
247 userstatus = caam32_to_cpu(jr_outentry_jrstatus(jrp->outring,
248 hw_idx));
249
250 /*
251 * Make sure all information from the job has been obtained
252 * before telling CAAM that the job has been removed from the
253 * output ring.
254 */
255 mb();
256
257 /* set done */
258 wr_reg32(&jrp->rregs->outring_rmvd, 1);
259
260 jrp->out_ring_read_index = (jrp->out_ring_read_index + 1) &
261 (JOBR_DEPTH - 1);
262
263 /*
264 * if this job completed out-of-order, do not increment
265 * the tail. Otherwise, increment tail by 1 plus the
266 * number of subsequent jobs already completed out-of-order
267 */
268 if (sw_idx == tail) {
269 do {
270 tail = (tail + 1) & (JOBR_DEPTH - 1);
271 } while (CIRC_CNT(head, tail, JOBR_DEPTH) >= 1 &&
272 jrp->entinfo[tail].desc_addr_dma == 0);
273
274 jrp->tail = tail;
275 }
276
277 /* Finally, execute user's callback */
278 usercall(dev, userdesc, userstatus, userarg);
279 outring_used--;
280 }
281
282 /* reenable / unmask IRQs */
283 clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);
284 }
285
286 /**
287 * caam_jr_alloc() - Alloc a job ring for someone to use as needed.
288 *
289 * returns : pointer to the newly allocated physical
290 * JobR dev can be written to if successful.
291 **/
caam_jr_alloc(void)292 struct device *caam_jr_alloc(void)
293 {
294 struct caam_drv_private_jr *jrpriv, *min_jrpriv = NULL;
295 struct device *dev = ERR_PTR(-ENODEV);
296 int min_tfm_cnt = INT_MAX;
297 int tfm_cnt;
298
299 spin_lock(&driver_data.jr_alloc_lock);
300
301 if (list_empty(&driver_data.jr_list)) {
302 spin_unlock(&driver_data.jr_alloc_lock);
303 return ERR_PTR(-ENODEV);
304 }
305
306 list_for_each_entry(jrpriv, &driver_data.jr_list, list_node) {
307 tfm_cnt = atomic_read(&jrpriv->tfm_count);
308 if (tfm_cnt < min_tfm_cnt) {
309 min_tfm_cnt = tfm_cnt;
310 min_jrpriv = jrpriv;
311 }
312 if (!min_tfm_cnt)
313 break;
314 }
315
316 if (min_jrpriv) {
317 atomic_inc(&min_jrpriv->tfm_count);
318 dev = min_jrpriv->dev;
319 }
320 spin_unlock(&driver_data.jr_alloc_lock);
321
322 return dev;
323 }
324 EXPORT_SYMBOL(caam_jr_alloc);
325
326 /**
327 * caam_jr_free() - Free the Job Ring
328 * @rdev: points to the dev that identifies the Job ring to
329 * be released.
330 **/
caam_jr_free(struct device * rdev)331 void caam_jr_free(struct device *rdev)
332 {
333 struct caam_drv_private_jr *jrpriv = dev_get_drvdata(rdev);
334
335 atomic_dec(&jrpriv->tfm_count);
336 }
337 EXPORT_SYMBOL(caam_jr_free);
338
339 /**
340 * caam_jr_enqueue() - Enqueue a job descriptor head. Returns -EINPROGRESS
341 * if OK, -ENOSPC if the queue is full, -EIO if it cannot map the caller's
342 * descriptor.
343 * @dev: struct device of the job ring to be used
344 * @desc: points to a job descriptor that execute our request. All
345 * descriptors (and all referenced data) must be in a DMAable
346 * region, and all data references must be physical addresses
347 * accessible to CAAM (i.e. within a PAMU window granted
348 * to it).
349 * @cbk: pointer to a callback function to be invoked upon completion
350 * of this request. This has the form:
351 * callback(struct device *dev, u32 *desc, u32 stat, void *arg)
352 * where:
353 * dev: contains the job ring device that processed this
354 * response.
355 * desc: descriptor that initiated the request, same as
356 * "desc" being argued to caam_jr_enqueue().
357 * status: untranslated status received from CAAM. See the
358 * reference manual for a detailed description of
359 * error meaning, or see the JRSTA definitions in the
360 * register header file
361 * areq: optional pointer to an argument passed with the
362 * original request
363 * @areq: optional pointer to a user argument for use at callback
364 * time.
365 **/
caam_jr_enqueue(struct device * dev,u32 * desc,void (* cbk)(struct device * dev,u32 * desc,u32 status,void * areq),void * areq)366 int caam_jr_enqueue(struct device *dev, u32 *desc,
367 void (*cbk)(struct device *dev, u32 *desc,
368 u32 status, void *areq),
369 void *areq)
370 {
371 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
372 struct caam_jrentry_info *head_entry;
373 int head, tail, desc_size;
374 dma_addr_t desc_dma;
375
376 desc_size = (caam32_to_cpu(*desc) & HDR_JD_LENGTH_MASK) * sizeof(u32);
377 desc_dma = dma_map_single(dev, desc, desc_size, DMA_TO_DEVICE);
378 if (dma_mapping_error(dev, desc_dma)) {
379 dev_err(dev, "caam_jr_enqueue(): can't map jobdesc\n");
380 return -EIO;
381 }
382
383 spin_lock_bh(&jrp->inplock);
384
385 head = jrp->head;
386 tail = READ_ONCE(jrp->tail);
387
388 if (!jrp->inpring_avail ||
389 CIRC_SPACE(head, tail, JOBR_DEPTH) <= 0) {
390 spin_unlock_bh(&jrp->inplock);
391 dma_unmap_single(dev, desc_dma, desc_size, DMA_TO_DEVICE);
392 return -ENOSPC;
393 }
394
395 head_entry = &jrp->entinfo[head];
396 head_entry->desc_addr_virt = desc;
397 head_entry->desc_size = desc_size;
398 head_entry->callbk = (void *)cbk;
399 head_entry->cbkarg = areq;
400 head_entry->desc_addr_dma = desc_dma;
401
402 jr_inpentry_set(jrp->inpring, head, cpu_to_caam_dma(desc_dma));
403
404 /*
405 * Guarantee that the descriptor's DMA address has been written to
406 * the next slot in the ring before the write index is updated, since
407 * other cores may update this index independently.
408 */
409 smp_wmb();
410
411 jrp->head = (head + 1) & (JOBR_DEPTH - 1);
412
413 /*
414 * Ensure that all job information has been written before
415 * notifying CAAM that a new job was added to the input ring
416 * using a memory barrier. The wr_reg32() uses api iowrite32()
417 * to do the register write. iowrite32() issues a memory barrier
418 * before the write operation.
419 */
420
421 wr_reg32(&jrp->rregs->inpring_jobadd, 1);
422
423 jrp->inpring_avail--;
424 if (!jrp->inpring_avail)
425 jrp->inpring_avail = rd_reg32(&jrp->rregs->inpring_avail);
426
427 spin_unlock_bh(&jrp->inplock);
428
429 return -EINPROGRESS;
430 }
431 EXPORT_SYMBOL(caam_jr_enqueue);
432
433 /*
434 * Init JobR independent of platform property detection
435 */
caam_jr_init(struct device * dev)436 static int caam_jr_init(struct device *dev)
437 {
438 struct caam_drv_private_jr *jrp;
439 dma_addr_t inpbusaddr, outbusaddr;
440 int i, error;
441
442 jrp = dev_get_drvdata(dev);
443
444 error = caam_reset_hw_jr(dev);
445 if (error)
446 return error;
447
448 jrp->inpring = dmam_alloc_coherent(dev, SIZEOF_JR_INPENTRY *
449 JOBR_DEPTH, &inpbusaddr,
450 GFP_KERNEL);
451 if (!jrp->inpring)
452 return -ENOMEM;
453
454 jrp->outring = dmam_alloc_coherent(dev, SIZEOF_JR_OUTENTRY *
455 JOBR_DEPTH, &outbusaddr,
456 GFP_KERNEL);
457 if (!jrp->outring)
458 return -ENOMEM;
459
460 jrp->entinfo = devm_kcalloc(dev, JOBR_DEPTH, sizeof(*jrp->entinfo),
461 GFP_KERNEL);
462 if (!jrp->entinfo)
463 return -ENOMEM;
464
465 for (i = 0; i < JOBR_DEPTH; i++)
466 jrp->entinfo[i].desc_addr_dma = !0;
467
468 /* Setup rings */
469 jrp->out_ring_read_index = 0;
470 jrp->head = 0;
471 jrp->tail = 0;
472
473 wr_reg64(&jrp->rregs->inpring_base, inpbusaddr);
474 wr_reg64(&jrp->rregs->outring_base, outbusaddr);
475 wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH);
476 wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH);
477
478 jrp->inpring_avail = JOBR_DEPTH;
479
480 spin_lock_init(&jrp->inplock);
481
482 /* Select interrupt coalescing parameters */
483 clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JOBR_INTC |
484 (JOBR_INTC_COUNT_THLD << JRCFG_ICDCT_SHIFT) |
485 (JOBR_INTC_TIME_THLD << JRCFG_ICTT_SHIFT));
486
487 tasklet_init(&jrp->irqtask, caam_jr_dequeue, (unsigned long)dev);
488
489 /* Connect job ring interrupt handler. */
490 error = devm_request_irq(dev, jrp->irq, caam_jr_interrupt, IRQF_SHARED,
491 dev_name(dev), dev);
492 if (error) {
493 dev_err(dev, "can't connect JobR %d interrupt (%d)\n",
494 jrp->ridx, jrp->irq);
495 tasklet_kill(&jrp->irqtask);
496 }
497
498 return error;
499 }
500
caam_jr_irq_dispose_mapping(void * data)501 static void caam_jr_irq_dispose_mapping(void *data)
502 {
503 irq_dispose_mapping((unsigned long)data);
504 }
505
506 /*
507 * Probe routine for each detected JobR subsystem.
508 */
caam_jr_probe(struct platform_device * pdev)509 static int caam_jr_probe(struct platform_device *pdev)
510 {
511 struct device *jrdev;
512 struct device_node *nprop;
513 struct caam_job_ring __iomem *ctrl;
514 struct caam_drv_private_jr *jrpriv;
515 static int total_jobrs;
516 struct resource *r;
517 int error;
518
519 jrdev = &pdev->dev;
520 jrpriv = devm_kzalloc(jrdev, sizeof(*jrpriv), GFP_KERNEL);
521 if (!jrpriv)
522 return -ENOMEM;
523
524 dev_set_drvdata(jrdev, jrpriv);
525
526 /* save ring identity relative to detection */
527 jrpriv->ridx = total_jobrs++;
528
529 nprop = pdev->dev.of_node;
530 /* Get configuration properties from device tree */
531 /* First, get register page */
532 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
533 if (!r) {
534 dev_err(jrdev, "platform_get_resource() failed\n");
535 return -ENOMEM;
536 }
537
538 ctrl = devm_ioremap(jrdev, r->start, resource_size(r));
539 if (!ctrl) {
540 dev_err(jrdev, "devm_ioremap() failed\n");
541 return -ENOMEM;
542 }
543
544 jrpriv->rregs = (struct caam_job_ring __iomem __force *)ctrl;
545
546 error = dma_set_mask_and_coherent(jrdev, caam_get_dma_mask(jrdev));
547 if (error) {
548 dev_err(jrdev, "dma_set_mask_and_coherent failed (%d)\n",
549 error);
550 return error;
551 }
552
553 /* Initialize crypto engine */
554 jrpriv->engine = crypto_engine_alloc_init_and_set(jrdev, true, NULL,
555 false,
556 CRYPTO_ENGINE_MAX_QLEN);
557 if (!jrpriv->engine) {
558 dev_err(jrdev, "Could not init crypto-engine\n");
559 return -ENOMEM;
560 }
561
562 error = devm_add_action_or_reset(jrdev, caam_jr_crypto_engine_exit,
563 jrdev);
564 if (error)
565 return error;
566
567 /* Start crypto engine */
568 error = crypto_engine_start(jrpriv->engine);
569 if (error) {
570 dev_err(jrdev, "Could not start crypto-engine\n");
571 return error;
572 }
573
574 /* Identify the interrupt */
575 jrpriv->irq = irq_of_parse_and_map(nprop, 0);
576 if (!jrpriv->irq) {
577 dev_err(jrdev, "irq_of_parse_and_map failed\n");
578 return -EINVAL;
579 }
580
581 error = devm_add_action_or_reset(jrdev, caam_jr_irq_dispose_mapping,
582 (void *)(unsigned long)jrpriv->irq);
583 if (error)
584 return error;
585
586 /* Now do the platform independent part */
587 error = caam_jr_init(jrdev); /* now turn on hardware */
588 if (error)
589 return error;
590
591 jrpriv->dev = jrdev;
592 spin_lock(&driver_data.jr_alloc_lock);
593 list_add_tail(&jrpriv->list_node, &driver_data.jr_list);
594 spin_unlock(&driver_data.jr_alloc_lock);
595
596 atomic_set(&jrpriv->tfm_count, 0);
597
598 register_algs(jrpriv, jrdev->parent);
599
600 return 0;
601 }
602
603 static const struct of_device_id caam_jr_match[] = {
604 {
605 .compatible = "fsl,sec-v4.0-job-ring",
606 },
607 {
608 .compatible = "fsl,sec4.0-job-ring",
609 },
610 {},
611 };
612 MODULE_DEVICE_TABLE(of, caam_jr_match);
613
614 static struct platform_driver caam_jr_driver = {
615 .driver = {
616 .name = "caam_jr",
617 .of_match_table = caam_jr_match,
618 },
619 .probe = caam_jr_probe,
620 .remove = caam_jr_remove,
621 };
622
jr_driver_init(void)623 static int __init jr_driver_init(void)
624 {
625 spin_lock_init(&driver_data.jr_alloc_lock);
626 INIT_LIST_HEAD(&driver_data.jr_list);
627 return platform_driver_register(&caam_jr_driver);
628 }
629
jr_driver_exit(void)630 static void __exit jr_driver_exit(void)
631 {
632 platform_driver_unregister(&caam_jr_driver);
633 }
634
635 module_init(jr_driver_init);
636 module_exit(jr_driver_exit);
637
638 MODULE_LICENSE("GPL");
639 MODULE_DESCRIPTION("FSL CAAM JR request backend");
640 MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");
641