Searched defs:divq (Results 1 – 7 of 7) sorted by relevance
/drivers/clk/ |
D | clk-highbank.c | 97 unsigned long divf, divq, vco_freq, reg; in clk_pll_recalc_rate() local 113 u32 divq, divf; in clk_pll_calc() local 137 u32 divq, divf; in clk_pll_round_rate() local 149 u32 divq, divf; in clk_pll_set_rate() local
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/drivers/clk/analogbits/ |
D | wrpll-cln28hpc.c | 151 u8 divq = 0; in __wrpll_calc_divq() local 231 u8 fbdiv, divq, best_r, r; in wrpll_configure_for_rate() local
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/drivers/clk/socfpga/ |
D | clk-pll-a10.c | 38 unsigned long divf, divq, reg; in clk_pll_recalc_rate() local
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D | clk-pll.c | 42 unsigned long divf, divq, reg; in clk_pll_recalc_rate() local
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/drivers/clk/imx/ |
D | clk-sscg-pll.c | 74 int divq; member 331 u32 val, divr1, divf1, divr2, divf2, divq; in clk_sscg_pll_recalc_rate() local
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D | clk-frac-pll.c | 100 u32 val, divff, divfi, divq; in clk_pll_recalc_rate() local
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/drivers/media/pci/solo6x10/ |
D | solo6x10-core.c | 525 u32 divq, divf; in solo_pci_probe() local
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