1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2019-2021 NXP
3 *
4 * This is an umbrella module for all network switches that are
5 * register-compatible with Ocelot and that perform I/O to their host CPU
6 * through an NPI (Node Processor Interface) Ethernet port.
7 */
8 #include <uapi/linux/if_bridge.h>
9 #include <soc/mscc/ocelot_vcap.h>
10 #include <soc/mscc/ocelot_qsys.h>
11 #include <soc/mscc/ocelot_sys.h>
12 #include <soc/mscc/ocelot_dev.h>
13 #include <soc/mscc/ocelot_ana.h>
14 #include <soc/mscc/ocelot_ptp.h>
15 #include <soc/mscc/ocelot.h>
16 #include <linux/dsa/8021q.h>
17 #include <linux/dsa/ocelot.h>
18 #include <linux/platform_device.h>
19 #include <linux/ptp_classify.h>
20 #include <linux/module.h>
21 #include <linux/of_net.h>
22 #include <linux/pci.h>
23 #include <linux/of.h>
24 #include <net/pkt_sched.h>
25 #include <net/dsa.h>
26 #include "felix.h"
27
28 /* Translate the DSA database API into the ocelot switch library API,
29 * which uses VID 0 for all ports that aren't part of a bridge,
30 * and expects the bridge_dev to be NULL in that case.
31 */
felix_classify_db(struct dsa_db db)32 static struct net_device *felix_classify_db(struct dsa_db db)
33 {
34 switch (db.type) {
35 case DSA_DB_PORT:
36 case DSA_DB_LAG:
37 return NULL;
38 case DSA_DB_BRIDGE:
39 return db.bridge.dev;
40 default:
41 return ERR_PTR(-EOPNOTSUPP);
42 }
43 }
44
felix_cpu_port_for_master(struct dsa_switch * ds,struct net_device * master)45 static int felix_cpu_port_for_master(struct dsa_switch *ds,
46 struct net_device *master)
47 {
48 struct ocelot *ocelot = ds->priv;
49 struct dsa_port *cpu_dp;
50 int lag;
51
52 if (netif_is_lag_master(master)) {
53 mutex_lock(&ocelot->fwd_domain_lock);
54 lag = ocelot_bond_get_id(ocelot, master);
55 mutex_unlock(&ocelot->fwd_domain_lock);
56
57 return lag;
58 }
59
60 cpu_dp = master->dsa_ptr;
61 return cpu_dp->index;
62 }
63
64 /* Set up VCAP ES0 rules for pushing a tag_8021q VLAN towards the CPU such that
65 * the tagger can perform RX source port identification.
66 */
felix_tag_8021q_vlan_add_rx(struct dsa_switch * ds,int port,int upstream,u16 vid)67 static int felix_tag_8021q_vlan_add_rx(struct dsa_switch *ds, int port,
68 int upstream, u16 vid)
69 {
70 struct ocelot_vcap_filter *outer_tagging_rule;
71 struct ocelot *ocelot = ds->priv;
72 unsigned long cookie;
73 int key_length, err;
74
75 key_length = ocelot->vcap[VCAP_ES0].keys[VCAP_ES0_IGR_PORT].length;
76
77 outer_tagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter),
78 GFP_KERNEL);
79 if (!outer_tagging_rule)
80 return -ENOMEM;
81
82 cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream);
83
84 outer_tagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
85 outer_tagging_rule->prio = 1;
86 outer_tagging_rule->id.cookie = cookie;
87 outer_tagging_rule->id.tc_offload = false;
88 outer_tagging_rule->block_id = VCAP_ES0;
89 outer_tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
90 outer_tagging_rule->lookup = 0;
91 outer_tagging_rule->ingress_port.value = port;
92 outer_tagging_rule->ingress_port.mask = GENMASK(key_length - 1, 0);
93 outer_tagging_rule->egress_port.value = upstream;
94 outer_tagging_rule->egress_port.mask = GENMASK(key_length - 1, 0);
95 outer_tagging_rule->action.push_outer_tag = OCELOT_ES0_TAG;
96 outer_tagging_rule->action.tag_a_tpid_sel = OCELOT_TAG_TPID_SEL_8021AD;
97 outer_tagging_rule->action.tag_a_vid_sel = 1;
98 outer_tagging_rule->action.vid_a_val = vid;
99
100 err = ocelot_vcap_filter_add(ocelot, outer_tagging_rule, NULL);
101 if (err)
102 kfree(outer_tagging_rule);
103
104 return err;
105 }
106
felix_tag_8021q_vlan_del_rx(struct dsa_switch * ds,int port,int upstream,u16 vid)107 static int felix_tag_8021q_vlan_del_rx(struct dsa_switch *ds, int port,
108 int upstream, u16 vid)
109 {
110 struct ocelot_vcap_filter *outer_tagging_rule;
111 struct ocelot_vcap_block *block_vcap_es0;
112 struct ocelot *ocelot = ds->priv;
113 unsigned long cookie;
114
115 block_vcap_es0 = &ocelot->block[VCAP_ES0];
116 cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream);
117
118 outer_tagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_es0,
119 cookie, false);
120 if (!outer_tagging_rule)
121 return -ENOENT;
122
123 return ocelot_vcap_filter_del(ocelot, outer_tagging_rule);
124 }
125
126 /* Set up VCAP IS1 rules for stripping the tag_8021q VLAN on TX and VCAP IS2
127 * rules for steering those tagged packets towards the correct destination port
128 */
felix_tag_8021q_vlan_add_tx(struct dsa_switch * ds,int port,u16 vid)129 static int felix_tag_8021q_vlan_add_tx(struct dsa_switch *ds, int port,
130 u16 vid)
131 {
132 struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
133 unsigned long cpu_ports = dsa_cpu_ports(ds);
134 struct ocelot *ocelot = ds->priv;
135 unsigned long cookie;
136 int err;
137
138 untagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
139 if (!untagging_rule)
140 return -ENOMEM;
141
142 redirect_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
143 if (!redirect_rule) {
144 kfree(untagging_rule);
145 return -ENOMEM;
146 }
147
148 cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
149
150 untagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
151 untagging_rule->ingress_port_mask = cpu_ports;
152 untagging_rule->vlan.vid.value = vid;
153 untagging_rule->vlan.vid.mask = VLAN_VID_MASK;
154 untagging_rule->prio = 1;
155 untagging_rule->id.cookie = cookie;
156 untagging_rule->id.tc_offload = false;
157 untagging_rule->block_id = VCAP_IS1;
158 untagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
159 untagging_rule->lookup = 0;
160 untagging_rule->action.vlan_pop_cnt_ena = true;
161 untagging_rule->action.vlan_pop_cnt = 1;
162 untagging_rule->action.pag_override_mask = 0xff;
163 untagging_rule->action.pag_val = port;
164
165 err = ocelot_vcap_filter_add(ocelot, untagging_rule, NULL);
166 if (err) {
167 kfree(untagging_rule);
168 kfree(redirect_rule);
169 return err;
170 }
171
172 cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
173
174 redirect_rule->key_type = OCELOT_VCAP_KEY_ANY;
175 redirect_rule->ingress_port_mask = cpu_ports;
176 redirect_rule->pag = port;
177 redirect_rule->prio = 1;
178 redirect_rule->id.cookie = cookie;
179 redirect_rule->id.tc_offload = false;
180 redirect_rule->block_id = VCAP_IS2;
181 redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
182 redirect_rule->lookup = 0;
183 redirect_rule->action.mask_mode = OCELOT_MASK_MODE_REDIRECT;
184 redirect_rule->action.port_mask = BIT(port);
185
186 err = ocelot_vcap_filter_add(ocelot, redirect_rule, NULL);
187 if (err) {
188 ocelot_vcap_filter_del(ocelot, untagging_rule);
189 kfree(redirect_rule);
190 return err;
191 }
192
193 return 0;
194 }
195
felix_tag_8021q_vlan_del_tx(struct dsa_switch * ds,int port,u16 vid)196 static int felix_tag_8021q_vlan_del_tx(struct dsa_switch *ds, int port, u16 vid)
197 {
198 struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
199 struct ocelot_vcap_block *block_vcap_is1;
200 struct ocelot_vcap_block *block_vcap_is2;
201 struct ocelot *ocelot = ds->priv;
202 unsigned long cookie;
203 int err;
204
205 block_vcap_is1 = &ocelot->block[VCAP_IS1];
206 block_vcap_is2 = &ocelot->block[VCAP_IS2];
207
208 cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
209 untagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is1,
210 cookie, false);
211 if (!untagging_rule)
212 return -ENOENT;
213
214 err = ocelot_vcap_filter_del(ocelot, untagging_rule);
215 if (err)
216 return err;
217
218 cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
219 redirect_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is2,
220 cookie, false);
221 if (!redirect_rule)
222 return -ENOENT;
223
224 return ocelot_vcap_filter_del(ocelot, redirect_rule);
225 }
226
felix_tag_8021q_vlan_add(struct dsa_switch * ds,int port,u16 vid,u16 flags)227 static int felix_tag_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,
228 u16 flags)
229 {
230 struct dsa_port *cpu_dp;
231 int err;
232
233 /* tag_8021q.c assumes we are implementing this via port VLAN
234 * membership, which we aren't. So we don't need to add any VCAP filter
235 * for the CPU port.
236 */
237 if (!dsa_is_user_port(ds, port))
238 return 0;
239
240 dsa_switch_for_each_cpu_port(cpu_dp, ds) {
241 err = felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid);
242 if (err)
243 return err;
244 }
245
246 err = felix_tag_8021q_vlan_add_tx(ds, port, vid);
247 if (err)
248 goto add_tx_failed;
249
250 return 0;
251
252 add_tx_failed:
253 dsa_switch_for_each_cpu_port(cpu_dp, ds)
254 felix_tag_8021q_vlan_del_rx(ds, port, cpu_dp->index, vid);
255
256 return err;
257 }
258
felix_tag_8021q_vlan_del(struct dsa_switch * ds,int port,u16 vid)259 static int felix_tag_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
260 {
261 struct dsa_port *cpu_dp;
262 int err;
263
264 if (!dsa_is_user_port(ds, port))
265 return 0;
266
267 dsa_switch_for_each_cpu_port(cpu_dp, ds) {
268 err = felix_tag_8021q_vlan_del_rx(ds, port, cpu_dp->index, vid);
269 if (err)
270 return err;
271 }
272
273 err = felix_tag_8021q_vlan_del_tx(ds, port, vid);
274 if (err)
275 goto del_tx_failed;
276
277 return 0;
278
279 del_tx_failed:
280 dsa_switch_for_each_cpu_port(cpu_dp, ds)
281 felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid);
282
283 return err;
284 }
285
felix_trap_get_cpu_port(struct dsa_switch * ds,const struct ocelot_vcap_filter * trap)286 static int felix_trap_get_cpu_port(struct dsa_switch *ds,
287 const struct ocelot_vcap_filter *trap)
288 {
289 struct dsa_port *dp;
290 int first_port;
291
292 if (WARN_ON(!trap->ingress_port_mask))
293 return -1;
294
295 first_port = __ffs(trap->ingress_port_mask);
296 dp = dsa_to_port(ds, first_port);
297
298 return dp->cpu_dp->index;
299 }
300
301 /* On switches with no extraction IRQ wired, trapped packets need to be
302 * replicated over Ethernet as well, otherwise we'd get no notification of
303 * their arrival when using the ocelot-8021q tagging protocol.
304 */
felix_update_trapping_destinations(struct dsa_switch * ds,bool using_tag_8021q)305 static int felix_update_trapping_destinations(struct dsa_switch *ds,
306 bool using_tag_8021q)
307 {
308 struct ocelot *ocelot = ds->priv;
309 struct felix *felix = ocelot_to_felix(ocelot);
310 struct ocelot_vcap_block *block_vcap_is2;
311 struct ocelot_vcap_filter *trap;
312 enum ocelot_mask_mode mask_mode;
313 unsigned long port_mask;
314 bool cpu_copy_ena;
315 int err;
316
317 if (!felix->info->quirk_no_xtr_irq)
318 return 0;
319
320 /* We are sure that "cpu" was found, otherwise
321 * dsa_tree_setup_default_cpu() would have failed earlier.
322 */
323 block_vcap_is2 = &ocelot->block[VCAP_IS2];
324
325 /* Make sure all traps are set up for that destination */
326 list_for_each_entry(trap, &block_vcap_is2->rules, list) {
327 if (!trap->is_trap)
328 continue;
329
330 /* Figure out the current trapping destination */
331 if (using_tag_8021q) {
332 /* Redirect to the tag_8021q CPU port. If timestamps
333 * are necessary, also copy trapped packets to the CPU
334 * port module.
335 */
336 mask_mode = OCELOT_MASK_MODE_REDIRECT;
337 port_mask = BIT(felix_trap_get_cpu_port(ds, trap));
338 cpu_copy_ena = !!trap->take_ts;
339 } else {
340 /* Trap packets only to the CPU port module, which is
341 * redirected to the NPI port (the DSA CPU port)
342 */
343 mask_mode = OCELOT_MASK_MODE_PERMIT_DENY;
344 port_mask = 0;
345 cpu_copy_ena = true;
346 }
347
348 if (trap->action.mask_mode == mask_mode &&
349 trap->action.port_mask == port_mask &&
350 trap->action.cpu_copy_ena == cpu_copy_ena)
351 continue;
352
353 trap->action.mask_mode = mask_mode;
354 trap->action.port_mask = port_mask;
355 trap->action.cpu_copy_ena = cpu_copy_ena;
356
357 err = ocelot_vcap_filter_replace(ocelot, trap);
358 if (err)
359 return err;
360 }
361
362 return 0;
363 }
364
365 /* The CPU port module is connected to the Node Processor Interface (NPI). This
366 * is the mode through which frames can be injected from and extracted to an
367 * external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU
368 * running Linux, and this forms a DSA setup together with the enetc or fman
369 * DSA master.
370 */
felix_npi_port_init(struct ocelot * ocelot,int port)371 static void felix_npi_port_init(struct ocelot *ocelot, int port)
372 {
373 ocelot->npi = port;
374
375 ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |
376 QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port),
377 QSYS_EXT_CPU_CFG);
378
379 /* NPI port Injection/Extraction configuration */
380 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
381 ocelot->npi_xtr_prefix);
382 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
383 ocelot->npi_inj_prefix);
384
385 /* Disable transmission of pause frames */
386 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);
387 }
388
felix_npi_port_deinit(struct ocelot * ocelot,int port)389 static void felix_npi_port_deinit(struct ocelot *ocelot, int port)
390 {
391 /* Restore hardware defaults */
392 int unused_port = ocelot->num_phys_ports + 2;
393
394 ocelot->npi = -1;
395
396 ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port),
397 QSYS_EXT_CPU_CFG);
398
399 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
400 OCELOT_TAG_PREFIX_DISABLED);
401 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
402 OCELOT_TAG_PREFIX_DISABLED);
403
404 /* Enable transmission of pause frames */
405 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1);
406 }
407
felix_tag_npi_setup(struct dsa_switch * ds)408 static int felix_tag_npi_setup(struct dsa_switch *ds)
409 {
410 struct dsa_port *dp, *first_cpu_dp = NULL;
411 struct ocelot *ocelot = ds->priv;
412
413 dsa_switch_for_each_user_port(dp, ds) {
414 if (first_cpu_dp && dp->cpu_dp != first_cpu_dp) {
415 dev_err(ds->dev, "Multiple NPI ports not supported\n");
416 return -EINVAL;
417 }
418
419 first_cpu_dp = dp->cpu_dp;
420 }
421
422 if (!first_cpu_dp)
423 return -EINVAL;
424
425 felix_npi_port_init(ocelot, first_cpu_dp->index);
426
427 return 0;
428 }
429
felix_tag_npi_teardown(struct dsa_switch * ds)430 static void felix_tag_npi_teardown(struct dsa_switch *ds)
431 {
432 struct ocelot *ocelot = ds->priv;
433
434 felix_npi_port_deinit(ocelot, ocelot->npi);
435 }
436
felix_tag_npi_get_host_fwd_mask(struct dsa_switch * ds)437 static unsigned long felix_tag_npi_get_host_fwd_mask(struct dsa_switch *ds)
438 {
439 struct ocelot *ocelot = ds->priv;
440
441 return BIT(ocelot->num_phys_ports);
442 }
443
felix_tag_npi_change_master(struct dsa_switch * ds,int port,struct net_device * master,struct netlink_ext_ack * extack)444 static int felix_tag_npi_change_master(struct dsa_switch *ds, int port,
445 struct net_device *master,
446 struct netlink_ext_ack *extack)
447 {
448 struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;
449 struct ocelot *ocelot = ds->priv;
450
451 if (netif_is_lag_master(master)) {
452 NL_SET_ERR_MSG_MOD(extack,
453 "LAG DSA master only supported using ocelot-8021q");
454 return -EOPNOTSUPP;
455 }
456
457 /* Changing the NPI port breaks user ports still assigned to the old
458 * one, so only allow it while they're down, and don't allow them to
459 * come back up until they're all changed to the new one.
460 */
461 dsa_switch_for_each_user_port(other_dp, ds) {
462 struct net_device *slave = other_dp->slave;
463
464 if (other_dp != dp && (slave->flags & IFF_UP) &&
465 dsa_port_to_master(other_dp) != master) {
466 NL_SET_ERR_MSG_MOD(extack,
467 "Cannot change while old master still has users");
468 return -EOPNOTSUPP;
469 }
470 }
471
472 felix_npi_port_deinit(ocelot, ocelot->npi);
473 felix_npi_port_init(ocelot, felix_cpu_port_for_master(ds, master));
474
475 return 0;
476 }
477
478 /* Alternatively to using the NPI functionality, that same hardware MAC
479 * connected internally to the enetc or fman DSA master can be configured to
480 * use the software-defined tag_8021q frame format. As far as the hardware is
481 * concerned, it thinks it is a "dumb switch" - the queues of the CPU port
482 * module are now disconnected from it, but can still be accessed through
483 * register-based MMIO.
484 */
485 static const struct felix_tag_proto_ops felix_tag_npi_proto_ops = {
486 .setup = felix_tag_npi_setup,
487 .teardown = felix_tag_npi_teardown,
488 .get_host_fwd_mask = felix_tag_npi_get_host_fwd_mask,
489 .change_master = felix_tag_npi_change_master,
490 };
491
felix_tag_8021q_setup(struct dsa_switch * ds)492 static int felix_tag_8021q_setup(struct dsa_switch *ds)
493 {
494 struct ocelot *ocelot = ds->priv;
495 struct dsa_port *dp;
496 int err;
497
498 err = dsa_tag_8021q_register(ds, htons(ETH_P_8021AD));
499 if (err)
500 return err;
501
502 dsa_switch_for_each_cpu_port(dp, ds)
503 ocelot_port_setup_dsa_8021q_cpu(ocelot, dp->index);
504
505 dsa_switch_for_each_user_port(dp, ds)
506 ocelot_port_assign_dsa_8021q_cpu(ocelot, dp->index,
507 dp->cpu_dp->index);
508
509 dsa_switch_for_each_available_port(dp, ds)
510 /* This overwrites ocelot_init():
511 * Do not forward BPDU frames to the CPU port module,
512 * for 2 reasons:
513 * - When these packets are injected from the tag_8021q
514 * CPU port, we want them to go out, not loop back
515 * into the system.
516 * - STP traffic ingressing on a user port should go to
517 * the tag_8021q CPU port, not to the hardware CPU
518 * port module.
519 */
520 ocelot_write_gix(ocelot,
521 ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0),
522 ANA_PORT_CPU_FWD_BPDU_CFG, dp->index);
523
524 /* The ownership of the CPU port module's queues might have just been
525 * transferred to the tag_8021q tagger from the NPI-based tagger.
526 * So there might still be all sorts of crap in the queues. On the
527 * other hand, the MMIO-based matching of PTP frames is very brittle,
528 * so we need to be careful that there are no extra frames to be
529 * dequeued over MMIO, since we would never know to discard them.
530 */
531 ocelot_drain_cpu_queue(ocelot, 0);
532
533 return 0;
534 }
535
felix_tag_8021q_teardown(struct dsa_switch * ds)536 static void felix_tag_8021q_teardown(struct dsa_switch *ds)
537 {
538 struct ocelot *ocelot = ds->priv;
539 struct dsa_port *dp;
540
541 dsa_switch_for_each_available_port(dp, ds)
542 /* Restore the logic from ocelot_init:
543 * do not forward BPDU frames to the front ports.
544 */
545 ocelot_write_gix(ocelot,
546 ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0xffff),
547 ANA_PORT_CPU_FWD_BPDU_CFG,
548 dp->index);
549
550 dsa_switch_for_each_user_port(dp, ds)
551 ocelot_port_unassign_dsa_8021q_cpu(ocelot, dp->index);
552
553 dsa_switch_for_each_cpu_port(dp, ds)
554 ocelot_port_teardown_dsa_8021q_cpu(ocelot, dp->index);
555
556 dsa_tag_8021q_unregister(ds);
557 }
558
felix_tag_8021q_get_host_fwd_mask(struct dsa_switch * ds)559 static unsigned long felix_tag_8021q_get_host_fwd_mask(struct dsa_switch *ds)
560 {
561 return dsa_cpu_ports(ds);
562 }
563
felix_tag_8021q_change_master(struct dsa_switch * ds,int port,struct net_device * master,struct netlink_ext_ack * extack)564 static int felix_tag_8021q_change_master(struct dsa_switch *ds, int port,
565 struct net_device *master,
566 struct netlink_ext_ack *extack)
567 {
568 int cpu = felix_cpu_port_for_master(ds, master);
569 struct ocelot *ocelot = ds->priv;
570
571 ocelot_port_unassign_dsa_8021q_cpu(ocelot, port);
572 ocelot_port_assign_dsa_8021q_cpu(ocelot, port, cpu);
573
574 return felix_update_trapping_destinations(ds, true);
575 }
576
577 static const struct felix_tag_proto_ops felix_tag_8021q_proto_ops = {
578 .setup = felix_tag_8021q_setup,
579 .teardown = felix_tag_8021q_teardown,
580 .get_host_fwd_mask = felix_tag_8021q_get_host_fwd_mask,
581 .change_master = felix_tag_8021q_change_master,
582 };
583
felix_set_host_flood(struct dsa_switch * ds,unsigned long mask,bool uc,bool mc,bool bc)584 static void felix_set_host_flood(struct dsa_switch *ds, unsigned long mask,
585 bool uc, bool mc, bool bc)
586 {
587 struct ocelot *ocelot = ds->priv;
588 unsigned long val;
589
590 val = uc ? mask : 0;
591 ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_UC);
592
593 val = mc ? mask : 0;
594 ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MC);
595 ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV4);
596 ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV6);
597
598 val = bc ? mask : 0;
599 ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_BC);
600 }
601
602 static void
felix_migrate_host_flood(struct dsa_switch * ds,const struct felix_tag_proto_ops * proto_ops,const struct felix_tag_proto_ops * old_proto_ops)603 felix_migrate_host_flood(struct dsa_switch *ds,
604 const struct felix_tag_proto_ops *proto_ops,
605 const struct felix_tag_proto_ops *old_proto_ops)
606 {
607 struct ocelot *ocelot = ds->priv;
608 struct felix *felix = ocelot_to_felix(ocelot);
609 unsigned long mask;
610
611 if (old_proto_ops) {
612 mask = old_proto_ops->get_host_fwd_mask(ds);
613 felix_set_host_flood(ds, mask, false, false, false);
614 }
615
616 mask = proto_ops->get_host_fwd_mask(ds);
617 felix_set_host_flood(ds, mask, !!felix->host_flood_uc_mask,
618 !!felix->host_flood_mc_mask, true);
619 }
620
felix_migrate_mdbs(struct dsa_switch * ds,const struct felix_tag_proto_ops * proto_ops,const struct felix_tag_proto_ops * old_proto_ops)621 static int felix_migrate_mdbs(struct dsa_switch *ds,
622 const struct felix_tag_proto_ops *proto_ops,
623 const struct felix_tag_proto_ops *old_proto_ops)
624 {
625 struct ocelot *ocelot = ds->priv;
626 unsigned long from, to;
627
628 if (!old_proto_ops)
629 return 0;
630
631 from = old_proto_ops->get_host_fwd_mask(ds);
632 to = proto_ops->get_host_fwd_mask(ds);
633
634 return ocelot_migrate_mdbs(ocelot, from, to);
635 }
636
637 /* Configure the shared hardware resources for a transition between
638 * @old_proto_ops and @proto_ops.
639 * Manual migration is needed because as far as DSA is concerned, no change of
640 * the CPU port is taking place here, just of the tagging protocol.
641 */
642 static int
felix_tag_proto_setup_shared(struct dsa_switch * ds,const struct felix_tag_proto_ops * proto_ops,const struct felix_tag_proto_ops * old_proto_ops)643 felix_tag_proto_setup_shared(struct dsa_switch *ds,
644 const struct felix_tag_proto_ops *proto_ops,
645 const struct felix_tag_proto_ops *old_proto_ops)
646 {
647 bool using_tag_8021q = (proto_ops == &felix_tag_8021q_proto_ops);
648 int err;
649
650 err = felix_migrate_mdbs(ds, proto_ops, old_proto_ops);
651 if (err)
652 return err;
653
654 felix_update_trapping_destinations(ds, using_tag_8021q);
655
656 felix_migrate_host_flood(ds, proto_ops, old_proto_ops);
657
658 return 0;
659 }
660
661 /* This always leaves the switch in a consistent state, because although the
662 * tag_8021q setup can fail, the NPI setup can't. So either the change is made,
663 * or the restoration is guaranteed to work.
664 */
felix_change_tag_protocol(struct dsa_switch * ds,enum dsa_tag_protocol proto)665 static int felix_change_tag_protocol(struct dsa_switch *ds,
666 enum dsa_tag_protocol proto)
667 {
668 const struct felix_tag_proto_ops *old_proto_ops, *proto_ops;
669 struct ocelot *ocelot = ds->priv;
670 struct felix *felix = ocelot_to_felix(ocelot);
671 int err;
672
673 switch (proto) {
674 case DSA_TAG_PROTO_SEVILLE:
675 case DSA_TAG_PROTO_OCELOT:
676 proto_ops = &felix_tag_npi_proto_ops;
677 break;
678 case DSA_TAG_PROTO_OCELOT_8021Q:
679 proto_ops = &felix_tag_8021q_proto_ops;
680 break;
681 default:
682 return -EPROTONOSUPPORT;
683 }
684
685 old_proto_ops = felix->tag_proto_ops;
686
687 if (proto_ops == old_proto_ops)
688 return 0;
689
690 err = proto_ops->setup(ds);
691 if (err)
692 goto setup_failed;
693
694 err = felix_tag_proto_setup_shared(ds, proto_ops, old_proto_ops);
695 if (err)
696 goto setup_shared_failed;
697
698 if (old_proto_ops)
699 old_proto_ops->teardown(ds);
700
701 felix->tag_proto_ops = proto_ops;
702 felix->tag_proto = proto;
703
704 return 0;
705
706 setup_shared_failed:
707 proto_ops->teardown(ds);
708 setup_failed:
709 return err;
710 }
711
felix_get_tag_protocol(struct dsa_switch * ds,int port,enum dsa_tag_protocol mp)712 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,
713 int port,
714 enum dsa_tag_protocol mp)
715 {
716 struct ocelot *ocelot = ds->priv;
717 struct felix *felix = ocelot_to_felix(ocelot);
718
719 return felix->tag_proto;
720 }
721
felix_port_set_host_flood(struct dsa_switch * ds,int port,bool uc,bool mc)722 static void felix_port_set_host_flood(struct dsa_switch *ds, int port,
723 bool uc, bool mc)
724 {
725 struct ocelot *ocelot = ds->priv;
726 struct felix *felix = ocelot_to_felix(ocelot);
727 unsigned long mask;
728
729 if (uc)
730 felix->host_flood_uc_mask |= BIT(port);
731 else
732 felix->host_flood_uc_mask &= ~BIT(port);
733
734 if (mc)
735 felix->host_flood_mc_mask |= BIT(port);
736 else
737 felix->host_flood_mc_mask &= ~BIT(port);
738
739 mask = felix->tag_proto_ops->get_host_fwd_mask(ds);
740 felix_set_host_flood(ds, mask, !!felix->host_flood_uc_mask,
741 !!felix->host_flood_mc_mask, true);
742 }
743
felix_port_change_master(struct dsa_switch * ds,int port,struct net_device * master,struct netlink_ext_ack * extack)744 static int felix_port_change_master(struct dsa_switch *ds, int port,
745 struct net_device *master,
746 struct netlink_ext_ack *extack)
747 {
748 struct ocelot *ocelot = ds->priv;
749 struct felix *felix = ocelot_to_felix(ocelot);
750
751 return felix->tag_proto_ops->change_master(ds, port, master, extack);
752 }
753
felix_set_ageing_time(struct dsa_switch * ds,unsigned int ageing_time)754 static int felix_set_ageing_time(struct dsa_switch *ds,
755 unsigned int ageing_time)
756 {
757 struct ocelot *ocelot = ds->priv;
758
759 ocelot_set_ageing_time(ocelot, ageing_time);
760
761 return 0;
762 }
763
felix_port_fast_age(struct dsa_switch * ds,int port)764 static void felix_port_fast_age(struct dsa_switch *ds, int port)
765 {
766 struct ocelot *ocelot = ds->priv;
767 int err;
768
769 err = ocelot_mact_flush(ocelot, port);
770 if (err)
771 dev_err(ds->dev, "Flushing MAC table on port %d returned %pe\n",
772 port, ERR_PTR(err));
773 }
774
felix_fdb_dump(struct dsa_switch * ds,int port,dsa_fdb_dump_cb_t * cb,void * data)775 static int felix_fdb_dump(struct dsa_switch *ds, int port,
776 dsa_fdb_dump_cb_t *cb, void *data)
777 {
778 struct ocelot *ocelot = ds->priv;
779
780 return ocelot_fdb_dump(ocelot, port, cb, data);
781 }
782
felix_fdb_add(struct dsa_switch * ds,int port,const unsigned char * addr,u16 vid,struct dsa_db db)783 static int felix_fdb_add(struct dsa_switch *ds, int port,
784 const unsigned char *addr, u16 vid,
785 struct dsa_db db)
786 {
787 struct net_device *bridge_dev = felix_classify_db(db);
788 struct dsa_port *dp = dsa_to_port(ds, port);
789 struct ocelot *ocelot = ds->priv;
790
791 if (IS_ERR(bridge_dev))
792 return PTR_ERR(bridge_dev);
793
794 if (dsa_port_is_cpu(dp) && !bridge_dev &&
795 dsa_fdb_present_in_other_db(ds, port, addr, vid, db))
796 return 0;
797
798 if (dsa_port_is_cpu(dp))
799 port = PGID_CPU;
800
801 return ocelot_fdb_add(ocelot, port, addr, vid, bridge_dev);
802 }
803
felix_fdb_del(struct dsa_switch * ds,int port,const unsigned char * addr,u16 vid,struct dsa_db db)804 static int felix_fdb_del(struct dsa_switch *ds, int port,
805 const unsigned char *addr, u16 vid,
806 struct dsa_db db)
807 {
808 struct net_device *bridge_dev = felix_classify_db(db);
809 struct dsa_port *dp = dsa_to_port(ds, port);
810 struct ocelot *ocelot = ds->priv;
811
812 if (IS_ERR(bridge_dev))
813 return PTR_ERR(bridge_dev);
814
815 if (dsa_port_is_cpu(dp) && !bridge_dev &&
816 dsa_fdb_present_in_other_db(ds, port, addr, vid, db))
817 return 0;
818
819 if (dsa_port_is_cpu(dp))
820 port = PGID_CPU;
821
822 return ocelot_fdb_del(ocelot, port, addr, vid, bridge_dev);
823 }
824
felix_lag_fdb_add(struct dsa_switch * ds,struct dsa_lag lag,const unsigned char * addr,u16 vid,struct dsa_db db)825 static int felix_lag_fdb_add(struct dsa_switch *ds, struct dsa_lag lag,
826 const unsigned char *addr, u16 vid,
827 struct dsa_db db)
828 {
829 struct net_device *bridge_dev = felix_classify_db(db);
830 struct ocelot *ocelot = ds->priv;
831
832 if (IS_ERR(bridge_dev))
833 return PTR_ERR(bridge_dev);
834
835 return ocelot_lag_fdb_add(ocelot, lag.dev, addr, vid, bridge_dev);
836 }
837
felix_lag_fdb_del(struct dsa_switch * ds,struct dsa_lag lag,const unsigned char * addr,u16 vid,struct dsa_db db)838 static int felix_lag_fdb_del(struct dsa_switch *ds, struct dsa_lag lag,
839 const unsigned char *addr, u16 vid,
840 struct dsa_db db)
841 {
842 struct net_device *bridge_dev = felix_classify_db(db);
843 struct ocelot *ocelot = ds->priv;
844
845 if (IS_ERR(bridge_dev))
846 return PTR_ERR(bridge_dev);
847
848 return ocelot_lag_fdb_del(ocelot, lag.dev, addr, vid, bridge_dev);
849 }
850
felix_mdb_add(struct dsa_switch * ds,int port,const struct switchdev_obj_port_mdb * mdb,struct dsa_db db)851 static int felix_mdb_add(struct dsa_switch *ds, int port,
852 const struct switchdev_obj_port_mdb *mdb,
853 struct dsa_db db)
854 {
855 struct net_device *bridge_dev = felix_classify_db(db);
856 struct ocelot *ocelot = ds->priv;
857
858 if (IS_ERR(bridge_dev))
859 return PTR_ERR(bridge_dev);
860
861 if (dsa_is_cpu_port(ds, port) && !bridge_dev &&
862 dsa_mdb_present_in_other_db(ds, port, mdb, db))
863 return 0;
864
865 if (port == ocelot->npi)
866 port = ocelot->num_phys_ports;
867
868 return ocelot_port_mdb_add(ocelot, port, mdb, bridge_dev);
869 }
870
felix_mdb_del(struct dsa_switch * ds,int port,const struct switchdev_obj_port_mdb * mdb,struct dsa_db db)871 static int felix_mdb_del(struct dsa_switch *ds, int port,
872 const struct switchdev_obj_port_mdb *mdb,
873 struct dsa_db db)
874 {
875 struct net_device *bridge_dev = felix_classify_db(db);
876 struct ocelot *ocelot = ds->priv;
877
878 if (IS_ERR(bridge_dev))
879 return PTR_ERR(bridge_dev);
880
881 if (dsa_is_cpu_port(ds, port) && !bridge_dev &&
882 dsa_mdb_present_in_other_db(ds, port, mdb, db))
883 return 0;
884
885 if (port == ocelot->npi)
886 port = ocelot->num_phys_ports;
887
888 return ocelot_port_mdb_del(ocelot, port, mdb, bridge_dev);
889 }
890
felix_bridge_stp_state_set(struct dsa_switch * ds,int port,u8 state)891 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port,
892 u8 state)
893 {
894 struct ocelot *ocelot = ds->priv;
895
896 return ocelot_bridge_stp_state_set(ocelot, port, state);
897 }
898
felix_pre_bridge_flags(struct dsa_switch * ds,int port,struct switchdev_brport_flags val,struct netlink_ext_ack * extack)899 static int felix_pre_bridge_flags(struct dsa_switch *ds, int port,
900 struct switchdev_brport_flags val,
901 struct netlink_ext_ack *extack)
902 {
903 struct ocelot *ocelot = ds->priv;
904
905 return ocelot_port_pre_bridge_flags(ocelot, port, val);
906 }
907
felix_bridge_flags(struct dsa_switch * ds,int port,struct switchdev_brport_flags val,struct netlink_ext_ack * extack)908 static int felix_bridge_flags(struct dsa_switch *ds, int port,
909 struct switchdev_brport_flags val,
910 struct netlink_ext_ack *extack)
911 {
912 struct ocelot *ocelot = ds->priv;
913
914 if (port == ocelot->npi)
915 port = ocelot->num_phys_ports;
916
917 ocelot_port_bridge_flags(ocelot, port, val);
918
919 return 0;
920 }
921
felix_bridge_join(struct dsa_switch * ds,int port,struct dsa_bridge bridge,bool * tx_fwd_offload,struct netlink_ext_ack * extack)922 static int felix_bridge_join(struct dsa_switch *ds, int port,
923 struct dsa_bridge bridge, bool *tx_fwd_offload,
924 struct netlink_ext_ack *extack)
925 {
926 struct ocelot *ocelot = ds->priv;
927
928 return ocelot_port_bridge_join(ocelot, port, bridge.dev, bridge.num,
929 extack);
930 }
931
felix_bridge_leave(struct dsa_switch * ds,int port,struct dsa_bridge bridge)932 static void felix_bridge_leave(struct dsa_switch *ds, int port,
933 struct dsa_bridge bridge)
934 {
935 struct ocelot *ocelot = ds->priv;
936
937 ocelot_port_bridge_leave(ocelot, port, bridge.dev);
938 }
939
felix_lag_join(struct dsa_switch * ds,int port,struct dsa_lag lag,struct netdev_lag_upper_info * info,struct netlink_ext_ack * extack)940 static int felix_lag_join(struct dsa_switch *ds, int port,
941 struct dsa_lag lag,
942 struct netdev_lag_upper_info *info,
943 struct netlink_ext_ack *extack)
944 {
945 struct ocelot *ocelot = ds->priv;
946 int err;
947
948 err = ocelot_port_lag_join(ocelot, port, lag.dev, info, extack);
949 if (err)
950 return err;
951
952 /* Update the logical LAG port that serves as tag_8021q CPU port */
953 if (!dsa_is_cpu_port(ds, port))
954 return 0;
955
956 return felix_port_change_master(ds, port, lag.dev, extack);
957 }
958
felix_lag_leave(struct dsa_switch * ds,int port,struct dsa_lag lag)959 static int felix_lag_leave(struct dsa_switch *ds, int port,
960 struct dsa_lag lag)
961 {
962 struct ocelot *ocelot = ds->priv;
963
964 ocelot_port_lag_leave(ocelot, port, lag.dev);
965
966 /* Update the logical LAG port that serves as tag_8021q CPU port */
967 if (!dsa_is_cpu_port(ds, port))
968 return 0;
969
970 return felix_port_change_master(ds, port, lag.dev, NULL);
971 }
972
felix_lag_change(struct dsa_switch * ds,int port)973 static int felix_lag_change(struct dsa_switch *ds, int port)
974 {
975 struct dsa_port *dp = dsa_to_port(ds, port);
976 struct ocelot *ocelot = ds->priv;
977
978 ocelot_port_lag_change(ocelot, port, dp->lag_tx_enabled);
979
980 return 0;
981 }
982
felix_vlan_prepare(struct dsa_switch * ds,int port,const struct switchdev_obj_port_vlan * vlan,struct netlink_ext_ack * extack)983 static int felix_vlan_prepare(struct dsa_switch *ds, int port,
984 const struct switchdev_obj_port_vlan *vlan,
985 struct netlink_ext_ack *extack)
986 {
987 struct ocelot *ocelot = ds->priv;
988 u16 flags = vlan->flags;
989
990 /* Ocelot switches copy frames as-is to the CPU, so the flags:
991 * egress-untagged or not, pvid or not, make no difference. This
992 * behavior is already better than what DSA just tries to approximate
993 * when it installs the VLAN with the same flags on the CPU port.
994 * Just accept any configuration, and don't let ocelot deny installing
995 * multiple native VLANs on the NPI port, because the switch doesn't
996 * look at the port tag settings towards the NPI interface anyway.
997 */
998 if (port == ocelot->npi)
999 return 0;
1000
1001 return ocelot_vlan_prepare(ocelot, port, vlan->vid,
1002 flags & BRIDGE_VLAN_INFO_PVID,
1003 flags & BRIDGE_VLAN_INFO_UNTAGGED,
1004 extack);
1005 }
1006
felix_vlan_filtering(struct dsa_switch * ds,int port,bool enabled,struct netlink_ext_ack * extack)1007 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
1008 struct netlink_ext_ack *extack)
1009 {
1010 struct ocelot *ocelot = ds->priv;
1011
1012 return ocelot_port_vlan_filtering(ocelot, port, enabled, extack);
1013 }
1014
felix_vlan_add(struct dsa_switch * ds,int port,const struct switchdev_obj_port_vlan * vlan,struct netlink_ext_ack * extack)1015 static int felix_vlan_add(struct dsa_switch *ds, int port,
1016 const struct switchdev_obj_port_vlan *vlan,
1017 struct netlink_ext_ack *extack)
1018 {
1019 struct ocelot *ocelot = ds->priv;
1020 u16 flags = vlan->flags;
1021 int err;
1022
1023 err = felix_vlan_prepare(ds, port, vlan, extack);
1024 if (err)
1025 return err;
1026
1027 return ocelot_vlan_add(ocelot, port, vlan->vid,
1028 flags & BRIDGE_VLAN_INFO_PVID,
1029 flags & BRIDGE_VLAN_INFO_UNTAGGED);
1030 }
1031
felix_vlan_del(struct dsa_switch * ds,int port,const struct switchdev_obj_port_vlan * vlan)1032 static int felix_vlan_del(struct dsa_switch *ds, int port,
1033 const struct switchdev_obj_port_vlan *vlan)
1034 {
1035 struct ocelot *ocelot = ds->priv;
1036
1037 return ocelot_vlan_del(ocelot, port, vlan->vid);
1038 }
1039
felix_phylink_get_caps(struct dsa_switch * ds,int port,struct phylink_config * config)1040 static void felix_phylink_get_caps(struct dsa_switch *ds, int port,
1041 struct phylink_config *config)
1042 {
1043 struct ocelot *ocelot = ds->priv;
1044
1045 /* This driver does not make use of the speed, duplex, pause or the
1046 * advertisement in its mac_config, so it is safe to mark this driver
1047 * as non-legacy.
1048 */
1049 config->legacy_pre_march2020 = false;
1050
1051 __set_bit(ocelot->ports[port]->phy_mode,
1052 config->supported_interfaces);
1053 }
1054
felix_phylink_validate(struct dsa_switch * ds,int port,unsigned long * supported,struct phylink_link_state * state)1055 static void felix_phylink_validate(struct dsa_switch *ds, int port,
1056 unsigned long *supported,
1057 struct phylink_link_state *state)
1058 {
1059 struct ocelot *ocelot = ds->priv;
1060 struct felix *felix = ocelot_to_felix(ocelot);
1061
1062 if (felix->info->phylink_validate)
1063 felix->info->phylink_validate(ocelot, port, supported, state);
1064 }
1065
felix_phylink_mac_select_pcs(struct dsa_switch * ds,int port,phy_interface_t iface)1066 static struct phylink_pcs *felix_phylink_mac_select_pcs(struct dsa_switch *ds,
1067 int port,
1068 phy_interface_t iface)
1069 {
1070 struct ocelot *ocelot = ds->priv;
1071 struct felix *felix = ocelot_to_felix(ocelot);
1072 struct phylink_pcs *pcs = NULL;
1073
1074 if (felix->pcs && felix->pcs[port])
1075 pcs = felix->pcs[port];
1076
1077 return pcs;
1078 }
1079
felix_phylink_mac_link_down(struct dsa_switch * ds,int port,unsigned int link_an_mode,phy_interface_t interface)1080 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port,
1081 unsigned int link_an_mode,
1082 phy_interface_t interface)
1083 {
1084 struct ocelot *ocelot = ds->priv;
1085
1086 ocelot_phylink_mac_link_down(ocelot, port, link_an_mode, interface,
1087 FELIX_MAC_QUIRKS);
1088 }
1089
felix_phylink_mac_link_up(struct dsa_switch * ds,int port,unsigned int link_an_mode,phy_interface_t interface,struct phy_device * phydev,int speed,int duplex,bool tx_pause,bool rx_pause)1090 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port,
1091 unsigned int link_an_mode,
1092 phy_interface_t interface,
1093 struct phy_device *phydev,
1094 int speed, int duplex,
1095 bool tx_pause, bool rx_pause)
1096 {
1097 struct ocelot *ocelot = ds->priv;
1098 struct felix *felix = ocelot_to_felix(ocelot);
1099
1100 ocelot_phylink_mac_link_up(ocelot, port, phydev, link_an_mode,
1101 interface, speed, duplex, tx_pause, rx_pause,
1102 FELIX_MAC_QUIRKS);
1103
1104 if (felix->info->port_sched_speed_set)
1105 felix->info->port_sched_speed_set(ocelot, port, speed);
1106 }
1107
felix_port_enable(struct dsa_switch * ds,int port,struct phy_device * phydev)1108 static int felix_port_enable(struct dsa_switch *ds, int port,
1109 struct phy_device *phydev)
1110 {
1111 struct dsa_port *dp = dsa_to_port(ds, port);
1112 struct ocelot *ocelot = ds->priv;
1113
1114 if (!dsa_port_is_user(dp))
1115 return 0;
1116
1117 if (ocelot->npi >= 0) {
1118 struct net_device *master = dsa_port_to_master(dp);
1119
1120 if (felix_cpu_port_for_master(ds, master) != ocelot->npi) {
1121 dev_err(ds->dev, "Multiple masters are not allowed\n");
1122 return -EINVAL;
1123 }
1124 }
1125
1126 return 0;
1127 }
1128
felix_port_qos_map_init(struct ocelot * ocelot,int port)1129 static void felix_port_qos_map_init(struct ocelot *ocelot, int port)
1130 {
1131 int i;
1132
1133 ocelot_rmw_gix(ocelot,
1134 ANA_PORT_QOS_CFG_QOS_PCP_ENA,
1135 ANA_PORT_QOS_CFG_QOS_PCP_ENA,
1136 ANA_PORT_QOS_CFG,
1137 port);
1138
1139 for (i = 0; i < OCELOT_NUM_TC * 2; i++) {
1140 ocelot_rmw_ix(ocelot,
1141 (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) |
1142 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),
1143 ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |
1144 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,
1145 ANA_PORT_PCP_DEI_MAP,
1146 port, i);
1147 }
1148 }
1149
felix_get_stats64(struct dsa_switch * ds,int port,struct rtnl_link_stats64 * stats)1150 static void felix_get_stats64(struct dsa_switch *ds, int port,
1151 struct rtnl_link_stats64 *stats)
1152 {
1153 struct ocelot *ocelot = ds->priv;
1154
1155 ocelot_port_get_stats64(ocelot, port, stats);
1156 }
1157
felix_get_pause_stats(struct dsa_switch * ds,int port,struct ethtool_pause_stats * pause_stats)1158 static void felix_get_pause_stats(struct dsa_switch *ds, int port,
1159 struct ethtool_pause_stats *pause_stats)
1160 {
1161 struct ocelot *ocelot = ds->priv;
1162
1163 ocelot_port_get_pause_stats(ocelot, port, pause_stats);
1164 }
1165
felix_get_rmon_stats(struct dsa_switch * ds,int port,struct ethtool_rmon_stats * rmon_stats,const struct ethtool_rmon_hist_range ** ranges)1166 static void felix_get_rmon_stats(struct dsa_switch *ds, int port,
1167 struct ethtool_rmon_stats *rmon_stats,
1168 const struct ethtool_rmon_hist_range **ranges)
1169 {
1170 struct ocelot *ocelot = ds->priv;
1171
1172 ocelot_port_get_rmon_stats(ocelot, port, rmon_stats, ranges);
1173 }
1174
felix_get_eth_ctrl_stats(struct dsa_switch * ds,int port,struct ethtool_eth_ctrl_stats * ctrl_stats)1175 static void felix_get_eth_ctrl_stats(struct dsa_switch *ds, int port,
1176 struct ethtool_eth_ctrl_stats *ctrl_stats)
1177 {
1178 struct ocelot *ocelot = ds->priv;
1179
1180 ocelot_port_get_eth_ctrl_stats(ocelot, port, ctrl_stats);
1181 }
1182
felix_get_eth_mac_stats(struct dsa_switch * ds,int port,struct ethtool_eth_mac_stats * mac_stats)1183 static void felix_get_eth_mac_stats(struct dsa_switch *ds, int port,
1184 struct ethtool_eth_mac_stats *mac_stats)
1185 {
1186 struct ocelot *ocelot = ds->priv;
1187
1188 ocelot_port_get_eth_mac_stats(ocelot, port, mac_stats);
1189 }
1190
felix_get_eth_phy_stats(struct dsa_switch * ds,int port,struct ethtool_eth_phy_stats * phy_stats)1191 static void felix_get_eth_phy_stats(struct dsa_switch *ds, int port,
1192 struct ethtool_eth_phy_stats *phy_stats)
1193 {
1194 struct ocelot *ocelot = ds->priv;
1195
1196 ocelot_port_get_eth_phy_stats(ocelot, port, phy_stats);
1197 }
1198
felix_get_strings(struct dsa_switch * ds,int port,u32 stringset,u8 * data)1199 static void felix_get_strings(struct dsa_switch *ds, int port,
1200 u32 stringset, u8 *data)
1201 {
1202 struct ocelot *ocelot = ds->priv;
1203
1204 return ocelot_get_strings(ocelot, port, stringset, data);
1205 }
1206
felix_get_ethtool_stats(struct dsa_switch * ds,int port,u64 * data)1207 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)
1208 {
1209 struct ocelot *ocelot = ds->priv;
1210
1211 ocelot_get_ethtool_stats(ocelot, port, data);
1212 }
1213
felix_get_sset_count(struct dsa_switch * ds,int port,int sset)1214 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset)
1215 {
1216 struct ocelot *ocelot = ds->priv;
1217
1218 return ocelot_get_sset_count(ocelot, port, sset);
1219 }
1220
felix_get_ts_info(struct dsa_switch * ds,int port,struct ethtool_ts_info * info)1221 static int felix_get_ts_info(struct dsa_switch *ds, int port,
1222 struct ethtool_ts_info *info)
1223 {
1224 struct ocelot *ocelot = ds->priv;
1225
1226 return ocelot_get_ts_info(ocelot, port, info);
1227 }
1228
1229 static const u32 felix_phy_match_table[PHY_INTERFACE_MODE_MAX] = {
1230 [PHY_INTERFACE_MODE_INTERNAL] = OCELOT_PORT_MODE_INTERNAL,
1231 [PHY_INTERFACE_MODE_SGMII] = OCELOT_PORT_MODE_SGMII,
1232 [PHY_INTERFACE_MODE_QSGMII] = OCELOT_PORT_MODE_QSGMII,
1233 [PHY_INTERFACE_MODE_USXGMII] = OCELOT_PORT_MODE_USXGMII,
1234 [PHY_INTERFACE_MODE_1000BASEX] = OCELOT_PORT_MODE_1000BASEX,
1235 [PHY_INTERFACE_MODE_2500BASEX] = OCELOT_PORT_MODE_2500BASEX,
1236 };
1237
felix_validate_phy_mode(struct felix * felix,int port,phy_interface_t phy_mode)1238 static int felix_validate_phy_mode(struct felix *felix, int port,
1239 phy_interface_t phy_mode)
1240 {
1241 u32 modes = felix->info->port_modes[port];
1242
1243 if (felix_phy_match_table[phy_mode] & modes)
1244 return 0;
1245 return -EOPNOTSUPP;
1246 }
1247
felix_parse_ports_node(struct felix * felix,struct device_node * ports_node,phy_interface_t * port_phy_modes)1248 static int felix_parse_ports_node(struct felix *felix,
1249 struct device_node *ports_node,
1250 phy_interface_t *port_phy_modes)
1251 {
1252 struct device *dev = felix->ocelot.dev;
1253 struct device_node *child;
1254
1255 for_each_available_child_of_node(ports_node, child) {
1256 phy_interface_t phy_mode;
1257 u32 port;
1258 int err;
1259
1260 /* Get switch port number from DT */
1261 if (of_property_read_u32(child, "reg", &port) < 0) {
1262 dev_err(dev, "Port number not defined in device tree "
1263 "(property \"reg\")\n");
1264 of_node_put(child);
1265 return -ENODEV;
1266 }
1267
1268 /* Get PHY mode from DT */
1269 err = of_get_phy_mode(child, &phy_mode);
1270 if (err) {
1271 dev_err(dev, "Failed to read phy-mode or "
1272 "phy-interface-type property for port %d\n",
1273 port);
1274 of_node_put(child);
1275 return -ENODEV;
1276 }
1277
1278 err = felix_validate_phy_mode(felix, port, phy_mode);
1279 if (err < 0) {
1280 dev_err(dev, "Unsupported PHY mode %s on port %d\n",
1281 phy_modes(phy_mode), port);
1282 of_node_put(child);
1283 return err;
1284 }
1285
1286 port_phy_modes[port] = phy_mode;
1287 }
1288
1289 return 0;
1290 }
1291
felix_parse_dt(struct felix * felix,phy_interface_t * port_phy_modes)1292 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes)
1293 {
1294 struct device *dev = felix->ocelot.dev;
1295 struct device_node *switch_node;
1296 struct device_node *ports_node;
1297 int err;
1298
1299 switch_node = dev->of_node;
1300
1301 ports_node = of_get_child_by_name(switch_node, "ports");
1302 if (!ports_node)
1303 ports_node = of_get_child_by_name(switch_node, "ethernet-ports");
1304 if (!ports_node) {
1305 dev_err(dev, "Incorrect bindings: absent \"ports\" or \"ethernet-ports\" node\n");
1306 return -ENODEV;
1307 }
1308
1309 err = felix_parse_ports_node(felix, ports_node, port_phy_modes);
1310 of_node_put(ports_node);
1311
1312 return err;
1313 }
1314
felix_request_regmap_by_name(struct felix * felix,const char * resource_name)1315 static struct regmap *felix_request_regmap_by_name(struct felix *felix,
1316 const char *resource_name)
1317 {
1318 struct ocelot *ocelot = &felix->ocelot;
1319 struct resource res;
1320 int i;
1321
1322 for (i = 0; i < felix->info->num_resources; i++) {
1323 if (strcmp(resource_name, felix->info->resources[i].name))
1324 continue;
1325
1326 memcpy(&res, &felix->info->resources[i], sizeof(res));
1327 res.start += felix->switch_base;
1328 res.end += felix->switch_base;
1329
1330 return ocelot_regmap_init(ocelot, &res);
1331 }
1332
1333 return ERR_PTR(-ENOENT);
1334 }
1335
felix_request_regmap(struct felix * felix,enum ocelot_target target)1336 static struct regmap *felix_request_regmap(struct felix *felix,
1337 enum ocelot_target target)
1338 {
1339 const char *resource_name = felix->info->resource_names[target];
1340
1341 /* If the driver didn't provide a resource name for the target,
1342 * the resource is optional.
1343 */
1344 if (!resource_name)
1345 return NULL;
1346
1347 return felix_request_regmap_by_name(felix, resource_name);
1348 }
1349
felix_request_port_regmap(struct felix * felix,int port)1350 static struct regmap *felix_request_port_regmap(struct felix *felix, int port)
1351 {
1352 char resource_name[32];
1353
1354 sprintf(resource_name, "port%d", port);
1355
1356 return felix_request_regmap_by_name(felix, resource_name);
1357 }
1358
felix_init_structs(struct felix * felix,int num_phys_ports)1359 static int felix_init_structs(struct felix *felix, int num_phys_ports)
1360 {
1361 struct ocelot *ocelot = &felix->ocelot;
1362 phy_interface_t *port_phy_modes;
1363 struct regmap *target;
1364 int port, i, err;
1365
1366 ocelot->num_phys_ports = num_phys_ports;
1367 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports,
1368 sizeof(struct ocelot_port *), GFP_KERNEL);
1369 if (!ocelot->ports)
1370 return -ENOMEM;
1371
1372 ocelot->map = felix->info->map;
1373 ocelot->stats_layout = felix->info->stats_layout;
1374 ocelot->num_mact_rows = felix->info->num_mact_rows;
1375 ocelot->vcap = felix->info->vcap;
1376 ocelot->vcap_pol.base = felix->info->vcap_pol_base;
1377 ocelot->vcap_pol.max = felix->info->vcap_pol_max;
1378 ocelot->vcap_pol.base2 = felix->info->vcap_pol_base2;
1379 ocelot->vcap_pol.max2 = felix->info->vcap_pol_max2;
1380 ocelot->ops = felix->info->ops;
1381 ocelot->npi_inj_prefix = OCELOT_TAG_PREFIX_SHORT;
1382 ocelot->npi_xtr_prefix = OCELOT_TAG_PREFIX_SHORT;
1383 ocelot->devlink = felix->ds->devlink;
1384
1385 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
1386 GFP_KERNEL);
1387 if (!port_phy_modes)
1388 return -ENOMEM;
1389
1390 err = felix_parse_dt(felix, port_phy_modes);
1391 if (err) {
1392 kfree(port_phy_modes);
1393 return err;
1394 }
1395
1396 for (i = 0; i < TARGET_MAX; i++) {
1397 target = felix_request_regmap(felix, i);
1398 if (IS_ERR(target)) {
1399 dev_err(ocelot->dev,
1400 "Failed to map device memory space: %pe\n",
1401 target);
1402 kfree(port_phy_modes);
1403 return PTR_ERR(target);
1404 }
1405
1406 ocelot->targets[i] = target;
1407 }
1408
1409 err = ocelot_regfields_init(ocelot, felix->info->regfields);
1410 if (err) {
1411 dev_err(ocelot->dev, "failed to init reg fields map\n");
1412 kfree(port_phy_modes);
1413 return err;
1414 }
1415
1416 for (port = 0; port < num_phys_ports; port++) {
1417 struct ocelot_port *ocelot_port;
1418
1419 ocelot_port = devm_kzalloc(ocelot->dev,
1420 sizeof(struct ocelot_port),
1421 GFP_KERNEL);
1422 if (!ocelot_port) {
1423 dev_err(ocelot->dev,
1424 "failed to allocate port memory\n");
1425 kfree(port_phy_modes);
1426 return -ENOMEM;
1427 }
1428
1429 target = felix_request_port_regmap(felix, port);
1430 if (IS_ERR(target)) {
1431 dev_err(ocelot->dev,
1432 "Failed to map memory space for port %d: %pe\n",
1433 port, target);
1434 kfree(port_phy_modes);
1435 return PTR_ERR(target);
1436 }
1437
1438 ocelot_port->phy_mode = port_phy_modes[port];
1439 ocelot_port->ocelot = ocelot;
1440 ocelot_port->target = target;
1441 ocelot_port->index = port;
1442 ocelot->ports[port] = ocelot_port;
1443 }
1444
1445 kfree(port_phy_modes);
1446
1447 if (felix->info->mdio_bus_alloc) {
1448 err = felix->info->mdio_bus_alloc(ocelot);
1449 if (err < 0)
1450 return err;
1451 }
1452
1453 return 0;
1454 }
1455
ocelot_port_purge_txtstamp_skb(struct ocelot * ocelot,int port,struct sk_buff * skb)1456 static void ocelot_port_purge_txtstamp_skb(struct ocelot *ocelot, int port,
1457 struct sk_buff *skb)
1458 {
1459 struct ocelot_port *ocelot_port = ocelot->ports[port];
1460 struct sk_buff *clone = OCELOT_SKB_CB(skb)->clone;
1461 struct sk_buff *skb_match = NULL, *skb_tmp;
1462 unsigned long flags;
1463
1464 if (!clone)
1465 return;
1466
1467 spin_lock_irqsave(&ocelot_port->tx_skbs.lock, flags);
1468
1469 skb_queue_walk_safe(&ocelot_port->tx_skbs, skb, skb_tmp) {
1470 if (skb != clone)
1471 continue;
1472 __skb_unlink(skb, &ocelot_port->tx_skbs);
1473 skb_match = skb;
1474 break;
1475 }
1476
1477 spin_unlock_irqrestore(&ocelot_port->tx_skbs.lock, flags);
1478
1479 WARN_ONCE(!skb_match,
1480 "Could not find skb clone in TX timestamping list\n");
1481 }
1482
1483 #define work_to_xmit_work(w) \
1484 container_of((w), struct felix_deferred_xmit_work, work)
1485
felix_port_deferred_xmit(struct kthread_work * work)1486 static void felix_port_deferred_xmit(struct kthread_work *work)
1487 {
1488 struct felix_deferred_xmit_work *xmit_work = work_to_xmit_work(work);
1489 struct dsa_switch *ds = xmit_work->dp->ds;
1490 struct sk_buff *skb = xmit_work->skb;
1491 u32 rew_op = ocelot_ptp_rew_op(skb);
1492 struct ocelot *ocelot = ds->priv;
1493 int port = xmit_work->dp->index;
1494 int retries = 10;
1495
1496 do {
1497 if (ocelot_can_inject(ocelot, 0))
1498 break;
1499
1500 cpu_relax();
1501 } while (--retries);
1502
1503 if (!retries) {
1504 dev_err(ocelot->dev, "port %d failed to inject skb\n",
1505 port);
1506 ocelot_port_purge_txtstamp_skb(ocelot, port, skb);
1507 kfree_skb(skb);
1508 return;
1509 }
1510
1511 ocelot_port_inject_frame(ocelot, port, 0, rew_op, skb);
1512
1513 consume_skb(skb);
1514 kfree(xmit_work);
1515 }
1516
felix_connect_tag_protocol(struct dsa_switch * ds,enum dsa_tag_protocol proto)1517 static int felix_connect_tag_protocol(struct dsa_switch *ds,
1518 enum dsa_tag_protocol proto)
1519 {
1520 struct ocelot_8021q_tagger_data *tagger_data;
1521
1522 switch (proto) {
1523 case DSA_TAG_PROTO_OCELOT_8021Q:
1524 tagger_data = ocelot_8021q_tagger_data(ds);
1525 tagger_data->xmit_work_fn = felix_port_deferred_xmit;
1526 return 0;
1527 case DSA_TAG_PROTO_OCELOT:
1528 case DSA_TAG_PROTO_SEVILLE:
1529 return 0;
1530 default:
1531 return -EPROTONOSUPPORT;
1532 }
1533 }
1534
1535 /* Hardware initialization done here so that we can allocate structures with
1536 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing
1537 * us to allocate structures twice (leak memory) and map PCI memory twice
1538 * (which will not work).
1539 */
felix_setup(struct dsa_switch * ds)1540 static int felix_setup(struct dsa_switch *ds)
1541 {
1542 struct ocelot *ocelot = ds->priv;
1543 struct felix *felix = ocelot_to_felix(ocelot);
1544 struct dsa_port *dp;
1545 int err;
1546
1547 err = felix_init_structs(felix, ds->num_ports);
1548 if (err)
1549 return err;
1550
1551 err = ocelot_init(ocelot);
1552 if (err)
1553 goto out_mdiobus_free;
1554
1555 if (ocelot->ptp) {
1556 err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps);
1557 if (err) {
1558 dev_err(ocelot->dev,
1559 "Timestamp initialization failed\n");
1560 ocelot->ptp = 0;
1561 }
1562 }
1563
1564 dsa_switch_for_each_available_port(dp, ds) {
1565 ocelot_init_port(ocelot, dp->index);
1566
1567 /* Set the default QoS Classification based on PCP and DEI
1568 * bits of vlan tag.
1569 */
1570 felix_port_qos_map_init(ocelot, dp->index);
1571 }
1572
1573 err = ocelot_devlink_sb_register(ocelot);
1574 if (err)
1575 goto out_deinit_ports;
1576
1577 /* The initial tag protocol is NPI which won't fail during initial
1578 * setup, there's no real point in checking for errors.
1579 */
1580 felix_change_tag_protocol(ds, felix->tag_proto);
1581
1582 ds->mtu_enforcement_ingress = true;
1583 ds->assisted_learning_on_cpu_port = true;
1584 ds->fdb_isolation = true;
1585 ds->max_num_bridges = ds->num_ports;
1586
1587 return 0;
1588
1589 out_deinit_ports:
1590 dsa_switch_for_each_available_port(dp, ds)
1591 ocelot_deinit_port(ocelot, dp->index);
1592
1593 ocelot_deinit_timestamp(ocelot);
1594 ocelot_deinit(ocelot);
1595
1596 out_mdiobus_free:
1597 if (felix->info->mdio_bus_free)
1598 felix->info->mdio_bus_free(ocelot);
1599
1600 return err;
1601 }
1602
felix_teardown(struct dsa_switch * ds)1603 static void felix_teardown(struct dsa_switch *ds)
1604 {
1605 struct ocelot *ocelot = ds->priv;
1606 struct felix *felix = ocelot_to_felix(ocelot);
1607 struct dsa_port *dp;
1608
1609 rtnl_lock();
1610 if (felix->tag_proto_ops)
1611 felix->tag_proto_ops->teardown(ds);
1612 rtnl_unlock();
1613
1614 dsa_switch_for_each_available_port(dp, ds)
1615 ocelot_deinit_port(ocelot, dp->index);
1616
1617 ocelot_devlink_sb_unregister(ocelot);
1618 ocelot_deinit_timestamp(ocelot);
1619 ocelot_deinit(ocelot);
1620
1621 if (felix->info->mdio_bus_free)
1622 felix->info->mdio_bus_free(ocelot);
1623 }
1624
felix_hwtstamp_get(struct dsa_switch * ds,int port,struct ifreq * ifr)1625 static int felix_hwtstamp_get(struct dsa_switch *ds, int port,
1626 struct ifreq *ifr)
1627 {
1628 struct ocelot *ocelot = ds->priv;
1629
1630 return ocelot_hwstamp_get(ocelot, port, ifr);
1631 }
1632
felix_hwtstamp_set(struct dsa_switch * ds,int port,struct ifreq * ifr)1633 static int felix_hwtstamp_set(struct dsa_switch *ds, int port,
1634 struct ifreq *ifr)
1635 {
1636 struct ocelot *ocelot = ds->priv;
1637 struct felix *felix = ocelot_to_felix(ocelot);
1638 bool using_tag_8021q;
1639 int err;
1640
1641 err = ocelot_hwstamp_set(ocelot, port, ifr);
1642 if (err)
1643 return err;
1644
1645 using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
1646
1647 return felix_update_trapping_destinations(ds, using_tag_8021q);
1648 }
1649
felix_check_xtr_pkt(struct ocelot * ocelot)1650 static bool felix_check_xtr_pkt(struct ocelot *ocelot)
1651 {
1652 struct felix *felix = ocelot_to_felix(ocelot);
1653 int err = 0, grp = 0;
1654
1655 if (felix->tag_proto != DSA_TAG_PROTO_OCELOT_8021Q)
1656 return false;
1657
1658 if (!felix->info->quirk_no_xtr_irq)
1659 return false;
1660
1661 while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp)) {
1662 struct sk_buff *skb;
1663 unsigned int type;
1664
1665 err = ocelot_xtr_poll_frame(ocelot, grp, &skb);
1666 if (err)
1667 goto out;
1668
1669 /* We trap to the CPU port module all PTP frames, but
1670 * felix_rxtstamp() only gets called for event frames.
1671 * So we need to avoid sending duplicate general
1672 * message frames by running a second BPF classifier
1673 * here and dropping those.
1674 */
1675 __skb_push(skb, ETH_HLEN);
1676
1677 type = ptp_classify_raw(skb);
1678
1679 __skb_pull(skb, ETH_HLEN);
1680
1681 if (type == PTP_CLASS_NONE) {
1682 kfree_skb(skb);
1683 continue;
1684 }
1685
1686 netif_rx(skb);
1687 }
1688
1689 out:
1690 if (err < 0) {
1691 dev_err_ratelimited(ocelot->dev,
1692 "Error during packet extraction: %pe\n",
1693 ERR_PTR(err));
1694 ocelot_drain_cpu_queue(ocelot, 0);
1695 }
1696
1697 return true;
1698 }
1699
felix_rxtstamp(struct dsa_switch * ds,int port,struct sk_buff * skb,unsigned int type)1700 static bool felix_rxtstamp(struct dsa_switch *ds, int port,
1701 struct sk_buff *skb, unsigned int type)
1702 {
1703 u32 tstamp_lo = OCELOT_SKB_CB(skb)->tstamp_lo;
1704 struct skb_shared_hwtstamps *shhwtstamps;
1705 struct ocelot *ocelot = ds->priv;
1706 struct timespec64 ts;
1707 u32 tstamp_hi;
1708 u64 tstamp;
1709
1710 switch (type & PTP_CLASS_PMASK) {
1711 case PTP_CLASS_L2:
1712 if (!(ocelot->ports[port]->trap_proto & OCELOT_PROTO_PTP_L2))
1713 return false;
1714 break;
1715 case PTP_CLASS_IPV4:
1716 case PTP_CLASS_IPV6:
1717 if (!(ocelot->ports[port]->trap_proto & OCELOT_PROTO_PTP_L4))
1718 return false;
1719 break;
1720 }
1721
1722 /* If the "no XTR IRQ" workaround is in use, tell DSA to defer this skb
1723 * for RX timestamping. Then free it, and poll for its copy through
1724 * MMIO in the CPU port module, and inject that into the stack from
1725 * ocelot_xtr_poll().
1726 */
1727 if (felix_check_xtr_pkt(ocelot)) {
1728 kfree_skb(skb);
1729 return true;
1730 }
1731
1732 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
1733 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
1734
1735 tstamp_hi = tstamp >> 32;
1736 if ((tstamp & 0xffffffff) < tstamp_lo)
1737 tstamp_hi--;
1738
1739 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo;
1740
1741 shhwtstamps = skb_hwtstamps(skb);
1742 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
1743 shhwtstamps->hwtstamp = tstamp;
1744 return false;
1745 }
1746
felix_txtstamp(struct dsa_switch * ds,int port,struct sk_buff * skb)1747 static void felix_txtstamp(struct dsa_switch *ds, int port,
1748 struct sk_buff *skb)
1749 {
1750 struct ocelot *ocelot = ds->priv;
1751 struct sk_buff *clone = NULL;
1752
1753 if (!ocelot->ptp)
1754 return;
1755
1756 if (ocelot_port_txtstamp_request(ocelot, port, skb, &clone)) {
1757 dev_err_ratelimited(ds->dev,
1758 "port %d delivering skb without TX timestamp\n",
1759 port);
1760 return;
1761 }
1762
1763 if (clone)
1764 OCELOT_SKB_CB(skb)->clone = clone;
1765 }
1766
felix_change_mtu(struct dsa_switch * ds,int port,int new_mtu)1767 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
1768 {
1769 struct ocelot *ocelot = ds->priv;
1770 struct ocelot_port *ocelot_port = ocelot->ports[port];
1771 struct felix *felix = ocelot_to_felix(ocelot);
1772
1773 ocelot_port_set_maxlen(ocelot, port, new_mtu);
1774
1775 mutex_lock(&ocelot->tas_lock);
1776
1777 if (ocelot_port->taprio && felix->info->tas_guard_bands_update)
1778 felix->info->tas_guard_bands_update(ocelot, port);
1779
1780 mutex_unlock(&ocelot->tas_lock);
1781
1782 return 0;
1783 }
1784
felix_get_max_mtu(struct dsa_switch * ds,int port)1785 static int felix_get_max_mtu(struct dsa_switch *ds, int port)
1786 {
1787 struct ocelot *ocelot = ds->priv;
1788
1789 return ocelot_get_max_mtu(ocelot, port);
1790 }
1791
felix_cls_flower_add(struct dsa_switch * ds,int port,struct flow_cls_offload * cls,bool ingress)1792 static int felix_cls_flower_add(struct dsa_switch *ds, int port,
1793 struct flow_cls_offload *cls, bool ingress)
1794 {
1795 struct ocelot *ocelot = ds->priv;
1796 struct felix *felix = ocelot_to_felix(ocelot);
1797 bool using_tag_8021q;
1798 int err;
1799
1800 err = ocelot_cls_flower_replace(ocelot, port, cls, ingress);
1801 if (err)
1802 return err;
1803
1804 using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
1805
1806 return felix_update_trapping_destinations(ds, using_tag_8021q);
1807 }
1808
felix_cls_flower_del(struct dsa_switch * ds,int port,struct flow_cls_offload * cls,bool ingress)1809 static int felix_cls_flower_del(struct dsa_switch *ds, int port,
1810 struct flow_cls_offload *cls, bool ingress)
1811 {
1812 struct ocelot *ocelot = ds->priv;
1813
1814 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress);
1815 }
1816
felix_cls_flower_stats(struct dsa_switch * ds,int port,struct flow_cls_offload * cls,bool ingress)1817 static int felix_cls_flower_stats(struct dsa_switch *ds, int port,
1818 struct flow_cls_offload *cls, bool ingress)
1819 {
1820 struct ocelot *ocelot = ds->priv;
1821
1822 return ocelot_cls_flower_stats(ocelot, port, cls, ingress);
1823 }
1824
felix_port_policer_add(struct dsa_switch * ds,int port,struct dsa_mall_policer_tc_entry * policer)1825 static int felix_port_policer_add(struct dsa_switch *ds, int port,
1826 struct dsa_mall_policer_tc_entry *policer)
1827 {
1828 struct ocelot *ocelot = ds->priv;
1829 struct ocelot_policer pol = {
1830 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8,
1831 .burst = policer->burst,
1832 };
1833
1834 return ocelot_port_policer_add(ocelot, port, &pol);
1835 }
1836
felix_port_policer_del(struct dsa_switch * ds,int port)1837 static void felix_port_policer_del(struct dsa_switch *ds, int port)
1838 {
1839 struct ocelot *ocelot = ds->priv;
1840
1841 ocelot_port_policer_del(ocelot, port);
1842 }
1843
felix_port_mirror_add(struct dsa_switch * ds,int port,struct dsa_mall_mirror_tc_entry * mirror,bool ingress,struct netlink_ext_ack * extack)1844 static int felix_port_mirror_add(struct dsa_switch *ds, int port,
1845 struct dsa_mall_mirror_tc_entry *mirror,
1846 bool ingress, struct netlink_ext_ack *extack)
1847 {
1848 struct ocelot *ocelot = ds->priv;
1849
1850 return ocelot_port_mirror_add(ocelot, port, mirror->to_local_port,
1851 ingress, extack);
1852 }
1853
felix_port_mirror_del(struct dsa_switch * ds,int port,struct dsa_mall_mirror_tc_entry * mirror)1854 static void felix_port_mirror_del(struct dsa_switch *ds, int port,
1855 struct dsa_mall_mirror_tc_entry *mirror)
1856 {
1857 struct ocelot *ocelot = ds->priv;
1858
1859 ocelot_port_mirror_del(ocelot, port, mirror->ingress);
1860 }
1861
felix_port_setup_tc(struct dsa_switch * ds,int port,enum tc_setup_type type,void * type_data)1862 static int felix_port_setup_tc(struct dsa_switch *ds, int port,
1863 enum tc_setup_type type,
1864 void *type_data)
1865 {
1866 struct ocelot *ocelot = ds->priv;
1867 struct felix *felix = ocelot_to_felix(ocelot);
1868
1869 if (felix->info->port_setup_tc)
1870 return felix->info->port_setup_tc(ds, port, type, type_data);
1871 else
1872 return -EOPNOTSUPP;
1873 }
1874
felix_sb_pool_get(struct dsa_switch * ds,unsigned int sb_index,u16 pool_index,struct devlink_sb_pool_info * pool_info)1875 static int felix_sb_pool_get(struct dsa_switch *ds, unsigned int sb_index,
1876 u16 pool_index,
1877 struct devlink_sb_pool_info *pool_info)
1878 {
1879 struct ocelot *ocelot = ds->priv;
1880
1881 return ocelot_sb_pool_get(ocelot, sb_index, pool_index, pool_info);
1882 }
1883
felix_sb_pool_set(struct dsa_switch * ds,unsigned int sb_index,u16 pool_index,u32 size,enum devlink_sb_threshold_type threshold_type,struct netlink_ext_ack * extack)1884 static int felix_sb_pool_set(struct dsa_switch *ds, unsigned int sb_index,
1885 u16 pool_index, u32 size,
1886 enum devlink_sb_threshold_type threshold_type,
1887 struct netlink_ext_ack *extack)
1888 {
1889 struct ocelot *ocelot = ds->priv;
1890
1891 return ocelot_sb_pool_set(ocelot, sb_index, pool_index, size,
1892 threshold_type, extack);
1893 }
1894
felix_sb_port_pool_get(struct dsa_switch * ds,int port,unsigned int sb_index,u16 pool_index,u32 * p_threshold)1895 static int felix_sb_port_pool_get(struct dsa_switch *ds, int port,
1896 unsigned int sb_index, u16 pool_index,
1897 u32 *p_threshold)
1898 {
1899 struct ocelot *ocelot = ds->priv;
1900
1901 return ocelot_sb_port_pool_get(ocelot, port, sb_index, pool_index,
1902 p_threshold);
1903 }
1904
felix_sb_port_pool_set(struct dsa_switch * ds,int port,unsigned int sb_index,u16 pool_index,u32 threshold,struct netlink_ext_ack * extack)1905 static int felix_sb_port_pool_set(struct dsa_switch *ds, int port,
1906 unsigned int sb_index, u16 pool_index,
1907 u32 threshold, struct netlink_ext_ack *extack)
1908 {
1909 struct ocelot *ocelot = ds->priv;
1910
1911 return ocelot_sb_port_pool_set(ocelot, port, sb_index, pool_index,
1912 threshold, extack);
1913 }
1914
felix_sb_tc_pool_bind_get(struct dsa_switch * ds,int port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u16 * p_pool_index,u32 * p_threshold)1915 static int felix_sb_tc_pool_bind_get(struct dsa_switch *ds, int port,
1916 unsigned int sb_index, u16 tc_index,
1917 enum devlink_sb_pool_type pool_type,
1918 u16 *p_pool_index, u32 *p_threshold)
1919 {
1920 struct ocelot *ocelot = ds->priv;
1921
1922 return ocelot_sb_tc_pool_bind_get(ocelot, port, sb_index, tc_index,
1923 pool_type, p_pool_index,
1924 p_threshold);
1925 }
1926
felix_sb_tc_pool_bind_set(struct dsa_switch * ds,int port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u16 pool_index,u32 threshold,struct netlink_ext_ack * extack)1927 static int felix_sb_tc_pool_bind_set(struct dsa_switch *ds, int port,
1928 unsigned int sb_index, u16 tc_index,
1929 enum devlink_sb_pool_type pool_type,
1930 u16 pool_index, u32 threshold,
1931 struct netlink_ext_ack *extack)
1932 {
1933 struct ocelot *ocelot = ds->priv;
1934
1935 return ocelot_sb_tc_pool_bind_set(ocelot, port, sb_index, tc_index,
1936 pool_type, pool_index, threshold,
1937 extack);
1938 }
1939
felix_sb_occ_snapshot(struct dsa_switch * ds,unsigned int sb_index)1940 static int felix_sb_occ_snapshot(struct dsa_switch *ds,
1941 unsigned int sb_index)
1942 {
1943 struct ocelot *ocelot = ds->priv;
1944
1945 return ocelot_sb_occ_snapshot(ocelot, sb_index);
1946 }
1947
felix_sb_occ_max_clear(struct dsa_switch * ds,unsigned int sb_index)1948 static int felix_sb_occ_max_clear(struct dsa_switch *ds,
1949 unsigned int sb_index)
1950 {
1951 struct ocelot *ocelot = ds->priv;
1952
1953 return ocelot_sb_occ_max_clear(ocelot, sb_index);
1954 }
1955
felix_sb_occ_port_pool_get(struct dsa_switch * ds,int port,unsigned int sb_index,u16 pool_index,u32 * p_cur,u32 * p_max)1956 static int felix_sb_occ_port_pool_get(struct dsa_switch *ds, int port,
1957 unsigned int sb_index, u16 pool_index,
1958 u32 *p_cur, u32 *p_max)
1959 {
1960 struct ocelot *ocelot = ds->priv;
1961
1962 return ocelot_sb_occ_port_pool_get(ocelot, port, sb_index, pool_index,
1963 p_cur, p_max);
1964 }
1965
felix_sb_occ_tc_port_bind_get(struct dsa_switch * ds,int port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u32 * p_cur,u32 * p_max)1966 static int felix_sb_occ_tc_port_bind_get(struct dsa_switch *ds, int port,
1967 unsigned int sb_index, u16 tc_index,
1968 enum devlink_sb_pool_type pool_type,
1969 u32 *p_cur, u32 *p_max)
1970 {
1971 struct ocelot *ocelot = ds->priv;
1972
1973 return ocelot_sb_occ_tc_port_bind_get(ocelot, port, sb_index, tc_index,
1974 pool_type, p_cur, p_max);
1975 }
1976
felix_mrp_add(struct dsa_switch * ds,int port,const struct switchdev_obj_mrp * mrp)1977 static int felix_mrp_add(struct dsa_switch *ds, int port,
1978 const struct switchdev_obj_mrp *mrp)
1979 {
1980 struct ocelot *ocelot = ds->priv;
1981
1982 return ocelot_mrp_add(ocelot, port, mrp);
1983 }
1984
felix_mrp_del(struct dsa_switch * ds,int port,const struct switchdev_obj_mrp * mrp)1985 static int felix_mrp_del(struct dsa_switch *ds, int port,
1986 const struct switchdev_obj_mrp *mrp)
1987 {
1988 struct ocelot *ocelot = ds->priv;
1989
1990 return ocelot_mrp_add(ocelot, port, mrp);
1991 }
1992
1993 static int
felix_mrp_add_ring_role(struct dsa_switch * ds,int port,const struct switchdev_obj_ring_role_mrp * mrp)1994 felix_mrp_add_ring_role(struct dsa_switch *ds, int port,
1995 const struct switchdev_obj_ring_role_mrp *mrp)
1996 {
1997 struct ocelot *ocelot = ds->priv;
1998
1999 return ocelot_mrp_add_ring_role(ocelot, port, mrp);
2000 }
2001
2002 static int
felix_mrp_del_ring_role(struct dsa_switch * ds,int port,const struct switchdev_obj_ring_role_mrp * mrp)2003 felix_mrp_del_ring_role(struct dsa_switch *ds, int port,
2004 const struct switchdev_obj_ring_role_mrp *mrp)
2005 {
2006 struct ocelot *ocelot = ds->priv;
2007
2008 return ocelot_mrp_del_ring_role(ocelot, port, mrp);
2009 }
2010
felix_port_get_default_prio(struct dsa_switch * ds,int port)2011 static int felix_port_get_default_prio(struct dsa_switch *ds, int port)
2012 {
2013 struct ocelot *ocelot = ds->priv;
2014
2015 return ocelot_port_get_default_prio(ocelot, port);
2016 }
2017
felix_port_set_default_prio(struct dsa_switch * ds,int port,u8 prio)2018 static int felix_port_set_default_prio(struct dsa_switch *ds, int port,
2019 u8 prio)
2020 {
2021 struct ocelot *ocelot = ds->priv;
2022
2023 return ocelot_port_set_default_prio(ocelot, port, prio);
2024 }
2025
felix_port_get_dscp_prio(struct dsa_switch * ds,int port,u8 dscp)2026 static int felix_port_get_dscp_prio(struct dsa_switch *ds, int port, u8 dscp)
2027 {
2028 struct ocelot *ocelot = ds->priv;
2029
2030 return ocelot_port_get_dscp_prio(ocelot, port, dscp);
2031 }
2032
felix_port_add_dscp_prio(struct dsa_switch * ds,int port,u8 dscp,u8 prio)2033 static int felix_port_add_dscp_prio(struct dsa_switch *ds, int port, u8 dscp,
2034 u8 prio)
2035 {
2036 struct ocelot *ocelot = ds->priv;
2037
2038 return ocelot_port_add_dscp_prio(ocelot, port, dscp, prio);
2039 }
2040
felix_port_del_dscp_prio(struct dsa_switch * ds,int port,u8 dscp,u8 prio)2041 static int felix_port_del_dscp_prio(struct dsa_switch *ds, int port, u8 dscp,
2042 u8 prio)
2043 {
2044 struct ocelot *ocelot = ds->priv;
2045
2046 return ocelot_port_del_dscp_prio(ocelot, port, dscp, prio);
2047 }
2048
2049 const struct dsa_switch_ops felix_switch_ops = {
2050 .get_tag_protocol = felix_get_tag_protocol,
2051 .change_tag_protocol = felix_change_tag_protocol,
2052 .connect_tag_protocol = felix_connect_tag_protocol,
2053 .setup = felix_setup,
2054 .teardown = felix_teardown,
2055 .set_ageing_time = felix_set_ageing_time,
2056 .get_stats64 = felix_get_stats64,
2057 .get_pause_stats = felix_get_pause_stats,
2058 .get_rmon_stats = felix_get_rmon_stats,
2059 .get_eth_ctrl_stats = felix_get_eth_ctrl_stats,
2060 .get_eth_mac_stats = felix_get_eth_mac_stats,
2061 .get_eth_phy_stats = felix_get_eth_phy_stats,
2062 .get_strings = felix_get_strings,
2063 .get_ethtool_stats = felix_get_ethtool_stats,
2064 .get_sset_count = felix_get_sset_count,
2065 .get_ts_info = felix_get_ts_info,
2066 .phylink_get_caps = felix_phylink_get_caps,
2067 .phylink_validate = felix_phylink_validate,
2068 .phylink_mac_select_pcs = felix_phylink_mac_select_pcs,
2069 .phylink_mac_link_down = felix_phylink_mac_link_down,
2070 .phylink_mac_link_up = felix_phylink_mac_link_up,
2071 .port_enable = felix_port_enable,
2072 .port_fast_age = felix_port_fast_age,
2073 .port_fdb_dump = felix_fdb_dump,
2074 .port_fdb_add = felix_fdb_add,
2075 .port_fdb_del = felix_fdb_del,
2076 .lag_fdb_add = felix_lag_fdb_add,
2077 .lag_fdb_del = felix_lag_fdb_del,
2078 .port_mdb_add = felix_mdb_add,
2079 .port_mdb_del = felix_mdb_del,
2080 .port_pre_bridge_flags = felix_pre_bridge_flags,
2081 .port_bridge_flags = felix_bridge_flags,
2082 .port_bridge_join = felix_bridge_join,
2083 .port_bridge_leave = felix_bridge_leave,
2084 .port_lag_join = felix_lag_join,
2085 .port_lag_leave = felix_lag_leave,
2086 .port_lag_change = felix_lag_change,
2087 .port_stp_state_set = felix_bridge_stp_state_set,
2088 .port_vlan_filtering = felix_vlan_filtering,
2089 .port_vlan_add = felix_vlan_add,
2090 .port_vlan_del = felix_vlan_del,
2091 .port_hwtstamp_get = felix_hwtstamp_get,
2092 .port_hwtstamp_set = felix_hwtstamp_set,
2093 .port_rxtstamp = felix_rxtstamp,
2094 .port_txtstamp = felix_txtstamp,
2095 .port_change_mtu = felix_change_mtu,
2096 .port_max_mtu = felix_get_max_mtu,
2097 .port_policer_add = felix_port_policer_add,
2098 .port_policer_del = felix_port_policer_del,
2099 .port_mirror_add = felix_port_mirror_add,
2100 .port_mirror_del = felix_port_mirror_del,
2101 .cls_flower_add = felix_cls_flower_add,
2102 .cls_flower_del = felix_cls_flower_del,
2103 .cls_flower_stats = felix_cls_flower_stats,
2104 .port_setup_tc = felix_port_setup_tc,
2105 .devlink_sb_pool_get = felix_sb_pool_get,
2106 .devlink_sb_pool_set = felix_sb_pool_set,
2107 .devlink_sb_port_pool_get = felix_sb_port_pool_get,
2108 .devlink_sb_port_pool_set = felix_sb_port_pool_set,
2109 .devlink_sb_tc_pool_bind_get = felix_sb_tc_pool_bind_get,
2110 .devlink_sb_tc_pool_bind_set = felix_sb_tc_pool_bind_set,
2111 .devlink_sb_occ_snapshot = felix_sb_occ_snapshot,
2112 .devlink_sb_occ_max_clear = felix_sb_occ_max_clear,
2113 .devlink_sb_occ_port_pool_get = felix_sb_occ_port_pool_get,
2114 .devlink_sb_occ_tc_port_bind_get= felix_sb_occ_tc_port_bind_get,
2115 .port_mrp_add = felix_mrp_add,
2116 .port_mrp_del = felix_mrp_del,
2117 .port_mrp_add_ring_role = felix_mrp_add_ring_role,
2118 .port_mrp_del_ring_role = felix_mrp_del_ring_role,
2119 .tag_8021q_vlan_add = felix_tag_8021q_vlan_add,
2120 .tag_8021q_vlan_del = felix_tag_8021q_vlan_del,
2121 .port_get_default_prio = felix_port_get_default_prio,
2122 .port_set_default_prio = felix_port_set_default_prio,
2123 .port_get_dscp_prio = felix_port_get_dscp_prio,
2124 .port_add_dscp_prio = felix_port_add_dscp_prio,
2125 .port_del_dscp_prio = felix_port_del_dscp_prio,
2126 .port_set_host_flood = felix_port_set_host_flood,
2127 .port_change_master = felix_port_change_master,
2128 };
2129
felix_port_to_netdev(struct ocelot * ocelot,int port)2130 struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port)
2131 {
2132 struct felix *felix = ocelot_to_felix(ocelot);
2133 struct dsa_switch *ds = felix->ds;
2134
2135 if (!dsa_is_user_port(ds, port))
2136 return NULL;
2137
2138 return dsa_to_port(ds, port)->slave;
2139 }
2140
felix_netdev_to_port(struct net_device * dev)2141 int felix_netdev_to_port(struct net_device *dev)
2142 {
2143 struct dsa_port *dp;
2144
2145 dp = dsa_port_from_netdev(dev);
2146 if (IS_ERR(dp))
2147 return -EINVAL;
2148
2149 return dp->index;
2150 }
2151