1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include "priv.h"
25 #include "chan.h"
26 #include "hdmi.h"
27 #include "head.h"
28 #include "ior.h"
29 #include "outp.h"
30
31 #include <nvif/class.h>
32
33 void
gm200_sor_dp_drive(struct nvkm_ior * sor,int ln,int pc,int dc,int pe,int pu)34 gm200_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu)
35 {
36 struct nvkm_device *device = sor->disp->engine.subdev.device;
37 const u32 loff = nv50_sor_link(sor);
38 const u32 shift = sor->func->dp->lanes[ln] * 8;
39 u32 data[4];
40
41 pu &= 0x0f;
42
43 data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift);
44 data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift);
45 data[2] = nvkm_rd32(device, 0x61c130 + loff);
46 if ((data[2] & 0x00000f00) < (pu << 8) || ln == 0)
47 data[2] = (data[2] & ~0x00000f00) | (pu << 8);
48
49 nvkm_wr32(device, 0x61c118 + loff, data[0] | (dc << shift));
50 nvkm_wr32(device, 0x61c120 + loff, data[1] | (pe << shift));
51 nvkm_wr32(device, 0x61c130 + loff, data[2]);
52
53 data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift);
54 nvkm_wr32(device, 0x61c13c + loff, data[3] | (pc << shift));
55 }
56
57 const struct nvkm_ior_func_dp
58 gm200_sor_dp = {
59 .lanes = { 0, 1, 2, 3 },
60 .links = gf119_sor_dp_links,
61 .power = g94_sor_dp_power,
62 .pattern = gm107_sor_dp_pattern,
63 .drive = gm200_sor_dp_drive,
64 .vcpi = gf119_sor_dp_vcpi,
65 .audio = gf119_sor_dp_audio,
66 .audio_sym = gf119_sor_dp_audio_sym,
67 .watermark = gf119_sor_dp_watermark,
68 };
69
70 void
gm200_sor_hdmi_scdc(struct nvkm_ior * ior,u8 scdc)71 gm200_sor_hdmi_scdc(struct nvkm_ior *ior, u8 scdc)
72 {
73 struct nvkm_device *device = ior->disp->engine.subdev.device;
74 const u32 soff = nv50_ior_base(ior);
75 const u32 ctrl = scdc & 0x3;
76
77 nvkm_mask(device, 0x61c5bc + soff, 0x00000003, ctrl);
78
79 ior->tmds.high_speed = !!(scdc & 0x2);
80 }
81
82 void
gm200_sor_route_set(struct nvkm_outp * outp,struct nvkm_ior * ior)83 gm200_sor_route_set(struct nvkm_outp *outp, struct nvkm_ior *ior)
84 {
85 struct nvkm_device *device = outp->disp->engine.subdev.device;
86 const u32 moff = __ffs(outp->info.or) * 0x100;
87 const u32 sor = ior ? ior->id + 1 : 0;
88 u32 link = ior ? (ior->asy.link == 2) : 0;
89
90 if (outp->info.sorconf.link & 1) {
91 nvkm_mask(device, 0x612308 + moff, 0x0000001f, link << 4 | sor);
92 link++;
93 }
94
95 if (outp->info.sorconf.link & 2)
96 nvkm_mask(device, 0x612388 + moff, 0x0000001f, link << 4 | sor);
97 }
98
99 int
gm200_sor_route_get(struct nvkm_outp * outp,int * link)100 gm200_sor_route_get(struct nvkm_outp *outp, int *link)
101 {
102 struct nvkm_device *device = outp->disp->engine.subdev.device;
103 const int sublinks = outp->info.sorconf.link;
104 int lnk[2], sor[2], m, s;
105
106 for (*link = 0, m = __ffs(outp->info.or) * 2, s = 0; s < 2; m++, s++) {
107 if (sublinks & BIT(s)) {
108 u32 data = nvkm_rd32(device, 0x612308 + (m * 0x80));
109 lnk[s] = (data & 0x00000010) >> 4;
110 sor[s] = (data & 0x0000000f);
111 if (!sor[s])
112 return -1;
113 *link |= lnk[s];
114 }
115 }
116
117 if (sublinks == 3) {
118 if (sor[0] != sor[1] || WARN_ON(lnk[0] || !lnk[1]))
119 return -1;
120 }
121
122 return ((sublinks & 1) ? sor[0] : sor[1]) - 1;
123 }
124
125 static const struct nvkm_ior_func
126 gm200_sor = {
127 .route = {
128 .get = gm200_sor_route_get,
129 .set = gm200_sor_route_set,
130 },
131 .state = gf119_sor_state,
132 .power = nv50_sor_power,
133 .clock = gf119_sor_clock,
134 .hdmi = {
135 .ctrl = gk104_sor_hdmi_ctrl,
136 .scdc = gm200_sor_hdmi_scdc,
137 },
138 .dp = &gm200_sor_dp,
139 .hda = &gf119_sor_hda,
140 };
141
142 static int
gm200_sor_new(struct nvkm_disp * disp,int id)143 gm200_sor_new(struct nvkm_disp *disp, int id)
144 {
145 struct nvkm_device *device = disp->engine.subdev.device;
146 u32 hda;
147
148 if (!((hda = nvkm_rd32(device, 0x08a15c)) & 0x40000000))
149 hda = nvkm_rd32(device, 0x101034);
150
151 return nvkm_ior_new_(&gm200_sor, disp, SOR, id, hda & BIT(id));
152 }
153
154 static const struct nvkm_disp_func
155 gm200_disp = {
156 .oneinit = nv50_disp_oneinit,
157 .init = gf119_disp_init,
158 .fini = gf119_disp_fini,
159 .intr = gf119_disp_intr,
160 .intr_error = gf119_disp_intr_error,
161 .super = gf119_disp_super,
162 .uevent = &gf119_disp_chan_uevent,
163 .head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
164 .dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new },
165 .sor = { .cnt = gf119_sor_cnt, .new = gm200_sor_new },
166 .root = { 0,0,GM200_DISP },
167 .user = {
168 {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs },
169 {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm },
170 {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base },
171 {{0,0,GM200_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core },
172 {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly },
173 {}
174 },
175 };
176
177 int
gm200_disp_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_disp ** pdisp)178 gm200_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
179 struct nvkm_disp **pdisp)
180 {
181 return nvkm_disp_new_(&gm200_disp, device, type, inst, pdisp);
182 }
183