1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Microchip KSZ8795 switch driver
4 *
5 * Copyright (C) 2017 Microchip Technology Inc.
6 * Tristram Ha <Tristram.Ha@microchip.com>
7 */
8
9 #include <linux/bitfield.h>
10 #include <linux/delay.h>
11 #include <linux/export.h>
12 #include <linux/gpio.h>
13 #include <linux/if_vlan.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/platform_data/microchip-ksz.h>
17 #include <linux/phy.h>
18 #include <linux/etherdevice.h>
19 #include <linux/if_bridge.h>
20 #include <linux/micrel_phy.h>
21 #include <net/dsa.h>
22 #include <net/switchdev.h>
23 #include <linux/phylink.h>
24
25 #include "ksz_common.h"
26 #include "ksz8795_reg.h"
27 #include "ksz8.h"
28
ksz_cfg(struct ksz_device * dev,u32 addr,u8 bits,bool set)29 static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
30 {
31 regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0);
32 }
33
ksz_port_cfg(struct ksz_device * dev,int port,int offset,u8 bits,bool set)34 static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,
35 bool set)
36 {
37 regmap_update_bits(dev->regmap[0], PORT_CTRL_ADDR(port, offset),
38 bits, set ? bits : 0);
39 }
40
ksz8_ind_write8(struct ksz_device * dev,u8 table,u16 addr,u8 data)41 static int ksz8_ind_write8(struct ksz_device *dev, u8 table, u16 addr, u8 data)
42 {
43 const u16 *regs;
44 u16 ctrl_addr;
45 int ret = 0;
46
47 regs = dev->info->regs;
48
49 mutex_lock(&dev->alu_mutex);
50
51 ctrl_addr = IND_ACC_TABLE(table) | addr;
52 ret = ksz_write8(dev, regs[REG_IND_BYTE], data);
53 if (!ret)
54 ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
55
56 mutex_unlock(&dev->alu_mutex);
57
58 return ret;
59 }
60
ksz8_reset_switch(struct ksz_device * dev)61 int ksz8_reset_switch(struct ksz_device *dev)
62 {
63 if (ksz_is_ksz88x3(dev)) {
64 /* reset switch */
65 ksz_cfg(dev, KSZ8863_REG_SW_RESET,
66 KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, true);
67 ksz_cfg(dev, KSZ8863_REG_SW_RESET,
68 KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, false);
69 } else {
70 /* reset switch */
71 ksz_write8(dev, REG_POWER_MANAGEMENT_1,
72 SW_SOFTWARE_POWER_DOWN << SW_POWER_MANAGEMENT_MODE_S);
73 ksz_write8(dev, REG_POWER_MANAGEMENT_1, 0);
74 }
75
76 return 0;
77 }
78
ksz8795_set_prio_queue(struct ksz_device * dev,int port,int queue)79 static void ksz8795_set_prio_queue(struct ksz_device *dev, int port, int queue)
80 {
81 u8 hi, lo;
82
83 /* Number of queues can only be 1, 2, or 4. */
84 switch (queue) {
85 case 4:
86 case 3:
87 queue = PORT_QUEUE_SPLIT_4;
88 break;
89 case 2:
90 queue = PORT_QUEUE_SPLIT_2;
91 break;
92 default:
93 queue = PORT_QUEUE_SPLIT_1;
94 }
95 ksz_pread8(dev, port, REG_PORT_CTRL_0, &lo);
96 ksz_pread8(dev, port, P_DROP_TAG_CTRL, &hi);
97 lo &= ~PORT_QUEUE_SPLIT_L;
98 if (queue & PORT_QUEUE_SPLIT_2)
99 lo |= PORT_QUEUE_SPLIT_L;
100 hi &= ~PORT_QUEUE_SPLIT_H;
101 if (queue & PORT_QUEUE_SPLIT_4)
102 hi |= PORT_QUEUE_SPLIT_H;
103 ksz_pwrite8(dev, port, REG_PORT_CTRL_0, lo);
104 ksz_pwrite8(dev, port, P_DROP_TAG_CTRL, hi);
105
106 /* Default is port based for egress rate limit. */
107 if (queue != PORT_QUEUE_SPLIT_1)
108 ksz_cfg(dev, REG_SW_CTRL_19, SW_OUT_RATE_LIMIT_QUEUE_BASED,
109 true);
110 }
111
ksz8_r_mib_cnt(struct ksz_device * dev,int port,u16 addr,u64 * cnt)112 void ksz8_r_mib_cnt(struct ksz_device *dev, int port, u16 addr, u64 *cnt)
113 {
114 const u32 *masks;
115 const u16 *regs;
116 u16 ctrl_addr;
117 u32 data;
118 u8 check;
119 int loop;
120
121 masks = dev->info->masks;
122 regs = dev->info->regs;
123
124 ctrl_addr = addr + dev->info->reg_mib_cnt * port;
125 ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
126
127 mutex_lock(&dev->alu_mutex);
128 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
129
130 /* It is almost guaranteed to always read the valid bit because of
131 * slow SPI speed.
132 */
133 for (loop = 2; loop > 0; loop--) {
134 ksz_read8(dev, regs[REG_IND_MIB_CHECK], &check);
135
136 if (check & masks[MIB_COUNTER_VALID]) {
137 ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
138 if (check & masks[MIB_COUNTER_OVERFLOW])
139 *cnt += MIB_COUNTER_VALUE + 1;
140 *cnt += data & MIB_COUNTER_VALUE;
141 break;
142 }
143 }
144 mutex_unlock(&dev->alu_mutex);
145 }
146
ksz8795_r_mib_pkt(struct ksz_device * dev,int port,u16 addr,u64 * dropped,u64 * cnt)147 static void ksz8795_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
148 u64 *dropped, u64 *cnt)
149 {
150 const u32 *masks;
151 const u16 *regs;
152 u16 ctrl_addr;
153 u32 data;
154 u8 check;
155 int loop;
156
157 masks = dev->info->masks;
158 regs = dev->info->regs;
159
160 addr -= dev->info->reg_mib_cnt;
161 ctrl_addr = (KSZ8795_MIB_TOTAL_RX_1 - KSZ8795_MIB_TOTAL_RX_0) * port;
162 ctrl_addr += addr + KSZ8795_MIB_TOTAL_RX_0;
163 ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
164
165 mutex_lock(&dev->alu_mutex);
166 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
167
168 /* It is almost guaranteed to always read the valid bit because of
169 * slow SPI speed.
170 */
171 for (loop = 2; loop > 0; loop--) {
172 ksz_read8(dev, regs[REG_IND_MIB_CHECK], &check);
173
174 if (check & masks[MIB_COUNTER_VALID]) {
175 ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
176 if (addr < 2) {
177 u64 total;
178
179 total = check & MIB_TOTAL_BYTES_H;
180 total <<= 32;
181 *cnt += total;
182 *cnt += data;
183 if (check & masks[MIB_COUNTER_OVERFLOW]) {
184 total = MIB_TOTAL_BYTES_H + 1;
185 total <<= 32;
186 *cnt += total;
187 }
188 } else {
189 if (check & masks[MIB_COUNTER_OVERFLOW])
190 *cnt += MIB_PACKET_DROPPED + 1;
191 *cnt += data & MIB_PACKET_DROPPED;
192 }
193 break;
194 }
195 }
196 mutex_unlock(&dev->alu_mutex);
197 }
198
ksz8863_r_mib_pkt(struct ksz_device * dev,int port,u16 addr,u64 * dropped,u64 * cnt)199 static void ksz8863_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
200 u64 *dropped, u64 *cnt)
201 {
202 u32 *last = (u32 *)dropped;
203 const u16 *regs;
204 u16 ctrl_addr;
205 u32 data;
206 u32 cur;
207
208 regs = dev->info->regs;
209
210 addr -= dev->info->reg_mib_cnt;
211 ctrl_addr = addr ? KSZ8863_MIB_PACKET_DROPPED_TX_0 :
212 KSZ8863_MIB_PACKET_DROPPED_RX_0;
213 ctrl_addr += port;
214 ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);
215
216 mutex_lock(&dev->alu_mutex);
217 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
218 ksz_read32(dev, regs[REG_IND_DATA_LO], &data);
219 mutex_unlock(&dev->alu_mutex);
220
221 data &= MIB_PACKET_DROPPED;
222 cur = last[addr];
223 if (data != cur) {
224 last[addr] = data;
225 if (data < cur)
226 data += MIB_PACKET_DROPPED + 1;
227 data -= cur;
228 *cnt += data;
229 }
230 }
231
ksz8_r_mib_pkt(struct ksz_device * dev,int port,u16 addr,u64 * dropped,u64 * cnt)232 void ksz8_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,
233 u64 *dropped, u64 *cnt)
234 {
235 if (ksz_is_ksz88x3(dev))
236 ksz8863_r_mib_pkt(dev, port, addr, dropped, cnt);
237 else
238 ksz8795_r_mib_pkt(dev, port, addr, dropped, cnt);
239 }
240
ksz8_freeze_mib(struct ksz_device * dev,int port,bool freeze)241 void ksz8_freeze_mib(struct ksz_device *dev, int port, bool freeze)
242 {
243 if (ksz_is_ksz88x3(dev))
244 return;
245
246 /* enable the port for flush/freeze function */
247 if (freeze)
248 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);
249 ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FREEZE, freeze);
250
251 /* disable the port after freeze is done */
252 if (!freeze)
253 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);
254 }
255
ksz8_port_init_cnt(struct ksz_device * dev,int port)256 void ksz8_port_init_cnt(struct ksz_device *dev, int port)
257 {
258 struct ksz_port_mib *mib = &dev->ports[port].mib;
259 u64 *dropped;
260
261 if (!ksz_is_ksz88x3(dev)) {
262 /* flush all enabled port MIB counters */
263 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);
264 ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FLUSH, true);
265 ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);
266 }
267
268 mib->cnt_ptr = 0;
269
270 /* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */
271 while (mib->cnt_ptr < dev->info->reg_mib_cnt) {
272 dev->dev_ops->r_mib_cnt(dev, port, mib->cnt_ptr,
273 &mib->counters[mib->cnt_ptr]);
274 ++mib->cnt_ptr;
275 }
276
277 /* last one in storage */
278 dropped = &mib->counters[dev->info->mib_cnt];
279
280 /* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */
281 while (mib->cnt_ptr < dev->info->mib_cnt) {
282 dev->dev_ops->r_mib_pkt(dev, port, mib->cnt_ptr,
283 dropped, &mib->counters[mib->cnt_ptr]);
284 ++mib->cnt_ptr;
285 }
286 }
287
ksz8_r_table(struct ksz_device * dev,int table,u16 addr,u64 * data)288 static void ksz8_r_table(struct ksz_device *dev, int table, u16 addr, u64 *data)
289 {
290 const u16 *regs;
291 u16 ctrl_addr;
292
293 regs = dev->info->regs;
294
295 ctrl_addr = IND_ACC_TABLE(table | TABLE_READ) | addr;
296
297 mutex_lock(&dev->alu_mutex);
298 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
299 ksz_read64(dev, regs[REG_IND_DATA_HI], data);
300 mutex_unlock(&dev->alu_mutex);
301 }
302
ksz8_w_table(struct ksz_device * dev,int table,u16 addr,u64 data)303 static void ksz8_w_table(struct ksz_device *dev, int table, u16 addr, u64 data)
304 {
305 const u16 *regs;
306 u16 ctrl_addr;
307
308 regs = dev->info->regs;
309
310 ctrl_addr = IND_ACC_TABLE(table) | addr;
311
312 mutex_lock(&dev->alu_mutex);
313 ksz_write64(dev, regs[REG_IND_DATA_HI], data);
314 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
315 mutex_unlock(&dev->alu_mutex);
316 }
317
ksz8_valid_dyn_entry(struct ksz_device * dev,u8 * data)318 static int ksz8_valid_dyn_entry(struct ksz_device *dev, u8 *data)
319 {
320 int timeout = 100;
321 const u32 *masks;
322 const u16 *regs;
323
324 masks = dev->info->masks;
325 regs = dev->info->regs;
326
327 do {
328 ksz_read8(dev, regs[REG_IND_DATA_CHECK], data);
329 timeout--;
330 } while ((*data & masks[DYNAMIC_MAC_TABLE_NOT_READY]) && timeout);
331
332 /* Entry is not ready for accessing. */
333 if (*data & masks[DYNAMIC_MAC_TABLE_NOT_READY]) {
334 return -EAGAIN;
335 /* Entry is ready for accessing. */
336 } else {
337 ksz_read8(dev, regs[REG_IND_DATA_8], data);
338
339 /* There is no valid entry in the table. */
340 if (*data & masks[DYNAMIC_MAC_TABLE_MAC_EMPTY])
341 return -ENXIO;
342 }
343 return 0;
344 }
345
ksz8_r_dyn_mac_table(struct ksz_device * dev,u16 addr,u8 * mac_addr,u8 * fid,u8 * src_port,u8 * timestamp,u16 * entries)346 int ksz8_r_dyn_mac_table(struct ksz_device *dev, u16 addr, u8 *mac_addr,
347 u8 *fid, u8 *src_port, u8 *timestamp, u16 *entries)
348 {
349 u32 data_hi, data_lo;
350 const u8 *shifts;
351 const u32 *masks;
352 const u16 *regs;
353 u16 ctrl_addr;
354 u8 data;
355 int rc;
356
357 shifts = dev->info->shifts;
358 masks = dev->info->masks;
359 regs = dev->info->regs;
360
361 ctrl_addr = IND_ACC_TABLE(TABLE_DYNAMIC_MAC | TABLE_READ) | addr;
362
363 mutex_lock(&dev->alu_mutex);
364 ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);
365
366 rc = ksz8_valid_dyn_entry(dev, &data);
367 if (rc == -EAGAIN) {
368 if (addr == 0)
369 *entries = 0;
370 } else if (rc == -ENXIO) {
371 *entries = 0;
372 /* At least one valid entry in the table. */
373 } else {
374 u64 buf = 0;
375 int cnt;
376
377 ksz_read64(dev, regs[REG_IND_DATA_HI], &buf);
378 data_hi = (u32)(buf >> 32);
379 data_lo = (u32)buf;
380
381 /* Check out how many valid entry in the table. */
382 cnt = data & masks[DYNAMIC_MAC_TABLE_ENTRIES_H];
383 cnt <<= shifts[DYNAMIC_MAC_ENTRIES_H];
384 cnt |= (data_hi & masks[DYNAMIC_MAC_TABLE_ENTRIES]) >>
385 shifts[DYNAMIC_MAC_ENTRIES];
386 *entries = cnt + 1;
387
388 *fid = (data_hi & masks[DYNAMIC_MAC_TABLE_FID]) >>
389 shifts[DYNAMIC_MAC_FID];
390 *src_port = (data_hi & masks[DYNAMIC_MAC_TABLE_SRC_PORT]) >>
391 shifts[DYNAMIC_MAC_SRC_PORT];
392 *timestamp = (data_hi & masks[DYNAMIC_MAC_TABLE_TIMESTAMP]) >>
393 shifts[DYNAMIC_MAC_TIMESTAMP];
394
395 mac_addr[5] = (u8)data_lo;
396 mac_addr[4] = (u8)(data_lo >> 8);
397 mac_addr[3] = (u8)(data_lo >> 16);
398 mac_addr[2] = (u8)(data_lo >> 24);
399
400 mac_addr[1] = (u8)data_hi;
401 mac_addr[0] = (u8)(data_hi >> 8);
402 rc = 0;
403 }
404 mutex_unlock(&dev->alu_mutex);
405
406 return rc;
407 }
408
ksz8_r_sta_mac_table(struct ksz_device * dev,u16 addr,struct alu_struct * alu,bool * valid)409 static int ksz8_r_sta_mac_table(struct ksz_device *dev, u16 addr,
410 struct alu_struct *alu, bool *valid)
411 {
412 u32 data_hi, data_lo;
413 const u8 *shifts;
414 const u32 *masks;
415 u64 data;
416
417 shifts = dev->info->shifts;
418 masks = dev->info->masks;
419
420 ksz8_r_table(dev, TABLE_STATIC_MAC, addr, &data);
421 data_hi = data >> 32;
422 data_lo = (u32)data;
423
424 if (!(data_hi & (masks[STATIC_MAC_TABLE_VALID] |
425 masks[STATIC_MAC_TABLE_OVERRIDE]))) {
426 *valid = false;
427 return 0;
428 }
429
430 alu->mac[5] = (u8)data_lo;
431 alu->mac[4] = (u8)(data_lo >> 8);
432 alu->mac[3] = (u8)(data_lo >> 16);
433 alu->mac[2] = (u8)(data_lo >> 24);
434 alu->mac[1] = (u8)data_hi;
435 alu->mac[0] = (u8)(data_hi >> 8);
436 alu->port_forward =
437 (data_hi & masks[STATIC_MAC_TABLE_FWD_PORTS]) >>
438 shifts[STATIC_MAC_FWD_PORTS];
439 alu->is_override = (data_hi & masks[STATIC_MAC_TABLE_OVERRIDE]) ? 1 : 0;
440
441 /* KSZ8795 family switches have STATIC_MAC_TABLE_USE_FID and
442 * STATIC_MAC_TABLE_FID definitions off by 1 when doing read on the
443 * static MAC table compared to doing write.
444 */
445 if (ksz_is_ksz87xx(dev))
446 data_hi >>= 1;
447 alu->is_static = true;
448 alu->is_use_fid = (data_hi & masks[STATIC_MAC_TABLE_USE_FID]) ? 1 : 0;
449 alu->fid = (data_hi & masks[STATIC_MAC_TABLE_FID]) >>
450 shifts[STATIC_MAC_FID];
451
452 *valid = true;
453
454 return 0;
455 }
456
ksz8_w_sta_mac_table(struct ksz_device * dev,u16 addr,struct alu_struct * alu)457 void ksz8_w_sta_mac_table(struct ksz_device *dev, u16 addr,
458 struct alu_struct *alu)
459 {
460 u32 data_hi, data_lo;
461 const u8 *shifts;
462 const u32 *masks;
463 u64 data;
464
465 shifts = dev->info->shifts;
466 masks = dev->info->masks;
467
468 data_lo = ((u32)alu->mac[2] << 24) |
469 ((u32)alu->mac[3] << 16) |
470 ((u32)alu->mac[4] << 8) | alu->mac[5];
471 data_hi = ((u32)alu->mac[0] << 8) | alu->mac[1];
472 data_hi |= (u32)alu->port_forward << shifts[STATIC_MAC_FWD_PORTS];
473
474 if (alu->is_override)
475 data_hi |= masks[STATIC_MAC_TABLE_OVERRIDE];
476 if (alu->is_use_fid) {
477 data_hi |= masks[STATIC_MAC_TABLE_USE_FID];
478 data_hi |= (u32)alu->fid << shifts[STATIC_MAC_FID];
479 }
480 if (alu->is_static)
481 data_hi |= masks[STATIC_MAC_TABLE_VALID];
482 else
483 data_hi &= ~masks[STATIC_MAC_TABLE_OVERRIDE];
484
485 data = (u64)data_hi << 32 | data_lo;
486 ksz8_w_table(dev, TABLE_STATIC_MAC, addr, data);
487 }
488
ksz8_from_vlan(struct ksz_device * dev,u32 vlan,u8 * fid,u8 * member,u8 * valid)489 static void ksz8_from_vlan(struct ksz_device *dev, u32 vlan, u8 *fid,
490 u8 *member, u8 *valid)
491 {
492 const u8 *shifts;
493 const u32 *masks;
494
495 shifts = dev->info->shifts;
496 masks = dev->info->masks;
497
498 *fid = vlan & masks[VLAN_TABLE_FID];
499 *member = (vlan & masks[VLAN_TABLE_MEMBERSHIP]) >>
500 shifts[VLAN_TABLE_MEMBERSHIP_S];
501 *valid = !!(vlan & masks[VLAN_TABLE_VALID]);
502 }
503
ksz8_to_vlan(struct ksz_device * dev,u8 fid,u8 member,u8 valid,u16 * vlan)504 static void ksz8_to_vlan(struct ksz_device *dev, u8 fid, u8 member, u8 valid,
505 u16 *vlan)
506 {
507 const u8 *shifts;
508 const u32 *masks;
509
510 shifts = dev->info->shifts;
511 masks = dev->info->masks;
512
513 *vlan = fid;
514 *vlan |= (u16)member << shifts[VLAN_TABLE_MEMBERSHIP_S];
515 if (valid)
516 *vlan |= masks[VLAN_TABLE_VALID];
517 }
518
ksz8_r_vlan_entries(struct ksz_device * dev,u16 addr)519 static void ksz8_r_vlan_entries(struct ksz_device *dev, u16 addr)
520 {
521 const u8 *shifts;
522 u64 data;
523 int i;
524
525 shifts = dev->info->shifts;
526
527 ksz8_r_table(dev, TABLE_VLAN, addr, &data);
528 addr *= 4;
529 for (i = 0; i < 4; i++) {
530 dev->vlan_cache[addr + i].table[0] = (u16)data;
531 data >>= shifts[VLAN_TABLE];
532 }
533 }
534
ksz8_r_vlan_table(struct ksz_device * dev,u16 vid,u16 * vlan)535 static void ksz8_r_vlan_table(struct ksz_device *dev, u16 vid, u16 *vlan)
536 {
537 int index;
538 u16 *data;
539 u16 addr;
540 u64 buf;
541
542 data = (u16 *)&buf;
543 addr = vid / 4;
544 index = vid & 3;
545 ksz8_r_table(dev, TABLE_VLAN, addr, &buf);
546 *vlan = data[index];
547 }
548
ksz8_w_vlan_table(struct ksz_device * dev,u16 vid,u16 vlan)549 static void ksz8_w_vlan_table(struct ksz_device *dev, u16 vid, u16 vlan)
550 {
551 int index;
552 u16 *data;
553 u16 addr;
554 u64 buf;
555
556 data = (u16 *)&buf;
557 addr = vid / 4;
558 index = vid & 3;
559 ksz8_r_table(dev, TABLE_VLAN, addr, &buf);
560 data[index] = vlan;
561 dev->vlan_cache[vid].table[0] = vlan;
562 ksz8_w_table(dev, TABLE_VLAN, addr, buf);
563 }
564
ksz8_r_phy(struct ksz_device * dev,u16 phy,u16 reg,u16 * val)565 int ksz8_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val)
566 {
567 u8 restart, speed, ctrl, link;
568 int processed = true;
569 const u16 *regs;
570 u8 val1, val2;
571 u16 data = 0;
572 u8 p = phy;
573 int ret;
574
575 regs = dev->info->regs;
576
577 switch (reg) {
578 case MII_BMCR:
579 ret = ksz_pread8(dev, p, regs[P_NEG_RESTART_CTRL], &restart);
580 if (ret)
581 return ret;
582
583 ret = ksz_pread8(dev, p, regs[P_SPEED_STATUS], &speed);
584 if (ret)
585 return ret;
586
587 ret = ksz_pread8(dev, p, regs[P_FORCE_CTRL], &ctrl);
588 if (ret)
589 return ret;
590
591 if (restart & PORT_PHY_LOOPBACK)
592 data |= BMCR_LOOPBACK;
593 if (ctrl & PORT_FORCE_100_MBIT)
594 data |= BMCR_SPEED100;
595 if (ksz_is_ksz88x3(dev)) {
596 if ((ctrl & PORT_AUTO_NEG_ENABLE))
597 data |= BMCR_ANENABLE;
598 } else {
599 if (!(ctrl & PORT_AUTO_NEG_DISABLE))
600 data |= BMCR_ANENABLE;
601 }
602 if (restart & PORT_POWER_DOWN)
603 data |= BMCR_PDOWN;
604 if (restart & PORT_AUTO_NEG_RESTART)
605 data |= BMCR_ANRESTART;
606 if (ctrl & PORT_FORCE_FULL_DUPLEX)
607 data |= BMCR_FULLDPLX;
608 if (speed & PORT_HP_MDIX)
609 data |= KSZ886X_BMCR_HP_MDIX;
610 if (restart & PORT_FORCE_MDIX)
611 data |= KSZ886X_BMCR_FORCE_MDI;
612 if (restart & PORT_AUTO_MDIX_DISABLE)
613 data |= KSZ886X_BMCR_DISABLE_AUTO_MDIX;
614 if (restart & PORT_TX_DISABLE)
615 data |= KSZ886X_BMCR_DISABLE_TRANSMIT;
616 if (restart & PORT_LED_OFF)
617 data |= KSZ886X_BMCR_DISABLE_LED;
618 break;
619 case MII_BMSR:
620 ret = ksz_pread8(dev, p, regs[P_LINK_STATUS], &link);
621 if (ret)
622 return ret;
623
624 data = BMSR_100FULL |
625 BMSR_100HALF |
626 BMSR_10FULL |
627 BMSR_10HALF |
628 BMSR_ANEGCAPABLE;
629 if (link & PORT_AUTO_NEG_COMPLETE)
630 data |= BMSR_ANEGCOMPLETE;
631 if (link & PORT_STAT_LINK_GOOD)
632 data |= BMSR_LSTATUS;
633 break;
634 case MII_PHYSID1:
635 data = KSZ8795_ID_HI;
636 break;
637 case MII_PHYSID2:
638 if (ksz_is_ksz88x3(dev))
639 data = KSZ8863_ID_LO;
640 else
641 data = KSZ8795_ID_LO;
642 break;
643 case MII_ADVERTISE:
644 ret = ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &ctrl);
645 if (ret)
646 return ret;
647
648 data = ADVERTISE_CSMA;
649 if (ctrl & PORT_AUTO_NEG_SYM_PAUSE)
650 data |= ADVERTISE_PAUSE_CAP;
651 if (ctrl & PORT_AUTO_NEG_100BTX_FD)
652 data |= ADVERTISE_100FULL;
653 if (ctrl & PORT_AUTO_NEG_100BTX)
654 data |= ADVERTISE_100HALF;
655 if (ctrl & PORT_AUTO_NEG_10BT_FD)
656 data |= ADVERTISE_10FULL;
657 if (ctrl & PORT_AUTO_NEG_10BT)
658 data |= ADVERTISE_10HALF;
659 break;
660 case MII_LPA:
661 ret = ksz_pread8(dev, p, regs[P_REMOTE_STATUS], &link);
662 if (ret)
663 return ret;
664
665 data = LPA_SLCT;
666 if (link & PORT_REMOTE_SYM_PAUSE)
667 data |= LPA_PAUSE_CAP;
668 if (link & PORT_REMOTE_100BTX_FD)
669 data |= LPA_100FULL;
670 if (link & PORT_REMOTE_100BTX)
671 data |= LPA_100HALF;
672 if (link & PORT_REMOTE_10BT_FD)
673 data |= LPA_10FULL;
674 if (link & PORT_REMOTE_10BT)
675 data |= LPA_10HALF;
676 if (data & ~LPA_SLCT)
677 data |= LPA_LPACK;
678 break;
679 case PHY_REG_LINK_MD:
680 ret = ksz_pread8(dev, p, REG_PORT_LINK_MD_CTRL, &val1);
681 if (ret)
682 return ret;
683
684 ret = ksz_pread8(dev, p, REG_PORT_LINK_MD_RESULT, &val2);
685 if (ret)
686 return ret;
687
688 if (val1 & PORT_START_CABLE_DIAG)
689 data |= PHY_START_CABLE_DIAG;
690
691 if (val1 & PORT_CABLE_10M_SHORT)
692 data |= PHY_CABLE_10M_SHORT;
693
694 data |= FIELD_PREP(PHY_CABLE_DIAG_RESULT_M,
695 FIELD_GET(PORT_CABLE_DIAG_RESULT_M, val1));
696
697 data |= FIELD_PREP(PHY_CABLE_FAULT_COUNTER_M,
698 (FIELD_GET(PORT_CABLE_FAULT_COUNTER_H, val1) << 8) |
699 FIELD_GET(PORT_CABLE_FAULT_COUNTER_L, val2));
700 break;
701 case PHY_REG_PHY_CTRL:
702 ret = ksz_pread8(dev, p, regs[P_LINK_STATUS], &link);
703 if (ret)
704 return ret;
705
706 if (link & PORT_MDIX_STATUS)
707 data |= KSZ886X_CTRL_MDIX_STAT;
708 break;
709 default:
710 processed = false;
711 break;
712 }
713 if (processed)
714 *val = data;
715
716 return 0;
717 }
718
ksz8_w_phy(struct ksz_device * dev,u16 phy,u16 reg,u16 val)719 int ksz8_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)
720 {
721 u8 restart, speed, ctrl, data;
722 const u16 *regs;
723 u8 p = phy;
724 int ret;
725
726 regs = dev->info->regs;
727
728 switch (reg) {
729 case MII_BMCR:
730
731 /* Do not support PHY reset function. */
732 if (val & BMCR_RESET)
733 break;
734 ret = ksz_pread8(dev, p, regs[P_SPEED_STATUS], &speed);
735 if (ret)
736 return ret;
737
738 data = speed;
739 if (val & KSZ886X_BMCR_HP_MDIX)
740 data |= PORT_HP_MDIX;
741 else
742 data &= ~PORT_HP_MDIX;
743
744 if (data != speed) {
745 ret = ksz_pwrite8(dev, p, regs[P_SPEED_STATUS], data);
746 if (ret)
747 return ret;
748 }
749
750 ret = ksz_pread8(dev, p, regs[P_FORCE_CTRL], &ctrl);
751 if (ret)
752 return ret;
753
754 data = ctrl;
755 if (ksz_is_ksz88x3(dev)) {
756 if ((val & BMCR_ANENABLE))
757 data |= PORT_AUTO_NEG_ENABLE;
758 else
759 data &= ~PORT_AUTO_NEG_ENABLE;
760 } else {
761 if (!(val & BMCR_ANENABLE))
762 data |= PORT_AUTO_NEG_DISABLE;
763 else
764 data &= ~PORT_AUTO_NEG_DISABLE;
765
766 /* Fiber port does not support auto-negotiation. */
767 if (dev->ports[p].fiber)
768 data |= PORT_AUTO_NEG_DISABLE;
769 }
770
771 if (val & BMCR_SPEED100)
772 data |= PORT_FORCE_100_MBIT;
773 else
774 data &= ~PORT_FORCE_100_MBIT;
775 if (val & BMCR_FULLDPLX)
776 data |= PORT_FORCE_FULL_DUPLEX;
777 else
778 data &= ~PORT_FORCE_FULL_DUPLEX;
779
780 if (data != ctrl) {
781 ret = ksz_pwrite8(dev, p, regs[P_FORCE_CTRL], data);
782 if (ret)
783 return ret;
784 }
785
786 ret = ksz_pread8(dev, p, regs[P_NEG_RESTART_CTRL], &restart);
787 if (ret)
788 return ret;
789
790 data = restart;
791 if (val & KSZ886X_BMCR_DISABLE_LED)
792 data |= PORT_LED_OFF;
793 else
794 data &= ~PORT_LED_OFF;
795 if (val & KSZ886X_BMCR_DISABLE_TRANSMIT)
796 data |= PORT_TX_DISABLE;
797 else
798 data &= ~PORT_TX_DISABLE;
799 if (val & BMCR_ANRESTART)
800 data |= PORT_AUTO_NEG_RESTART;
801 else
802 data &= ~(PORT_AUTO_NEG_RESTART);
803 if (val & BMCR_PDOWN)
804 data |= PORT_POWER_DOWN;
805 else
806 data &= ~PORT_POWER_DOWN;
807 if (val & KSZ886X_BMCR_DISABLE_AUTO_MDIX)
808 data |= PORT_AUTO_MDIX_DISABLE;
809 else
810 data &= ~PORT_AUTO_MDIX_DISABLE;
811 if (val & KSZ886X_BMCR_FORCE_MDI)
812 data |= PORT_FORCE_MDIX;
813 else
814 data &= ~PORT_FORCE_MDIX;
815 if (val & BMCR_LOOPBACK)
816 data |= PORT_PHY_LOOPBACK;
817 else
818 data &= ~PORT_PHY_LOOPBACK;
819
820 if (data != restart) {
821 ret = ksz_pwrite8(dev, p, regs[P_NEG_RESTART_CTRL],
822 data);
823 if (ret)
824 return ret;
825 }
826 break;
827 case MII_ADVERTISE:
828 ret = ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &ctrl);
829 if (ret)
830 return ret;
831
832 data = ctrl;
833 data &= ~(PORT_AUTO_NEG_SYM_PAUSE |
834 PORT_AUTO_NEG_100BTX_FD |
835 PORT_AUTO_NEG_100BTX |
836 PORT_AUTO_NEG_10BT_FD |
837 PORT_AUTO_NEG_10BT);
838 if (val & ADVERTISE_PAUSE_CAP)
839 data |= PORT_AUTO_NEG_SYM_PAUSE;
840 if (val & ADVERTISE_100FULL)
841 data |= PORT_AUTO_NEG_100BTX_FD;
842 if (val & ADVERTISE_100HALF)
843 data |= PORT_AUTO_NEG_100BTX;
844 if (val & ADVERTISE_10FULL)
845 data |= PORT_AUTO_NEG_10BT_FD;
846 if (val & ADVERTISE_10HALF)
847 data |= PORT_AUTO_NEG_10BT;
848
849 if (data != ctrl) {
850 ret = ksz_pwrite8(dev, p, regs[P_LOCAL_CTRL], data);
851 if (ret)
852 return ret;
853 }
854 break;
855 case PHY_REG_LINK_MD:
856 if (val & PHY_START_CABLE_DIAG)
857 ksz_port_cfg(dev, p, REG_PORT_LINK_MD_CTRL, PORT_START_CABLE_DIAG, true);
858 break;
859 default:
860 break;
861 }
862
863 return 0;
864 }
865
ksz8_cfg_port_member(struct ksz_device * dev,int port,u8 member)866 void ksz8_cfg_port_member(struct ksz_device *dev, int port, u8 member)
867 {
868 u8 data;
869
870 ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
871 data &= ~PORT_VLAN_MEMBERSHIP;
872 data |= (member & dev->port_mask);
873 ksz_pwrite8(dev, port, P_MIRROR_CTRL, data);
874 }
875
ksz8_flush_dyn_mac_table(struct ksz_device * dev,int port)876 void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port)
877 {
878 u8 learn[DSA_MAX_PORTS];
879 int first, index, cnt;
880 struct ksz_port *p;
881 const u16 *regs;
882
883 regs = dev->info->regs;
884
885 if ((uint)port < dev->info->port_cnt) {
886 first = port;
887 cnt = port + 1;
888 } else {
889 /* Flush all ports. */
890 first = 0;
891 cnt = dev->info->port_cnt;
892 }
893 for (index = first; index < cnt; index++) {
894 p = &dev->ports[index];
895 if (!p->on)
896 continue;
897 ksz_pread8(dev, index, regs[P_STP_CTRL], &learn[index]);
898 if (!(learn[index] & PORT_LEARN_DISABLE))
899 ksz_pwrite8(dev, index, regs[P_STP_CTRL],
900 learn[index] | PORT_LEARN_DISABLE);
901 }
902 ksz_cfg(dev, S_FLUSH_TABLE_CTRL, SW_FLUSH_DYN_MAC_TABLE, true);
903 for (index = first; index < cnt; index++) {
904 p = &dev->ports[index];
905 if (!p->on)
906 continue;
907 if (!(learn[index] & PORT_LEARN_DISABLE))
908 ksz_pwrite8(dev, index, regs[P_STP_CTRL], learn[index]);
909 }
910 }
911
ksz8_fdb_dump(struct ksz_device * dev,int port,dsa_fdb_dump_cb_t * cb,void * data)912 int ksz8_fdb_dump(struct ksz_device *dev, int port,
913 dsa_fdb_dump_cb_t *cb, void *data)
914 {
915 int ret = 0;
916 u16 i = 0;
917 u16 entries = 0;
918 u8 timestamp = 0;
919 u8 fid;
920 u8 src_port;
921 u8 mac[ETH_ALEN];
922
923 do {
924 ret = ksz8_r_dyn_mac_table(dev, i, mac, &fid, &src_port,
925 ×tamp, &entries);
926 if (!ret && port == src_port) {
927 ret = cb(mac, fid, false, data);
928 if (ret)
929 break;
930 }
931 i++;
932 } while (i < entries);
933 if (i >= entries)
934 ret = 0;
935
936 return ret;
937 }
938
ksz8_add_sta_mac(struct ksz_device * dev,int port,const unsigned char * addr,u16 vid)939 static int ksz8_add_sta_mac(struct ksz_device *dev, int port,
940 const unsigned char *addr, u16 vid)
941 {
942 struct alu_struct alu;
943 int index, ret;
944 int empty = 0;
945
946 alu.port_forward = 0;
947 for (index = 0; index < dev->info->num_statics; index++) {
948 bool valid;
949
950 ret = ksz8_r_sta_mac_table(dev, index, &alu, &valid);
951 if (ret)
952 return ret;
953 if (!valid) {
954 /* Remember the first empty entry. */
955 if (!empty)
956 empty = index + 1;
957 continue;
958 }
959
960 if (!memcmp(alu.mac, addr, ETH_ALEN) && alu.fid == vid)
961 break;
962 }
963
964 /* no available entry */
965 if (index == dev->info->num_statics && !empty)
966 return -ENOSPC;
967
968 /* add entry */
969 if (index == dev->info->num_statics) {
970 index = empty - 1;
971 memset(&alu, 0, sizeof(alu));
972 memcpy(alu.mac, addr, ETH_ALEN);
973 alu.is_static = true;
974 }
975 alu.port_forward |= BIT(port);
976 if (vid) {
977 alu.is_use_fid = true;
978
979 /* Need a way to map VID to FID. */
980 alu.fid = vid;
981 }
982 ksz8_w_sta_mac_table(dev, index, &alu);
983
984 return 0;
985 }
986
ksz8_del_sta_mac(struct ksz_device * dev,int port,const unsigned char * addr,u16 vid)987 static int ksz8_del_sta_mac(struct ksz_device *dev, int port,
988 const unsigned char *addr, u16 vid)
989 {
990 struct alu_struct alu;
991 int index, ret;
992
993 for (index = 0; index < dev->info->num_statics; index++) {
994 bool valid;
995
996 ret = ksz8_r_sta_mac_table(dev, index, &alu, &valid);
997 if (ret)
998 return ret;
999 if (!valid)
1000 continue;
1001
1002 if (!memcmp(alu.mac, addr, ETH_ALEN) && alu.fid == vid)
1003 break;
1004 }
1005
1006 /* no available entry */
1007 if (index == dev->info->num_statics)
1008 goto exit;
1009
1010 /* clear port */
1011 alu.port_forward &= ~BIT(port);
1012 if (!alu.port_forward)
1013 alu.is_static = false;
1014 ksz8_w_sta_mac_table(dev, index, &alu);
1015
1016 exit:
1017 return 0;
1018 }
1019
ksz8_mdb_add(struct ksz_device * dev,int port,const struct switchdev_obj_port_mdb * mdb,struct dsa_db db)1020 int ksz8_mdb_add(struct ksz_device *dev, int port,
1021 const struct switchdev_obj_port_mdb *mdb, struct dsa_db db)
1022 {
1023 return ksz8_add_sta_mac(dev, port, mdb->addr, mdb->vid);
1024 }
1025
ksz8_mdb_del(struct ksz_device * dev,int port,const struct switchdev_obj_port_mdb * mdb,struct dsa_db db)1026 int ksz8_mdb_del(struct ksz_device *dev, int port,
1027 const struct switchdev_obj_port_mdb *mdb, struct dsa_db db)
1028 {
1029 return ksz8_del_sta_mac(dev, port, mdb->addr, mdb->vid);
1030 }
1031
ksz8_port_vlan_filtering(struct ksz_device * dev,int port,bool flag,struct netlink_ext_ack * extack)1032 int ksz8_port_vlan_filtering(struct ksz_device *dev, int port, bool flag,
1033 struct netlink_ext_ack *extack)
1034 {
1035 if (ksz_is_ksz88x3(dev))
1036 return -ENOTSUPP;
1037
1038 /* Discard packets with VID not enabled on the switch */
1039 ksz_cfg(dev, S_MIRROR_CTRL, SW_VLAN_ENABLE, flag);
1040
1041 /* Discard packets with VID not enabled on the ingress port */
1042 for (port = 0; port < dev->phy_port_cnt; ++port)
1043 ksz_port_cfg(dev, port, REG_PORT_CTRL_2, PORT_INGRESS_FILTER,
1044 flag);
1045
1046 return 0;
1047 }
1048
ksz8_port_enable_pvid(struct ksz_device * dev,int port,bool state)1049 static void ksz8_port_enable_pvid(struct ksz_device *dev, int port, bool state)
1050 {
1051 if (ksz_is_ksz88x3(dev)) {
1052 ksz_cfg(dev, REG_SW_INSERT_SRC_PVID,
1053 0x03 << (4 - 2 * port), state);
1054 } else {
1055 ksz_pwrite8(dev, port, REG_PORT_CTRL_12, state ? 0x0f : 0x00);
1056 }
1057 }
1058
ksz8_port_vlan_add(struct ksz_device * dev,int port,const struct switchdev_obj_port_vlan * vlan,struct netlink_ext_ack * extack)1059 int ksz8_port_vlan_add(struct ksz_device *dev, int port,
1060 const struct switchdev_obj_port_vlan *vlan,
1061 struct netlink_ext_ack *extack)
1062 {
1063 bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
1064 struct ksz_port *p = &dev->ports[port];
1065 u16 data, new_pvid = 0;
1066 u8 fid, member, valid;
1067
1068 if (ksz_is_ksz88x3(dev))
1069 return -ENOTSUPP;
1070
1071 /* If a VLAN is added with untagged flag different from the
1072 * port's Remove Tag flag, we need to change the latter.
1073 * Ignore VID 0, which is always untagged.
1074 * Ignore CPU port, which will always be tagged.
1075 */
1076 if (untagged != p->remove_tag && vlan->vid != 0 &&
1077 port != dev->cpu_port) {
1078 unsigned int vid;
1079
1080 /* Reject attempts to add a VLAN that requires the
1081 * Remove Tag flag to be changed, unless there are no
1082 * other VLANs currently configured.
1083 */
1084 for (vid = 1; vid < dev->info->num_vlans; ++vid) {
1085 /* Skip the VID we are going to add or reconfigure */
1086 if (vid == vlan->vid)
1087 continue;
1088
1089 ksz8_from_vlan(dev, dev->vlan_cache[vid].table[0],
1090 &fid, &member, &valid);
1091 if (valid && (member & BIT(port)))
1092 return -EINVAL;
1093 }
1094
1095 ksz_port_cfg(dev, port, P_TAG_CTRL, PORT_REMOVE_TAG, untagged);
1096 p->remove_tag = untagged;
1097 }
1098
1099 ksz8_r_vlan_table(dev, vlan->vid, &data);
1100 ksz8_from_vlan(dev, data, &fid, &member, &valid);
1101
1102 /* First time to setup the VLAN entry. */
1103 if (!valid) {
1104 /* Need to find a way to map VID to FID. */
1105 fid = 1;
1106 valid = 1;
1107 }
1108 member |= BIT(port);
1109
1110 ksz8_to_vlan(dev, fid, member, valid, &data);
1111 ksz8_w_vlan_table(dev, vlan->vid, data);
1112
1113 /* change PVID */
1114 if (vlan->flags & BRIDGE_VLAN_INFO_PVID)
1115 new_pvid = vlan->vid;
1116
1117 if (new_pvid) {
1118 u16 vid;
1119
1120 ksz_pread16(dev, port, REG_PORT_CTRL_VID, &vid);
1121 vid &= ~VLAN_VID_MASK;
1122 vid |= new_pvid;
1123 ksz_pwrite16(dev, port, REG_PORT_CTRL_VID, vid);
1124
1125 ksz8_port_enable_pvid(dev, port, true);
1126 }
1127
1128 return 0;
1129 }
1130
ksz8_port_vlan_del(struct ksz_device * dev,int port,const struct switchdev_obj_port_vlan * vlan)1131 int ksz8_port_vlan_del(struct ksz_device *dev, int port,
1132 const struct switchdev_obj_port_vlan *vlan)
1133 {
1134 u16 data, pvid;
1135 u8 fid, member, valid;
1136
1137 if (ksz_is_ksz88x3(dev))
1138 return -ENOTSUPP;
1139
1140 ksz_pread16(dev, port, REG_PORT_CTRL_VID, &pvid);
1141 pvid = pvid & 0xFFF;
1142
1143 ksz8_r_vlan_table(dev, vlan->vid, &data);
1144 ksz8_from_vlan(dev, data, &fid, &member, &valid);
1145
1146 member &= ~BIT(port);
1147
1148 /* Invalidate the entry if no more member. */
1149 if (!member) {
1150 fid = 0;
1151 valid = 0;
1152 }
1153
1154 ksz8_to_vlan(dev, fid, member, valid, &data);
1155 ksz8_w_vlan_table(dev, vlan->vid, data);
1156
1157 if (pvid == vlan->vid)
1158 ksz8_port_enable_pvid(dev, port, false);
1159
1160 return 0;
1161 }
1162
ksz8_port_mirror_add(struct ksz_device * dev,int port,struct dsa_mall_mirror_tc_entry * mirror,bool ingress,struct netlink_ext_ack * extack)1163 int ksz8_port_mirror_add(struct ksz_device *dev, int port,
1164 struct dsa_mall_mirror_tc_entry *mirror,
1165 bool ingress, struct netlink_ext_ack *extack)
1166 {
1167 if (ingress) {
1168 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, true);
1169 dev->mirror_rx |= BIT(port);
1170 } else {
1171 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, true);
1172 dev->mirror_tx |= BIT(port);
1173 }
1174
1175 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_SNIFFER, false);
1176
1177 /* configure mirror port */
1178 if (dev->mirror_rx || dev->mirror_tx)
1179 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
1180 PORT_MIRROR_SNIFFER, true);
1181
1182 return 0;
1183 }
1184
ksz8_port_mirror_del(struct ksz_device * dev,int port,struct dsa_mall_mirror_tc_entry * mirror)1185 void ksz8_port_mirror_del(struct ksz_device *dev, int port,
1186 struct dsa_mall_mirror_tc_entry *mirror)
1187 {
1188 u8 data;
1189
1190 if (mirror->ingress) {
1191 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, false);
1192 dev->mirror_rx &= ~BIT(port);
1193 } else {
1194 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, false);
1195 dev->mirror_tx &= ~BIT(port);
1196 }
1197
1198 ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
1199
1200 if (!dev->mirror_rx && !dev->mirror_tx)
1201 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
1202 PORT_MIRROR_SNIFFER, false);
1203 }
1204
ksz8795_cpu_interface_select(struct ksz_device * dev,int port)1205 static void ksz8795_cpu_interface_select(struct ksz_device *dev, int port)
1206 {
1207 struct ksz_port *p = &dev->ports[port];
1208
1209 if (!p->interface && dev->compat_interface) {
1210 dev_warn(dev->dev,
1211 "Using legacy switch \"phy-mode\" property, because it is missing on port %d node. "
1212 "Please update your device tree.\n",
1213 port);
1214 p->interface = dev->compat_interface;
1215 }
1216 }
1217
ksz8_port_setup(struct ksz_device * dev,int port,bool cpu_port)1218 void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port)
1219 {
1220 struct dsa_switch *ds = dev->ds;
1221 const u32 *masks;
1222 u8 member;
1223
1224 masks = dev->info->masks;
1225
1226 /* enable broadcast storm limit */
1227 ksz_port_cfg(dev, port, P_BCAST_STORM_CTRL, PORT_BROADCAST_STORM, true);
1228
1229 if (!ksz_is_ksz88x3(dev))
1230 ksz8795_set_prio_queue(dev, port, 4);
1231
1232 /* disable DiffServ priority */
1233 ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_DIFFSERV_ENABLE, false);
1234
1235 /* replace priority */
1236 ksz_port_cfg(dev, port, P_802_1P_CTRL,
1237 masks[PORT_802_1P_REMAPPING], false);
1238
1239 /* enable 802.1p priority */
1240 ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_ENABLE, true);
1241
1242 if (cpu_port) {
1243 if (!ksz_is_ksz88x3(dev))
1244 ksz8795_cpu_interface_select(dev, port);
1245
1246 member = dsa_user_ports(ds);
1247 } else {
1248 member = BIT(dsa_upstream_port(ds, port));
1249 }
1250
1251 ksz8_cfg_port_member(dev, port, member);
1252 }
1253
ksz8_config_cpu_port(struct dsa_switch * ds)1254 void ksz8_config_cpu_port(struct dsa_switch *ds)
1255 {
1256 struct ksz_device *dev = ds->priv;
1257 struct ksz_port *p;
1258 const u32 *masks;
1259 const u16 *regs;
1260 u8 remote;
1261 int i;
1262
1263 masks = dev->info->masks;
1264 regs = dev->info->regs;
1265
1266 /* Switch marks the maximum frame with extra byte as oversize. */
1267 ksz_cfg(dev, REG_SW_CTRL_2, SW_LEGAL_PACKET_DISABLE, true);
1268 ksz_cfg(dev, regs[S_TAIL_TAG_CTRL], masks[SW_TAIL_TAG_ENABLE], true);
1269
1270 p = &dev->ports[dev->cpu_port];
1271 p->on = 1;
1272
1273 ksz8_port_setup(dev, dev->cpu_port, true);
1274
1275 for (i = 0; i < dev->phy_port_cnt; i++) {
1276 p = &dev->ports[i];
1277
1278 ksz_port_stp_state_set(ds, i, BR_STATE_DISABLED);
1279
1280 /* Last port may be disabled. */
1281 if (i == dev->phy_port_cnt)
1282 break;
1283 p->on = 1;
1284 }
1285 for (i = 0; i < dev->phy_port_cnt; i++) {
1286 p = &dev->ports[i];
1287 if (!p->on)
1288 continue;
1289 if (!ksz_is_ksz88x3(dev)) {
1290 ksz_pread8(dev, i, regs[P_REMOTE_STATUS], &remote);
1291 if (remote & KSZ8_PORT_FIBER_MODE)
1292 p->fiber = 1;
1293 }
1294 if (p->fiber)
1295 ksz_port_cfg(dev, i, regs[P_STP_CTRL],
1296 PORT_FORCE_FLOW_CTRL, true);
1297 else
1298 ksz_port_cfg(dev, i, regs[P_STP_CTRL],
1299 PORT_FORCE_FLOW_CTRL, false);
1300 }
1301 }
1302
ksz8_handle_global_errata(struct dsa_switch * ds)1303 static int ksz8_handle_global_errata(struct dsa_switch *ds)
1304 {
1305 struct ksz_device *dev = ds->priv;
1306 int ret = 0;
1307
1308 /* KSZ87xx Errata DS80000687C.
1309 * Module 2: Link drops with some EEE link partners.
1310 * An issue with the EEE next page exchange between the
1311 * KSZ879x/KSZ877x/KSZ876x and some EEE link partners may result in
1312 * the link dropping.
1313 */
1314 if (dev->info->ksz87xx_eee_link_erratum)
1315 ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0);
1316
1317 return ret;
1318 }
1319
ksz8_enable_stp_addr(struct ksz_device * dev)1320 int ksz8_enable_stp_addr(struct ksz_device *dev)
1321 {
1322 struct alu_struct alu;
1323
1324 /* Setup STP address for STP operation. */
1325 memset(&alu, 0, sizeof(alu));
1326 ether_addr_copy(alu.mac, eth_stp_addr);
1327 alu.is_static = true;
1328 alu.is_override = true;
1329 alu.port_forward = dev->info->cpu_ports;
1330
1331 ksz8_w_sta_mac_table(dev, 0, &alu);
1332
1333 return 0;
1334 }
1335
ksz8_setup(struct dsa_switch * ds)1336 int ksz8_setup(struct dsa_switch *ds)
1337 {
1338 struct ksz_device *dev = ds->priv;
1339 int i;
1340
1341 ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true);
1342
1343 /* Enable automatic fast aging when link changed detected. */
1344 ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);
1345
1346 /* Enable aggressive back off algorithm in half duplex mode. */
1347 regmap_update_bits(dev->regmap[0], REG_SW_CTRL_1,
1348 SW_AGGR_BACKOFF, SW_AGGR_BACKOFF);
1349
1350 /*
1351 * Make sure unicast VLAN boundary is set as default and
1352 * enable no excessive collision drop.
1353 */
1354 regmap_update_bits(dev->regmap[0], REG_SW_CTRL_2,
1355 UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP,
1356 UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP);
1357
1358 ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_REPLACE_VID, false);
1359
1360 ksz_cfg(dev, S_MIRROR_CTRL, SW_MIRROR_RX_TX, false);
1361
1362 if (!ksz_is_ksz88x3(dev))
1363 ksz_cfg(dev, REG_SW_CTRL_19, SW_INS_TAG_ENABLE, true);
1364
1365 for (i = 0; i < (dev->info->num_vlans / 4); i++)
1366 ksz8_r_vlan_entries(dev, i);
1367
1368 return ksz8_handle_global_errata(ds);
1369 }
1370
ksz8_get_caps(struct ksz_device * dev,int port,struct phylink_config * config)1371 void ksz8_get_caps(struct ksz_device *dev, int port,
1372 struct phylink_config *config)
1373 {
1374 config->mac_capabilities = MAC_10 | MAC_100;
1375
1376 /* Silicon Errata Sheet (DS80000830A):
1377 * "Port 1 does not respond to received flow control PAUSE frames"
1378 * So, disable Pause support on "Port 1" (port == 0) for all ksz88x3
1379 * switches.
1380 */
1381 if (!ksz_is_ksz88x3(dev) || port)
1382 config->mac_capabilities |= MAC_SYM_PAUSE;
1383
1384 /* Asym pause is not supported on KSZ8863 and KSZ8873 */
1385 if (!ksz_is_ksz88x3(dev))
1386 config->mac_capabilities |= MAC_ASYM_PAUSE;
1387 }
1388
ksz8_get_port_addr(int port,int offset)1389 u32 ksz8_get_port_addr(int port, int offset)
1390 {
1391 return PORT_CTRL_ADDR(port, offset);
1392 }
1393
ksz8_switch_init(struct ksz_device * dev)1394 int ksz8_switch_init(struct ksz_device *dev)
1395 {
1396 dev->cpu_port = fls(dev->info->cpu_ports) - 1;
1397 dev->phy_port_cnt = dev->info->port_cnt - 1;
1398 dev->port_mask = (BIT(dev->phy_port_cnt) - 1) | dev->info->cpu_ports;
1399
1400 /* We rely on software untagging on the CPU port, so that we
1401 * can support both tagged and untagged VLANs
1402 */
1403 dev->ds->untag_bridge_pvid = true;
1404
1405 /* VLAN filtering is partly controlled by the global VLAN
1406 * Enable flag
1407 */
1408 dev->ds->vlan_filtering_is_global = true;
1409
1410 return 0;
1411 }
1412
ksz8_switch_exit(struct ksz_device * dev)1413 void ksz8_switch_exit(struct ksz_device *dev)
1414 {
1415 ksz8_reset_switch(dev);
1416 }
1417
1418 MODULE_AUTHOR("Tristram Ha <Tristram.Ha@microchip.com>");
1419 MODULE_DESCRIPTION("Microchip KSZ8795 Series Switch DSA Driver");
1420 MODULE_LICENSE("GPL");
1421