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1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* QLogic qed NIC Driver
3  * Copyright (c) 2015-2017  QLogic Corporation
4  * Copyright (c) 2019-2020 Marvell International Ltd.
5  */
6 
7 #include <linux/types.h>
8 #include <asm/byteorder.h>
9 #include <linux/dma-mapping.h>
10 #include <linux/if_vlan.h>
11 #include <linux/kernel.h>
12 #include <linux/pci.h>
13 #include <linux/slab.h>
14 #include <linux/stddef.h>
15 #include <linux/workqueue.h>
16 #include <net/ipv6.h>
17 #include <linux/bitops.h>
18 #include <linux/delay.h>
19 #include <linux/errno.h>
20 #include <linux/etherdevice.h>
21 #include <linux/io.h>
22 #include <linux/list.h>
23 #include <linux/mutex.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/qed/qed_ll2_if.h>
27 #include "qed.h"
28 #include "qed_cxt.h"
29 #include "qed_dev_api.h"
30 #include "qed_hsi.h"
31 #include "qed_iro_hsi.h"
32 #include "qed_hw.h"
33 #include "qed_int.h"
34 #include "qed_ll2.h"
35 #include "qed_mcp.h"
36 #include "qed_ooo.h"
37 #include "qed_reg_addr.h"
38 #include "qed_sp.h"
39 #include "qed_rdma.h"
40 
41 #define QED_LL2_RX_REGISTERED(ll2)	((ll2)->rx_queue.b_cb_registered)
42 #define QED_LL2_TX_REGISTERED(ll2)	((ll2)->tx_queue.b_cb_registered)
43 
44 #define QED_LL2_TX_SIZE (256)
45 #define QED_LL2_RX_SIZE (4096)
46 
47 #define QED_LL2_INVALID_STATS_ID        0xff
48 
49 struct qed_cb_ll2_info {
50 	int rx_cnt;
51 	u32 rx_size;
52 	u8 handle;
53 
54 	/* Lock protecting LL2 buffer lists in sleepless context */
55 	spinlock_t lock;
56 	struct list_head list;
57 
58 	const struct qed_ll2_cb_ops *cbs;
59 	void *cb_cookie;
60 };
61 
62 struct qed_ll2_buffer {
63 	struct list_head list;
64 	void *data;
65 	dma_addr_t phys_addr;
66 };
67 
qed_ll2_handle_to_stats_id(struct qed_hwfn * p_hwfn,u8 ll2_queue_type,u8 qid)68 static u8 qed_ll2_handle_to_stats_id(struct qed_hwfn *p_hwfn,
69 				     u8 ll2_queue_type, u8 qid)
70 {
71 	u8 stats_id;
72 
73 	/* For legacy (RAM based) queues, the stats_id will be set as the
74 	 * queue_id. Otherwise (context based queue), it will be set to
75 	 * the "abs_pf_id" offset from the end of the RAM based queue IDs.
76 	 * If the final value exceeds the total counters amount, return
77 	 * INVALID value to indicate that the stats for this connection should
78 	 * be disabled.
79 	 */
80 	if (ll2_queue_type == QED_LL2_RX_TYPE_LEGACY)
81 		stats_id = qid;
82 	else
83 		stats_id = MAX_NUM_LL2_RX_RAM_QUEUES + p_hwfn->abs_pf_id;
84 
85 	if (stats_id < MAX_NUM_LL2_TX_STATS_COUNTERS)
86 		return stats_id;
87 	else
88 		return QED_LL2_INVALID_STATS_ID;
89 }
90 
qed_ll2b_complete_tx_packet(void * cxt,u8 connection_handle,void * cookie,dma_addr_t first_frag_addr,bool b_last_fragment,bool b_last_packet)91 static void qed_ll2b_complete_tx_packet(void *cxt,
92 					u8 connection_handle,
93 					void *cookie,
94 					dma_addr_t first_frag_addr,
95 					bool b_last_fragment,
96 					bool b_last_packet)
97 {
98 	struct qed_hwfn *p_hwfn = cxt;
99 	struct qed_dev *cdev = p_hwfn->cdev;
100 	struct sk_buff *skb = cookie;
101 
102 	/* All we need to do is release the mapping */
103 	dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
104 			 skb_headlen(skb), DMA_TO_DEVICE);
105 
106 	if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
107 		cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
108 				      b_last_fragment);
109 
110 	dev_kfree_skb_any(skb);
111 }
112 
qed_ll2_alloc_buffer(struct qed_dev * cdev,u8 ** data,dma_addr_t * phys_addr)113 static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
114 				u8 **data, dma_addr_t *phys_addr)
115 {
116 	size_t size = cdev->ll2->rx_size + NET_SKB_PAD +
117 		      SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
118 
119 	*data = kmalloc(size, GFP_ATOMIC);
120 	if (!(*data)) {
121 		DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
122 		return -ENOMEM;
123 	}
124 
125 	*phys_addr = dma_map_single(&cdev->pdev->dev,
126 				    ((*data) + NET_SKB_PAD),
127 				    cdev->ll2->rx_size, DMA_FROM_DEVICE);
128 	if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
129 		DP_INFO(cdev, "Failed to map LL2 buffer data\n");
130 		kfree((*data));
131 		return -ENOMEM;
132 	}
133 
134 	return 0;
135 }
136 
qed_ll2_dealloc_buffer(struct qed_dev * cdev,struct qed_ll2_buffer * buffer)137 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
138 				  struct qed_ll2_buffer *buffer)
139 {
140 	spin_lock_bh(&cdev->ll2->lock);
141 
142 	dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
143 			 cdev->ll2->rx_size, DMA_FROM_DEVICE);
144 	kfree(buffer->data);
145 	list_del(&buffer->list);
146 
147 	cdev->ll2->rx_cnt--;
148 	if (!cdev->ll2->rx_cnt)
149 		DP_INFO(cdev, "All LL2 entries were removed\n");
150 
151 	spin_unlock_bh(&cdev->ll2->lock);
152 
153 	return 0;
154 }
155 
qed_ll2_kill_buffers(struct qed_dev * cdev)156 static void qed_ll2_kill_buffers(struct qed_dev *cdev)
157 {
158 	struct qed_ll2_buffer *buffer, *tmp_buffer;
159 
160 	list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
161 		qed_ll2_dealloc_buffer(cdev, buffer);
162 }
163 
qed_ll2b_complete_rx_packet(void * cxt,struct qed_ll2_comp_rx_data * data)164 static void qed_ll2b_complete_rx_packet(void *cxt,
165 					struct qed_ll2_comp_rx_data *data)
166 {
167 	struct qed_hwfn *p_hwfn = cxt;
168 	struct qed_ll2_buffer *buffer = data->cookie;
169 	struct qed_dev *cdev = p_hwfn->cdev;
170 	dma_addr_t new_phys_addr;
171 	struct sk_buff *skb;
172 	bool reuse = false;
173 	int rc = -EINVAL;
174 	u8 *new_data;
175 
176 	DP_VERBOSE(p_hwfn,
177 		   (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
178 		   "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
179 		   (u64)data->rx_buf_addr,
180 		   data->u.placement_offset,
181 		   data->length.packet_length,
182 		   data->parse_flags,
183 		   data->vlan, data->opaque_data_0, data->opaque_data_1);
184 
185 	if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
186 		print_hex_dump(KERN_INFO, "",
187 			       DUMP_PREFIX_OFFSET, 16, 1,
188 			       buffer->data, data->length.packet_length, false);
189 	}
190 
191 	/* Determine if data is valid */
192 	if (data->length.packet_length < ETH_HLEN)
193 		reuse = true;
194 
195 	/* Allocate a replacement for buffer; Reuse upon failure */
196 	if (!reuse)
197 		rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
198 					  &new_phys_addr);
199 
200 	/* If need to reuse or there's no replacement buffer, repost this */
201 	if (rc)
202 		goto out_post;
203 	dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
204 			 cdev->ll2->rx_size, DMA_FROM_DEVICE);
205 
206 	skb = build_skb(buffer->data, 0);
207 	if (!skb) {
208 		DP_INFO(cdev, "Failed to build SKB\n");
209 		kfree(buffer->data);
210 		goto out_post1;
211 	}
212 
213 	data->u.placement_offset += NET_SKB_PAD;
214 	skb_reserve(skb, data->u.placement_offset);
215 	skb_put(skb, data->length.packet_length);
216 	skb_checksum_none_assert(skb);
217 
218 	/* Get parital ethernet information instead of eth_type_trans(),
219 	 * Since we don't have an associated net_device.
220 	 */
221 	skb_reset_mac_header(skb);
222 	skb->protocol = eth_hdr(skb)->h_proto;
223 
224 	/* Pass SKB onward */
225 	if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
226 		if (data->vlan)
227 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
228 					       data->vlan);
229 		cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
230 				      data->opaque_data_0,
231 				      data->opaque_data_1);
232 	} else {
233 		DP_VERBOSE(p_hwfn, (NETIF_MSG_RX_STATUS | NETIF_MSG_PKTDATA |
234 				    QED_MSG_LL2 | QED_MSG_STORAGE),
235 			   "Dropping the packet\n");
236 		kfree(buffer->data);
237 	}
238 
239 out_post1:
240 	/* Update Buffer information and update FW producer */
241 	buffer->data = new_data;
242 	buffer->phys_addr = new_phys_addr;
243 
244 out_post:
245 	rc = qed_ll2_post_rx_buffer(p_hwfn, cdev->ll2->handle,
246 				    buffer->phys_addr, 0, buffer, 1);
247 	if (rc)
248 		qed_ll2_dealloc_buffer(cdev, buffer);
249 }
250 
__qed_ll2_handle_sanity(struct qed_hwfn * p_hwfn,u8 connection_handle,bool b_lock,bool b_only_active)251 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
252 						    u8 connection_handle,
253 						    bool b_lock,
254 						    bool b_only_active)
255 {
256 	struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
257 
258 	if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
259 		return NULL;
260 
261 	if (!p_hwfn->p_ll2_info)
262 		return NULL;
263 
264 	p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
265 
266 	if (b_only_active) {
267 		if (b_lock)
268 			mutex_lock(&p_ll2_conn->mutex);
269 		if (p_ll2_conn->b_active)
270 			p_ret = p_ll2_conn;
271 		if (b_lock)
272 			mutex_unlock(&p_ll2_conn->mutex);
273 	} else {
274 		p_ret = p_ll2_conn;
275 	}
276 
277 	return p_ret;
278 }
279 
qed_ll2_handle_sanity(struct qed_hwfn * p_hwfn,u8 connection_handle)280 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
281 						  u8 connection_handle)
282 {
283 	return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
284 }
285 
qed_ll2_handle_sanity_lock(struct qed_hwfn * p_hwfn,u8 connection_handle)286 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
287 						       u8 connection_handle)
288 {
289 	return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
290 }
291 
qed_ll2_handle_sanity_inactive(struct qed_hwfn * p_hwfn,u8 connection_handle)292 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
293 							   *p_hwfn,
294 							   u8 connection_handle)
295 {
296 	return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
297 }
298 
qed_ll2_txq_flush(struct qed_hwfn * p_hwfn,u8 connection_handle)299 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
300 {
301 	bool b_last_packet = false, b_last_frag = false;
302 	struct qed_ll2_tx_packet *p_pkt = NULL;
303 	struct qed_ll2_info *p_ll2_conn;
304 	struct qed_ll2_tx_queue *p_tx;
305 	unsigned long flags = 0;
306 	dma_addr_t tx_frag;
307 
308 	p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
309 	if (!p_ll2_conn)
310 		return;
311 
312 	p_tx = &p_ll2_conn->tx_queue;
313 
314 	spin_lock_irqsave(&p_tx->lock, flags);
315 	while (!list_empty(&p_tx->active_descq)) {
316 		p_pkt = list_first_entry(&p_tx->active_descq,
317 					 struct qed_ll2_tx_packet, list_entry);
318 		if (!p_pkt)
319 			break;
320 
321 		list_del(&p_pkt->list_entry);
322 		b_last_packet = list_empty(&p_tx->active_descq);
323 		list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
324 		spin_unlock_irqrestore(&p_tx->lock, flags);
325 		if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
326 			struct qed_ooo_buffer *p_buffer;
327 
328 			p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
329 			qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
330 						p_buffer);
331 		} else {
332 			p_tx->cur_completing_packet = *p_pkt;
333 			p_tx->cur_completing_bd_idx = 1;
334 			b_last_frag =
335 				p_tx->cur_completing_bd_idx == p_pkt->bd_used;
336 			tx_frag = p_pkt->bds_set[0].tx_frag;
337 			p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie,
338 						      p_ll2_conn->my_id,
339 						      p_pkt->cookie,
340 						      tx_frag,
341 						      b_last_frag,
342 						      b_last_packet);
343 		}
344 		spin_lock_irqsave(&p_tx->lock, flags);
345 	}
346 	spin_unlock_irqrestore(&p_tx->lock, flags);
347 }
348 
qed_ll2_txq_completion(struct qed_hwfn * p_hwfn,void * p_cookie)349 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
350 {
351 	struct qed_ll2_info *p_ll2_conn = p_cookie;
352 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
353 	u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
354 	struct qed_ll2_tx_packet *p_pkt;
355 	bool b_last_frag = false;
356 	unsigned long flags;
357 	int rc = -EINVAL;
358 
359 	if (!p_ll2_conn)
360 		return rc;
361 
362 	spin_lock_irqsave(&p_tx->lock, flags);
363 	if (p_tx->b_completing_packet) {
364 		rc = -EBUSY;
365 		goto out;
366 	}
367 
368 	new_idx = le16_to_cpu(*p_tx->p_fw_cons);
369 	num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
370 	while (num_bds) {
371 		if (list_empty(&p_tx->active_descq))
372 			goto out;
373 
374 		p_pkt = list_first_entry(&p_tx->active_descq,
375 					 struct qed_ll2_tx_packet, list_entry);
376 		if (!p_pkt)
377 			goto out;
378 
379 		p_tx->b_completing_packet = true;
380 		p_tx->cur_completing_packet = *p_pkt;
381 		num_bds_in_packet = p_pkt->bd_used;
382 		list_del(&p_pkt->list_entry);
383 
384 		if (unlikely(num_bds < num_bds_in_packet)) {
385 			DP_NOTICE(p_hwfn,
386 				  "Rest of BDs does not cover whole packet\n");
387 			goto out;
388 		}
389 
390 		num_bds -= num_bds_in_packet;
391 		p_tx->bds_idx += num_bds_in_packet;
392 		while (num_bds_in_packet--)
393 			qed_chain_consume(&p_tx->txq_chain);
394 
395 		p_tx->cur_completing_bd_idx = 1;
396 		b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
397 		list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
398 
399 		spin_unlock_irqrestore(&p_tx->lock, flags);
400 
401 		p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie,
402 					   p_ll2_conn->my_id,
403 					   p_pkt->cookie,
404 					   p_pkt->bds_set[0].tx_frag,
405 					   b_last_frag, !num_bds);
406 
407 		spin_lock_irqsave(&p_tx->lock, flags);
408 	}
409 
410 	p_tx->b_completing_packet = false;
411 	rc = 0;
412 out:
413 	spin_unlock_irqrestore(&p_tx->lock, flags);
414 	return rc;
415 }
416 
qed_ll2_rxq_parse_gsi(struct qed_hwfn * p_hwfn,union core_rx_cqe_union * p_cqe,struct qed_ll2_comp_rx_data * data)417 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn,
418 				  union core_rx_cqe_union *p_cqe,
419 				  struct qed_ll2_comp_rx_data *data)
420 {
421 	data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
422 	data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
423 	data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
424 	data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
425 	data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
426 	data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error;
427 	data->qp_id = le16_to_cpu(p_cqe->rx_cqe_gsi.qp_id);
428 
429 	data->src_qp = le32_to_cpu(p_cqe->rx_cqe_gsi.src_qp);
430 }
431 
qed_ll2_rxq_parse_reg(struct qed_hwfn * p_hwfn,union core_rx_cqe_union * p_cqe,struct qed_ll2_comp_rx_data * data)432 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn,
433 				  union core_rx_cqe_union *p_cqe,
434 				  struct qed_ll2_comp_rx_data *data)
435 {
436 	data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags);
437 	data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags);
438 	data->length.packet_length =
439 	    le16_to_cpu(p_cqe->rx_cqe_fp.packet_length);
440 	data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan);
441 	data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]);
442 	data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]);
443 	data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset;
444 }
445 
446 static int
qed_ll2_handle_slowpath(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn,union core_rx_cqe_union * p_cqe,unsigned long * p_lock_flags)447 qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn,
448 			struct qed_ll2_info *p_ll2_conn,
449 			union core_rx_cqe_union *p_cqe,
450 			unsigned long *p_lock_flags)
451 {
452 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
453 	struct core_rx_slow_path_cqe *sp_cqe;
454 
455 	sp_cqe = &p_cqe->rx_cqe_sp;
456 	if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) {
457 		DP_NOTICE(p_hwfn,
458 			  "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n",
459 			  sp_cqe->ramrod_cmd_id);
460 		return -EINVAL;
461 	}
462 
463 	if (!p_ll2_conn->cbs.slowpath_cb) {
464 		DP_NOTICE(p_hwfn,
465 			  "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n");
466 		return -EINVAL;
467 	}
468 
469 	spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
470 
471 	p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie,
472 				    p_ll2_conn->my_id,
473 				    le32_to_cpu(sp_cqe->opaque_data.data[0]),
474 				    le32_to_cpu(sp_cqe->opaque_data.data[1]));
475 
476 	spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
477 
478 	return 0;
479 }
480 
481 static int
qed_ll2_rxq_handle_completion(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn,union core_rx_cqe_union * p_cqe,unsigned long * p_lock_flags,bool b_last_cqe)482 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn,
483 			      struct qed_ll2_info *p_ll2_conn,
484 			      union core_rx_cqe_union *p_cqe,
485 			      unsigned long *p_lock_flags, bool b_last_cqe)
486 {
487 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
488 	struct qed_ll2_rx_packet *p_pkt = NULL;
489 	struct qed_ll2_comp_rx_data data;
490 
491 	if (!list_empty(&p_rx->active_descq))
492 		p_pkt = list_first_entry(&p_rx->active_descq,
493 					 struct qed_ll2_rx_packet, list_entry);
494 	if (unlikely(!p_pkt)) {
495 		DP_NOTICE(p_hwfn,
496 			  "[%d] LL2 Rx completion but active_descq is empty\n",
497 			  p_ll2_conn->input.conn_type);
498 
499 		return -EIO;
500 	}
501 	list_del(&p_pkt->list_entry);
502 
503 	if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR)
504 		qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data);
505 	else
506 		qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data);
507 	if (unlikely(qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd))
508 		DP_NOTICE(p_hwfn,
509 			  "Mismatch between active_descq and the LL2 Rx chain\n");
510 
511 	list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
512 
513 	data.connection_handle = p_ll2_conn->my_id;
514 	data.cookie = p_pkt->cookie;
515 	data.rx_buf_addr = p_pkt->rx_buf_addr;
516 	data.b_last_packet = b_last_cqe;
517 
518 	spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
519 	p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data);
520 
521 	spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
522 
523 	return 0;
524 }
525 
qed_ll2_rxq_completion(struct qed_hwfn * p_hwfn,void * cookie)526 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
527 {
528 	struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie;
529 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
530 	union core_rx_cqe_union *cqe = NULL;
531 	u16 cq_new_idx = 0, cq_old_idx = 0;
532 	unsigned long flags = 0;
533 	int rc = 0;
534 
535 	if (!p_ll2_conn)
536 		return rc;
537 
538 	spin_lock_irqsave(&p_rx->lock, flags);
539 
540 	if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) {
541 		spin_unlock_irqrestore(&p_rx->lock, flags);
542 		return 0;
543 	}
544 
545 	cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
546 	cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
547 
548 	while (cq_new_idx != cq_old_idx) {
549 		bool b_last_cqe = (cq_new_idx == cq_old_idx);
550 
551 		cqe =
552 		    (union core_rx_cqe_union *)
553 		    qed_chain_consume(&p_rx->rcq_chain);
554 		cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
555 
556 		DP_VERBOSE(p_hwfn,
557 			   QED_MSG_LL2,
558 			   "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
559 			   cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
560 
561 		switch (cqe->rx_cqe_sp.type) {
562 		case CORE_RX_CQE_TYPE_SLOW_PATH:
563 			rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn,
564 						     cqe, &flags);
565 			break;
566 		case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
567 		case CORE_RX_CQE_TYPE_REGULAR:
568 			rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn,
569 							   cqe, &flags,
570 							   b_last_cqe);
571 			break;
572 		default:
573 			rc = -EIO;
574 		}
575 	}
576 
577 	spin_unlock_irqrestore(&p_rx->lock, flags);
578 	return rc;
579 }
580 
qed_ll2_rxq_flush(struct qed_hwfn * p_hwfn,u8 connection_handle)581 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
582 {
583 	struct qed_ll2_info *p_ll2_conn = NULL;
584 	struct qed_ll2_rx_packet *p_pkt = NULL;
585 	struct qed_ll2_rx_queue *p_rx;
586 	unsigned long flags = 0;
587 
588 	p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
589 	if (!p_ll2_conn)
590 		return;
591 
592 	p_rx = &p_ll2_conn->rx_queue;
593 
594 	spin_lock_irqsave(&p_rx->lock, flags);
595 	while (!list_empty(&p_rx->active_descq)) {
596 		p_pkt = list_first_entry(&p_rx->active_descq,
597 					 struct qed_ll2_rx_packet, list_entry);
598 		if (!p_pkt)
599 			break;
600 		list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
601 		spin_unlock_irqrestore(&p_rx->lock, flags);
602 
603 		if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
604 			struct qed_ooo_buffer *p_buffer;
605 
606 			p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
607 			qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
608 						p_buffer);
609 		} else {
610 			dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr;
611 			void *cookie = p_pkt->cookie;
612 			bool b_last;
613 
614 			b_last = list_empty(&p_rx->active_descq);
615 			p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie,
616 						      p_ll2_conn->my_id,
617 						      cookie,
618 						      rx_buf_addr, b_last);
619 		}
620 		spin_lock_irqsave(&p_rx->lock, flags);
621 	}
622 	spin_unlock_irqrestore(&p_rx->lock, flags);
623 }
624 
625 static bool
qed_ll2_lb_rxq_handler_slowpath(struct qed_hwfn * p_hwfn,struct core_rx_slow_path_cqe * p_cqe)626 qed_ll2_lb_rxq_handler_slowpath(struct qed_hwfn *p_hwfn,
627 				struct core_rx_slow_path_cqe *p_cqe)
628 {
629 	struct ooo_opaque *ooo_opq;
630 	u32 cid;
631 
632 	if (p_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH)
633 		return false;
634 
635 	ooo_opq = (struct ooo_opaque *)&p_cqe->opaque_data;
636 	if (ooo_opq->ooo_opcode != TCP_EVENT_DELETE_ISLES)
637 		return false;
638 
639 	/* Need to make a flush */
640 	cid = le32_to_cpu(ooo_opq->cid);
641 	qed_ooo_release_connection_isles(p_hwfn, p_hwfn->p_ooo_info, cid);
642 
643 	return true;
644 }
645 
qed_ll2_lb_rxq_handler(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)646 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
647 				  struct qed_ll2_info *p_ll2_conn)
648 {
649 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
650 	u16 packet_length = 0, parse_flags = 0, vlan = 0;
651 	struct qed_ll2_rx_packet *p_pkt = NULL;
652 	u32 num_ooo_add_to_peninsula = 0, cid;
653 	union core_rx_cqe_union *cqe = NULL;
654 	u16 cq_new_idx = 0, cq_old_idx = 0;
655 	struct qed_ooo_buffer *p_buffer;
656 	struct ooo_opaque *ooo_opq;
657 	u8 placement_offset = 0;
658 	u8 cqe_type;
659 
660 	cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
661 	cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
662 	if (cq_new_idx == cq_old_idx)
663 		return 0;
664 
665 	while (cq_new_idx != cq_old_idx) {
666 		struct core_rx_fast_path_cqe *p_cqe_fp;
667 
668 		cqe = qed_chain_consume(&p_rx->rcq_chain);
669 		cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
670 		cqe_type = cqe->rx_cqe_sp.type;
671 
672 		if (cqe_type == CORE_RX_CQE_TYPE_SLOW_PATH)
673 			if (qed_ll2_lb_rxq_handler_slowpath(p_hwfn,
674 							    &cqe->rx_cqe_sp))
675 				continue;
676 
677 		if (unlikely(cqe_type != CORE_RX_CQE_TYPE_REGULAR)) {
678 			DP_NOTICE(p_hwfn,
679 				  "Got a non-regular LB LL2 completion [type 0x%02x]\n",
680 				  cqe_type);
681 			return -EINVAL;
682 		}
683 		p_cqe_fp = &cqe->rx_cqe_fp;
684 
685 		placement_offset = p_cqe_fp->placement_offset;
686 		parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
687 		packet_length = le16_to_cpu(p_cqe_fp->packet_length);
688 		vlan = le16_to_cpu(p_cqe_fp->vlan);
689 		ooo_opq = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
690 		qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info, ooo_opq);
691 		cid = le32_to_cpu(ooo_opq->cid);
692 
693 		/* Process delete isle first */
694 		if (ooo_opq->drop_size)
695 			qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
696 					     ooo_opq->drop_isle,
697 					     ooo_opq->drop_size);
698 
699 		if (ooo_opq->ooo_opcode == TCP_EVENT_NOP)
700 			continue;
701 
702 		/* Now process create/add/join isles */
703 		if (unlikely(list_empty(&p_rx->active_descq))) {
704 			DP_NOTICE(p_hwfn,
705 				  "LL2 OOO RX chain has no submitted buffers\n"
706 				  );
707 			return -EIO;
708 		}
709 
710 		p_pkt = list_first_entry(&p_rx->active_descq,
711 					 struct qed_ll2_rx_packet, list_entry);
712 
713 		if (likely(ooo_opq->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE ||
714 			   ooo_opq->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT ||
715 			   ooo_opq->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT ||
716 			   ooo_opq->ooo_opcode == TCP_EVENT_ADD_PEN ||
717 			   ooo_opq->ooo_opcode == TCP_EVENT_JOIN)) {
718 			if (unlikely(!p_pkt)) {
719 				DP_NOTICE(p_hwfn,
720 					  "LL2 OOO RX packet is not valid\n");
721 				return -EIO;
722 			}
723 			list_del(&p_pkt->list_entry);
724 			p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
725 			p_buffer->packet_length = packet_length;
726 			p_buffer->parse_flags = parse_flags;
727 			p_buffer->vlan = vlan;
728 			p_buffer->placement_offset = placement_offset;
729 			qed_chain_consume(&p_rx->rxq_chain);
730 			list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
731 
732 			switch (ooo_opq->ooo_opcode) {
733 			case TCP_EVENT_ADD_NEW_ISLE:
734 				qed_ooo_add_new_isle(p_hwfn,
735 						     p_hwfn->p_ooo_info,
736 						     cid,
737 						     ooo_opq->ooo_isle,
738 						     p_buffer);
739 				break;
740 			case TCP_EVENT_ADD_ISLE_RIGHT:
741 				qed_ooo_add_new_buffer(p_hwfn,
742 						       p_hwfn->p_ooo_info,
743 						       cid,
744 						       ooo_opq->ooo_isle,
745 						       p_buffer,
746 						       QED_OOO_RIGHT_BUF);
747 				break;
748 			case TCP_EVENT_ADD_ISLE_LEFT:
749 				qed_ooo_add_new_buffer(p_hwfn,
750 						       p_hwfn->p_ooo_info,
751 						       cid,
752 						       ooo_opq->ooo_isle,
753 						       p_buffer,
754 						       QED_OOO_LEFT_BUF);
755 				break;
756 			case TCP_EVENT_JOIN:
757 				qed_ooo_add_new_buffer(p_hwfn,
758 						       p_hwfn->p_ooo_info,
759 						       cid,
760 						       ooo_opq->ooo_isle + 1,
761 						       p_buffer,
762 						       QED_OOO_LEFT_BUF);
763 				qed_ooo_join_isles(p_hwfn,
764 						   p_hwfn->p_ooo_info,
765 						   cid, ooo_opq->ooo_isle);
766 				break;
767 			case TCP_EVENT_ADD_PEN:
768 				num_ooo_add_to_peninsula++;
769 				qed_ooo_put_ready_buffer(p_hwfn,
770 							 p_hwfn->p_ooo_info,
771 							 p_buffer, true);
772 				break;
773 			}
774 		} else {
775 			DP_NOTICE(p_hwfn,
776 				  "Unexpected event (%d) TX OOO completion\n",
777 				  ooo_opq->ooo_opcode);
778 		}
779 	}
780 
781 	return 0;
782 }
783 
784 static void
qed_ooo_submit_tx_buffers(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)785 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
786 			  struct qed_ll2_info *p_ll2_conn)
787 {
788 	struct qed_ll2_tx_pkt_info tx_pkt;
789 	struct qed_ooo_buffer *p_buffer;
790 	u16 l4_hdr_offset_w;
791 	dma_addr_t first_frag;
792 	u8 bd_flags;
793 	int rc;
794 
795 	/* Submit Tx buffers here */
796 	while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
797 						    p_hwfn->p_ooo_info))) {
798 		l4_hdr_offset_w = 0;
799 		bd_flags = 0;
800 
801 		first_frag = p_buffer->rx_buffer_phys_addr +
802 			     p_buffer->placement_offset;
803 		SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1);
804 		SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1);
805 
806 		memset(&tx_pkt, 0, sizeof(tx_pkt));
807 		tx_pkt.num_of_bds = 1;
808 		tx_pkt.vlan = p_buffer->vlan;
809 		tx_pkt.bd_flags = bd_flags;
810 		tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w;
811 		switch (p_ll2_conn->tx_dest) {
812 		case CORE_TX_DEST_NW:
813 			tx_pkt.tx_dest = QED_LL2_TX_DEST_NW;
814 			break;
815 		case CORE_TX_DEST_LB:
816 			tx_pkt.tx_dest = QED_LL2_TX_DEST_LB;
817 			break;
818 		case CORE_TX_DEST_DROP:
819 		default:
820 			tx_pkt.tx_dest = QED_LL2_TX_DEST_DROP;
821 			break;
822 		}
823 		tx_pkt.first_frag = first_frag;
824 		tx_pkt.first_frag_len = p_buffer->packet_length;
825 		tx_pkt.cookie = p_buffer;
826 
827 		rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id,
828 					       &tx_pkt, true);
829 		if (rc) {
830 			qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
831 						 p_buffer, false);
832 			break;
833 		}
834 	}
835 }
836 
837 static void
qed_ooo_submit_rx_buffers(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)838 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
839 			  struct qed_ll2_info *p_ll2_conn)
840 {
841 	struct qed_ooo_buffer *p_buffer;
842 	int rc;
843 
844 	while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
845 						   p_hwfn->p_ooo_info))) {
846 		rc = qed_ll2_post_rx_buffer(p_hwfn,
847 					    p_ll2_conn->my_id,
848 					    p_buffer->rx_buffer_phys_addr,
849 					    0, p_buffer, true);
850 		if (rc) {
851 			qed_ooo_put_free_buffer(p_hwfn,
852 						p_hwfn->p_ooo_info, p_buffer);
853 			break;
854 		}
855 	}
856 }
857 
qed_ll2_lb_rxq_completion(struct qed_hwfn * p_hwfn,void * p_cookie)858 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
859 {
860 	struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
861 	int rc;
862 
863 	if (!p_ll2_conn)
864 		return 0;
865 
866 	if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
867 		return 0;
868 
869 	rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
870 	if (rc)
871 		return rc;
872 
873 	qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
874 	qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
875 
876 	return 0;
877 }
878 
qed_ll2_lb_txq_completion(struct qed_hwfn * p_hwfn,void * p_cookie)879 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
880 {
881 	struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
882 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
883 	struct qed_ll2_tx_packet *p_pkt = NULL;
884 	struct qed_ooo_buffer *p_buffer;
885 	bool b_dont_submit_rx = false;
886 	u16 new_idx = 0, num_bds = 0;
887 	int rc;
888 
889 	if (unlikely(!p_ll2_conn))
890 		return 0;
891 
892 	if (unlikely(!QED_LL2_TX_REGISTERED(p_ll2_conn)))
893 		return 0;
894 
895 	new_idx = le16_to_cpu(*p_tx->p_fw_cons);
896 	num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
897 
898 	if (unlikely(!num_bds))
899 		return 0;
900 
901 	while (num_bds) {
902 		if (list_empty(&p_tx->active_descq))
903 			return -EINVAL;
904 
905 		p_pkt = list_first_entry(&p_tx->active_descq,
906 					 struct qed_ll2_tx_packet, list_entry);
907 		if (unlikely(!p_pkt))
908 			return -EINVAL;
909 
910 		if (unlikely(p_pkt->bd_used != 1)) {
911 			DP_NOTICE(p_hwfn,
912 				  "Unexpectedly many BDs(%d) in TX OOO completion\n",
913 				  p_pkt->bd_used);
914 			return -EINVAL;
915 		}
916 
917 		list_del(&p_pkt->list_entry);
918 
919 		num_bds--;
920 		p_tx->bds_idx++;
921 		qed_chain_consume(&p_tx->txq_chain);
922 
923 		p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
924 		list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
925 
926 		if (b_dont_submit_rx) {
927 			qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
928 						p_buffer);
929 			continue;
930 		}
931 
932 		rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
933 					    p_buffer->rx_buffer_phys_addr, 0,
934 					    p_buffer, true);
935 		if (rc != 0) {
936 			qed_ooo_put_free_buffer(p_hwfn,
937 						p_hwfn->p_ooo_info, p_buffer);
938 			b_dont_submit_rx = true;
939 		}
940 	}
941 
942 	qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
943 
944 	return 0;
945 }
946 
qed_ll2_stop_ooo(struct qed_hwfn * p_hwfn)947 static void qed_ll2_stop_ooo(struct qed_hwfn *p_hwfn)
948 {
949 	u8 *handle = &p_hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
950 
951 	DP_VERBOSE(p_hwfn, (QED_MSG_STORAGE | QED_MSG_LL2),
952 		   "Stopping LL2 OOO queue [%02x]\n", *handle);
953 
954 	qed_ll2_terminate_connection(p_hwfn, *handle);
955 	qed_ll2_release_connection(p_hwfn, *handle);
956 	*handle = QED_LL2_UNUSED_HANDLE;
957 }
958 
qed_sp_ll2_rx_queue_start(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn,u8 action_on_error)959 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
960 				     struct qed_ll2_info *p_ll2_conn,
961 				     u8 action_on_error)
962 {
963 	enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
964 	struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
965 	struct core_rx_start_ramrod_data *p_ramrod = NULL;
966 	struct qed_spq_entry *p_ent = NULL;
967 	struct qed_sp_init_data init_data;
968 	u16 cqe_pbl_size;
969 	int rc = 0;
970 
971 	/* Get SPQ entry */
972 	memset(&init_data, 0, sizeof(init_data));
973 	init_data.cid = p_ll2_conn->cid;
974 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
975 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
976 
977 	rc = qed_sp_init_request(p_hwfn, &p_ent,
978 				 CORE_RAMROD_RX_QUEUE_START,
979 				 PROTOCOLID_CORE, &init_data);
980 	if (rc)
981 		return rc;
982 
983 	p_ramrod = &p_ent->ramrod.core_rx_queue_start;
984 	memset(p_ramrod, 0, sizeof(*p_ramrod));
985 	p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
986 	p_ramrod->sb_index = p_rx->rx_sb_index;
987 	p_ramrod->complete_event_flg = 1;
988 
989 	p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
990 	DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr);
991 	cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
992 	p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
993 	DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
994 		       qed_chain_get_pbl_phys(&p_rx->rcq_chain));
995 
996 	p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg;
997 	p_ramrod->inner_vlan_stripping_en =
998 		p_ll2_conn->input.rx_vlan_removal_en;
999 
1000 	if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
1001 	    p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE)
1002 		p_ramrod->report_outer_vlan = 1;
1003 	p_ramrod->queue_id = p_ll2_conn->queue_id;
1004 	p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0;
1005 
1006 	if (test_bit(QED_MF_LL2_NON_UNICAST, &p_hwfn->cdev->mf_bits) &&
1007 	    p_ramrod->main_func_queue && conn_type != QED_LL2_TYPE_ROCE &&
1008 	    conn_type != QED_LL2_TYPE_IWARP &&
1009 		(!QED_IS_NVMETCP_PERSONALITY(p_hwfn))) {
1010 		p_ramrod->mf_si_bcast_accept_all = 1;
1011 		p_ramrod->mf_si_mcast_accept_all = 1;
1012 	} else {
1013 		p_ramrod->mf_si_bcast_accept_all = 0;
1014 		p_ramrod->mf_si_mcast_accept_all = 0;
1015 	}
1016 
1017 	p_ramrod->action_on_error.error_type = action_on_error;
1018 	p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
1019 	p_ramrod->zero_prod_flg = 1;
1020 
1021 	return qed_spq_post(p_hwfn, p_ent, NULL);
1022 }
1023 
qed_sp_ll2_tx_queue_start(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)1024 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
1025 				     struct qed_ll2_info *p_ll2_conn)
1026 {
1027 	enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
1028 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1029 	struct core_tx_start_ramrod_data *p_ramrod = NULL;
1030 	struct qed_spq_entry *p_ent = NULL;
1031 	struct qed_sp_init_data init_data;
1032 	u16 pq_id = 0, pbl_size;
1033 	int rc = -EINVAL;
1034 
1035 	if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
1036 		return 0;
1037 
1038 	if (likely(p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO))
1039 		p_ll2_conn->tx_stats_en = 0;
1040 	else
1041 		p_ll2_conn->tx_stats_en = 1;
1042 
1043 	/* Get SPQ entry */
1044 	memset(&init_data, 0, sizeof(init_data));
1045 	init_data.cid = p_ll2_conn->cid;
1046 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1047 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1048 
1049 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1050 				 CORE_RAMROD_TX_QUEUE_START,
1051 				 PROTOCOLID_CORE, &init_data);
1052 	if (rc)
1053 		return rc;
1054 
1055 	p_ramrod = &p_ent->ramrod.core_tx_queue_start;
1056 
1057 	p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
1058 	p_ramrod->sb_index = p_tx->tx_sb_index;
1059 	p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
1060 	p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
1061 	p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
1062 
1063 	DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
1064 		       qed_chain_get_pbl_phys(&p_tx->txq_chain));
1065 	pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
1066 	p_ramrod->pbl_size = cpu_to_le16(pbl_size);
1067 
1068 	switch (p_ll2_conn->input.tx_tc) {
1069 	case PURE_LB_TC:
1070 		pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
1071 		break;
1072 	case PKT_LB_TC:
1073 		pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO);
1074 		break;
1075 	default:
1076 		pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
1077 		break;
1078 	}
1079 
1080 	p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
1081 
1082 	switch (conn_type) {
1083 	case QED_LL2_TYPE_FCOE:
1084 		p_ramrod->conn_type = PROTOCOLID_FCOE;
1085 		break;
1086 	case QED_LL2_TYPE_TCP_ULP:
1087 		p_ramrod->conn_type = PROTOCOLID_TCP_ULP;
1088 		break;
1089 	case QED_LL2_TYPE_ROCE:
1090 		p_ramrod->conn_type = PROTOCOLID_ROCE;
1091 		break;
1092 	case QED_LL2_TYPE_IWARP:
1093 		p_ramrod->conn_type = PROTOCOLID_IWARP;
1094 		break;
1095 	case QED_LL2_TYPE_OOO:
1096 		if (p_hwfn->hw_info.personality == QED_PCI_ISCSI ||
1097 		    p_hwfn->hw_info.personality == QED_PCI_NVMETCP)
1098 			p_ramrod->conn_type = PROTOCOLID_TCP_ULP;
1099 		else
1100 			p_ramrod->conn_type = PROTOCOLID_IWARP;
1101 		break;
1102 	default:
1103 		p_ramrod->conn_type = PROTOCOLID_ETH;
1104 		DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
1105 	}
1106 
1107 	p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
1108 
1109 	rc = qed_spq_post(p_hwfn, p_ent, NULL);
1110 	if (rc)
1111 		return rc;
1112 
1113 	rc = qed_db_recovery_add(p_hwfn->cdev, p_tx->doorbell_addr,
1114 				 &p_tx->db_msg, DB_REC_WIDTH_32B,
1115 				 DB_REC_KERNEL);
1116 	return rc;
1117 }
1118 
qed_sp_ll2_rx_queue_stop(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)1119 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
1120 				    struct qed_ll2_info *p_ll2_conn)
1121 {
1122 	struct core_rx_stop_ramrod_data *p_ramrod = NULL;
1123 	struct qed_spq_entry *p_ent = NULL;
1124 	struct qed_sp_init_data init_data;
1125 	int rc = -EINVAL;
1126 
1127 	/* Get SPQ entry */
1128 	memset(&init_data, 0, sizeof(init_data));
1129 	init_data.cid = p_ll2_conn->cid;
1130 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1131 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1132 
1133 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1134 				 CORE_RAMROD_RX_QUEUE_STOP,
1135 				 PROTOCOLID_CORE, &init_data);
1136 	if (rc)
1137 		return rc;
1138 
1139 	p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
1140 
1141 	p_ramrod->complete_event_flg = 1;
1142 	p_ramrod->queue_id = p_ll2_conn->queue_id;
1143 
1144 	return qed_spq_post(p_hwfn, p_ent, NULL);
1145 }
1146 
qed_sp_ll2_tx_queue_stop(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)1147 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
1148 				    struct qed_ll2_info *p_ll2_conn)
1149 {
1150 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1151 	struct qed_spq_entry *p_ent = NULL;
1152 	struct qed_sp_init_data init_data;
1153 	int rc = -EINVAL;
1154 
1155 	qed_db_recovery_del(p_hwfn->cdev, p_tx->doorbell_addr, &p_tx->db_msg);
1156 
1157 	/* Get SPQ entry */
1158 	memset(&init_data, 0, sizeof(init_data));
1159 	init_data.cid = p_ll2_conn->cid;
1160 	init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1161 	init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1162 
1163 	rc = qed_sp_init_request(p_hwfn, &p_ent,
1164 				 CORE_RAMROD_TX_QUEUE_STOP,
1165 				 PROTOCOLID_CORE, &init_data);
1166 	if (rc)
1167 		return rc;
1168 
1169 	return qed_spq_post(p_hwfn, p_ent, NULL);
1170 }
1171 
1172 static int
qed_ll2_acquire_connection_rx(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_info)1173 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
1174 			      struct qed_ll2_info *p_ll2_info)
1175 {
1176 	struct qed_chain_init_params params = {
1177 		.intended_use	= QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1178 		.cnt_type	= QED_CHAIN_CNT_TYPE_U16,
1179 		.num_elems	= p_ll2_info->input.rx_num_desc,
1180 	};
1181 	struct qed_dev *cdev = p_hwfn->cdev;
1182 	struct qed_ll2_rx_packet *p_descq;
1183 	u32 capacity;
1184 	int rc = 0;
1185 
1186 	if (!p_ll2_info->input.rx_num_desc)
1187 		goto out;
1188 
1189 	params.mode = QED_CHAIN_MODE_NEXT_PTR;
1190 	params.elem_size = sizeof(struct core_rx_bd);
1191 
1192 	rc = qed_chain_alloc(cdev, &p_ll2_info->rx_queue.rxq_chain, &params);
1193 	if (rc) {
1194 		DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
1195 		goto out;
1196 	}
1197 
1198 	capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
1199 	p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet),
1200 			  GFP_KERNEL);
1201 	if (!p_descq) {
1202 		rc = -ENOMEM;
1203 		DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
1204 		goto out;
1205 	}
1206 	p_ll2_info->rx_queue.descq_array = p_descq;
1207 
1208 	params.mode = QED_CHAIN_MODE_PBL;
1209 	params.elem_size = sizeof(struct core_rx_fast_path_cqe);
1210 
1211 	rc = qed_chain_alloc(cdev, &p_ll2_info->rx_queue.rcq_chain, &params);
1212 	if (rc) {
1213 		DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
1214 		goto out;
1215 	}
1216 
1217 	DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1218 		   "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
1219 		   p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc);
1220 
1221 out:
1222 	return rc;
1223 }
1224 
qed_ll2_acquire_connection_tx(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_info)1225 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
1226 					 struct qed_ll2_info *p_ll2_info)
1227 {
1228 	struct qed_chain_init_params params = {
1229 		.mode		= QED_CHAIN_MODE_PBL,
1230 		.intended_use	= QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1231 		.cnt_type	= QED_CHAIN_CNT_TYPE_U16,
1232 		.num_elems	= p_ll2_info->input.tx_num_desc,
1233 		.elem_size	= sizeof(struct core_tx_bd),
1234 	};
1235 	struct qed_ll2_tx_packet *p_descq;
1236 	size_t desc_size;
1237 	u32 capacity;
1238 	int rc = 0;
1239 
1240 	if (!p_ll2_info->input.tx_num_desc)
1241 		goto out;
1242 
1243 	rc = qed_chain_alloc(p_hwfn->cdev, &p_ll2_info->tx_queue.txq_chain,
1244 			     &params);
1245 	if (rc)
1246 		goto out;
1247 
1248 	capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
1249 	/* All bds_set elements are flexibily added. */
1250 	desc_size = struct_size(p_descq, bds_set,
1251 				p_ll2_info->input.tx_max_bds_per_packet);
1252 
1253 	p_descq = kcalloc(capacity, desc_size, GFP_KERNEL);
1254 	if (!p_descq) {
1255 		rc = -ENOMEM;
1256 		goto out;
1257 	}
1258 	p_ll2_info->tx_queue.descq_mem = p_descq;
1259 
1260 	DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1261 		   "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
1262 		   p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc);
1263 
1264 out:
1265 	if (rc)
1266 		DP_NOTICE(p_hwfn,
1267 			  "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
1268 			  p_ll2_info->input.tx_num_desc);
1269 	return rc;
1270 }
1271 
1272 static int
qed_ll2_acquire_connection_ooo(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_info,u16 mtu)1273 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
1274 			       struct qed_ll2_info *p_ll2_info, u16 mtu)
1275 {
1276 	struct qed_ooo_buffer *p_buf = NULL;
1277 	void *p_virt;
1278 	u16 buf_idx;
1279 	int rc = 0;
1280 
1281 	if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO)
1282 		return rc;
1283 
1284 	/* Correct number of requested OOO buffers if needed */
1285 	if (!p_ll2_info->input.rx_num_ooo_buffers) {
1286 		u16 num_desc = p_ll2_info->input.rx_num_desc;
1287 
1288 		if (!num_desc)
1289 			return -EINVAL;
1290 		p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2;
1291 	}
1292 
1293 	for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers;
1294 	     buf_idx++) {
1295 		p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL);
1296 		if (!p_buf) {
1297 			rc = -ENOMEM;
1298 			goto out;
1299 		}
1300 
1301 		p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
1302 		p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
1303 					 ETH_CACHE_LINE_SIZE - 1) &
1304 					~(ETH_CACHE_LINE_SIZE - 1);
1305 		p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1306 					    p_buf->rx_buffer_size,
1307 					    &p_buf->rx_buffer_phys_addr,
1308 					    GFP_KERNEL);
1309 		if (!p_virt) {
1310 			kfree(p_buf);
1311 			rc = -ENOMEM;
1312 			goto out;
1313 		}
1314 
1315 		p_buf->rx_buffer_virt_addr = p_virt;
1316 		qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
1317 	}
1318 
1319 	DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1320 		   "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
1321 		   p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size);
1322 
1323 out:
1324 	return rc;
1325 }
1326 
1327 static int
qed_ll2_set_cbs(struct qed_ll2_info * p_ll2_info,const struct qed_ll2_cbs * cbs)1328 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs)
1329 {
1330 	if (!cbs || (!cbs->rx_comp_cb ||
1331 		     !cbs->rx_release_cb ||
1332 		     !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie))
1333 		return -EINVAL;
1334 
1335 	p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb;
1336 	p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb;
1337 	p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb;
1338 	p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb;
1339 	p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb;
1340 	p_ll2_info->cbs.cookie = cbs->cookie;
1341 
1342 	return 0;
1343 }
1344 
_qed_ll2_calc_allowed_conns(struct qed_hwfn * p_hwfn,struct qed_ll2_acquire_data * data,u8 * start_idx,u8 * last_idx)1345 static void _qed_ll2_calc_allowed_conns(struct qed_hwfn *p_hwfn,
1346 					struct qed_ll2_acquire_data *data,
1347 					u8 *start_idx, u8 *last_idx)
1348 {
1349 	/* LL2 queues handles will be split as follows:
1350 	 * First will be the legacy queues, and then the ctx based.
1351 	 */
1352 	if (data->input.rx_conn_type == QED_LL2_RX_TYPE_LEGACY) {
1353 		*start_idx = QED_LL2_LEGACY_CONN_BASE_PF;
1354 		*last_idx = *start_idx +
1355 			QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF;
1356 	} else {
1357 		/* QED_LL2_RX_TYPE_CTX */
1358 		*start_idx = QED_LL2_CTX_CONN_BASE_PF;
1359 		*last_idx = *start_idx +
1360 			QED_MAX_NUM_OF_CTX_LL2_CONNS_PF;
1361 	}
1362 }
1363 
1364 static enum core_error_handle
qed_ll2_get_error_choice(enum qed_ll2_error_handle err)1365 qed_ll2_get_error_choice(enum qed_ll2_error_handle err)
1366 {
1367 	switch (err) {
1368 	case QED_LL2_DROP_PACKET:
1369 		return LL2_DROP_PACKET;
1370 	case QED_LL2_DO_NOTHING:
1371 		return LL2_DO_NOTHING;
1372 	case QED_LL2_ASSERT:
1373 		return LL2_ASSERT;
1374 	default:
1375 		return LL2_DO_NOTHING;
1376 	}
1377 }
1378 
qed_ll2_acquire_connection(void * cxt,struct qed_ll2_acquire_data * data)1379 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data)
1380 {
1381 	struct qed_hwfn *p_hwfn = cxt;
1382 	qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
1383 	struct qed_ll2_info *p_ll2_info = NULL;
1384 	u8 i, first_idx, last_idx, *p_tx_max;
1385 	int rc;
1386 
1387 	if (!data->p_connection_handle || !p_hwfn->p_ll2_info)
1388 		return -EINVAL;
1389 
1390 	_qed_ll2_calc_allowed_conns(p_hwfn, data, &first_idx, &last_idx);
1391 
1392 	/* Find a free connection to be used */
1393 	for (i = first_idx; i < last_idx; i++) {
1394 		mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
1395 		if (p_hwfn->p_ll2_info[i].b_active) {
1396 			mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1397 			continue;
1398 		}
1399 
1400 		p_hwfn->p_ll2_info[i].b_active = true;
1401 		p_ll2_info = &p_hwfn->p_ll2_info[i];
1402 		mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1403 		break;
1404 	}
1405 	if (!p_ll2_info)
1406 		return -EBUSY;
1407 
1408 	memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input));
1409 
1410 	switch (data->input.tx_dest) {
1411 	case QED_LL2_TX_DEST_NW:
1412 		p_ll2_info->tx_dest = CORE_TX_DEST_NW;
1413 		break;
1414 	case QED_LL2_TX_DEST_LB:
1415 		p_ll2_info->tx_dest = CORE_TX_DEST_LB;
1416 		break;
1417 	case QED_LL2_TX_DEST_DROP:
1418 		p_ll2_info->tx_dest = CORE_TX_DEST_DROP;
1419 		break;
1420 	default:
1421 		return -EINVAL;
1422 	}
1423 
1424 	if (data->input.conn_type == QED_LL2_TYPE_OOO ||
1425 	    data->input.secondary_queue)
1426 		p_ll2_info->main_func_queue = false;
1427 	else
1428 		p_ll2_info->main_func_queue = true;
1429 
1430 	/* Correct maximum number of Tx BDs */
1431 	p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet;
1432 	if (*p_tx_max == 0)
1433 		*p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET;
1434 	else
1435 		*p_tx_max = min_t(u8, *p_tx_max,
1436 				  CORE_LL2_TX_MAX_BDS_PER_PACKET);
1437 
1438 	rc = qed_ll2_set_cbs(p_ll2_info, data->cbs);
1439 	if (rc) {
1440 		DP_NOTICE(p_hwfn, "Invalid callback functions\n");
1441 		goto q_allocate_fail;
1442 	}
1443 
1444 	rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info);
1445 	if (rc)
1446 		goto q_allocate_fail;
1447 
1448 	rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info);
1449 	if (rc)
1450 		goto q_allocate_fail;
1451 
1452 	rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
1453 					    data->input.mtu);
1454 	if (rc)
1455 		goto q_allocate_fail;
1456 
1457 	/* Register callbacks for the Rx/Tx queues */
1458 	if (data->input.conn_type == QED_LL2_TYPE_OOO) {
1459 		comp_rx_cb = qed_ll2_lb_rxq_completion;
1460 		comp_tx_cb = qed_ll2_lb_txq_completion;
1461 	} else {
1462 		comp_rx_cb = qed_ll2_rxq_completion;
1463 		comp_tx_cb = qed_ll2_txq_completion;
1464 	}
1465 
1466 	if (data->input.rx_num_desc) {
1467 		qed_int_register_cb(p_hwfn, comp_rx_cb,
1468 				    &p_hwfn->p_ll2_info[i],
1469 				    &p_ll2_info->rx_queue.rx_sb_index,
1470 				    &p_ll2_info->rx_queue.p_fw_cons);
1471 		p_ll2_info->rx_queue.b_cb_registered = true;
1472 	}
1473 
1474 	if (data->input.tx_num_desc) {
1475 		qed_int_register_cb(p_hwfn,
1476 				    comp_tx_cb,
1477 				    &p_hwfn->p_ll2_info[i],
1478 				    &p_ll2_info->tx_queue.tx_sb_index,
1479 				    &p_ll2_info->tx_queue.p_fw_cons);
1480 		p_ll2_info->tx_queue.b_cb_registered = true;
1481 	}
1482 
1483 	*data->p_connection_handle = i;
1484 	return rc;
1485 
1486 q_allocate_fail:
1487 	qed_ll2_release_connection(p_hwfn, i);
1488 	return -ENOMEM;
1489 }
1490 
qed_ll2_establish_connection_rx(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)1491 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
1492 					   struct qed_ll2_info *p_ll2_conn)
1493 {
1494 	enum qed_ll2_error_handle error_input;
1495 	enum core_error_handle error_mode;
1496 	u8 action_on_error = 0;
1497 	int rc;
1498 
1499 	if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
1500 		return 0;
1501 
1502 	DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
1503 	error_input = p_ll2_conn->input.ai_err_packet_too_big;
1504 	error_mode = qed_ll2_get_error_choice(error_input);
1505 	SET_FIELD(action_on_error,
1506 		  CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode);
1507 	error_input = p_ll2_conn->input.ai_err_no_buf;
1508 	error_mode = qed_ll2_get_error_choice(error_input);
1509 	SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode);
1510 
1511 	rc = qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
1512 	if (rc)
1513 		return rc;
1514 
1515 	if (p_ll2_conn->rx_queue.ctx_based) {
1516 		rc = qed_db_recovery_add(p_hwfn->cdev,
1517 					 p_ll2_conn->rx_queue.set_prod_addr,
1518 					 &p_ll2_conn->rx_queue.db_data,
1519 					 DB_REC_WIDTH_64B, DB_REC_KERNEL);
1520 	}
1521 
1522 	return rc;
1523 }
1524 
1525 static void
qed_ll2_establish_connection_ooo(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)1526 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
1527 				 struct qed_ll2_info *p_ll2_conn)
1528 {
1529 	if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
1530 		return;
1531 
1532 	qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1533 	qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
1534 }
1535 
qed_ll2_handle_to_queue_id(struct qed_hwfn * p_hwfn,u8 handle,u8 ll2_queue_type)1536 static inline u8 qed_ll2_handle_to_queue_id(struct qed_hwfn *p_hwfn,
1537 					    u8 handle,
1538 					    u8 ll2_queue_type)
1539 {
1540 	u8 qid;
1541 
1542 	if (ll2_queue_type == QED_LL2_RX_TYPE_LEGACY)
1543 		return p_hwfn->hw_info.resc_start[QED_LL2_RAM_QUEUE] + handle;
1544 
1545 	/* QED_LL2_RX_TYPE_CTX
1546 	 * FW distinguishes between the legacy queues (ram based) and the
1547 	 * ctx based queues by the queue_id.
1548 	 * The first MAX_NUM_LL2_RX_RAM_QUEUES queues are legacy
1549 	 * and the queue ids above that are ctx base.
1550 	 */
1551 	qid = p_hwfn->hw_info.resc_start[QED_LL2_CTX_QUEUE] +
1552 	      MAX_NUM_LL2_RX_RAM_QUEUES;
1553 
1554 	/* See comment on the acquire connection for how the ll2
1555 	 * queues handles are divided.
1556 	 */
1557 	qid += (handle - QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF);
1558 
1559 	return qid;
1560 }
1561 
qed_ll2_establish_connection(void * cxt,u8 connection_handle)1562 int qed_ll2_establish_connection(void *cxt, u8 connection_handle)
1563 {
1564 	struct core_conn_context *p_cxt;
1565 	struct qed_ll2_tx_packet *p_pkt;
1566 	struct qed_ll2_info *p_ll2_conn;
1567 	struct qed_hwfn *p_hwfn = cxt;
1568 	struct qed_ll2_rx_queue *p_rx;
1569 	struct qed_ll2_tx_queue *p_tx;
1570 	struct qed_cxt_info cxt_info;
1571 	struct qed_ptt *p_ptt;
1572 	int rc = -EINVAL;
1573 	u32 i, capacity;
1574 	size_t desc_size;
1575 	u8 qid, stats_id;
1576 
1577 	p_ptt = qed_ptt_acquire(p_hwfn);
1578 	if (!p_ptt)
1579 		return -EAGAIN;
1580 
1581 	p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
1582 	if (!p_ll2_conn) {
1583 		rc = -EINVAL;
1584 		goto out;
1585 	}
1586 
1587 	p_rx = &p_ll2_conn->rx_queue;
1588 	p_tx = &p_ll2_conn->tx_queue;
1589 
1590 	qed_chain_reset(&p_rx->rxq_chain);
1591 	qed_chain_reset(&p_rx->rcq_chain);
1592 	INIT_LIST_HEAD(&p_rx->active_descq);
1593 	INIT_LIST_HEAD(&p_rx->free_descq);
1594 	INIT_LIST_HEAD(&p_rx->posting_descq);
1595 	spin_lock_init(&p_rx->lock);
1596 	capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
1597 	for (i = 0; i < capacity; i++)
1598 		list_add_tail(&p_rx->descq_array[i].list_entry,
1599 			      &p_rx->free_descq);
1600 	*p_rx->p_fw_cons = 0;
1601 
1602 	qed_chain_reset(&p_tx->txq_chain);
1603 	INIT_LIST_HEAD(&p_tx->active_descq);
1604 	INIT_LIST_HEAD(&p_tx->free_descq);
1605 	INIT_LIST_HEAD(&p_tx->sending_descq);
1606 	spin_lock_init(&p_tx->lock);
1607 	capacity = qed_chain_get_capacity(&p_tx->txq_chain);
1608 	/* All bds_set elements are flexibily added. */
1609 	desc_size = struct_size(p_pkt, bds_set,
1610 				p_ll2_conn->input.tx_max_bds_per_packet);
1611 
1612 	for (i = 0; i < capacity; i++) {
1613 		p_pkt = p_tx->descq_mem + desc_size * i;
1614 		list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
1615 	}
1616 	p_tx->cur_completing_bd_idx = 0;
1617 	p_tx->bds_idx = 0;
1618 	p_tx->b_completing_packet = false;
1619 	p_tx->cur_send_packet = NULL;
1620 	p_tx->cur_send_frag_num = 0;
1621 	p_tx->cur_completing_frag_num = 0;
1622 	*p_tx->p_fw_cons = 0;
1623 
1624 	rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
1625 	if (rc)
1626 		goto out;
1627 	cxt_info.iid = p_ll2_conn->cid;
1628 	rc = qed_cxt_get_cid_info(p_hwfn, &cxt_info);
1629 	if (rc) {
1630 		DP_NOTICE(p_hwfn, "Cannot find context info for cid=%d\n",
1631 			  p_ll2_conn->cid);
1632 		goto out;
1633 	}
1634 
1635 	p_cxt = cxt_info.p_cxt;
1636 
1637 	memset(p_cxt, 0, sizeof(*p_cxt));
1638 
1639 	qid = qed_ll2_handle_to_queue_id(p_hwfn, connection_handle,
1640 					 p_ll2_conn->input.rx_conn_type);
1641 	stats_id = qed_ll2_handle_to_stats_id(p_hwfn,
1642 					      p_ll2_conn->input.rx_conn_type,
1643 					      qid);
1644 	p_ll2_conn->queue_id = qid;
1645 	p_ll2_conn->tx_stats_id = stats_id;
1646 
1647 	/* If there is no valid stats id for this connection, disable stats */
1648 	if (p_ll2_conn->tx_stats_id == QED_LL2_INVALID_STATS_ID) {
1649 		p_ll2_conn->tx_stats_en = 0;
1650 		DP_VERBOSE(p_hwfn,
1651 			   QED_MSG_LL2,
1652 			   "Disabling stats for queue %d - not enough counters\n",
1653 			   qid);
1654 	}
1655 
1656 	DP_VERBOSE(p_hwfn,
1657 		   QED_MSG_LL2,
1658 		   "Establishing ll2 queue. PF %d ctx_based=%d abs qid=%d stats_id=%d\n",
1659 		   p_hwfn->rel_pf_id,
1660 		   p_ll2_conn->input.rx_conn_type, qid, stats_id);
1661 
1662 	if (p_ll2_conn->input.rx_conn_type == QED_LL2_RX_TYPE_LEGACY) {
1663 		p_rx->set_prod_addr =
1664 		    (u8 __iomem *)p_hwfn->regview +
1665 		    GET_GTT_REG_ADDR(GTT_BAR0_MAP_REG_TSDM_RAM,
1666 				     TSTORM_LL2_RX_PRODS, qid);
1667 	} else {
1668 		/* QED_LL2_RX_TYPE_CTX - using doorbell */
1669 		p_rx->ctx_based = 1;
1670 
1671 		p_rx->set_prod_addr = p_hwfn->doorbells +
1672 			p_hwfn->dpi_start_offset +
1673 			DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_LL2_PROD_UPDATE);
1674 
1675 		/* prepare db data */
1676 		p_rx->db_data.icid = cpu_to_le16((u16)p_ll2_conn->cid);
1677 		SET_FIELD(p_rx->db_data.params,
1678 			  CORE_PWM_PROD_UPDATE_DATA_AGG_CMD, DB_AGG_CMD_SET);
1679 		SET_FIELD(p_rx->db_data.params,
1680 			  CORE_PWM_PROD_UPDATE_DATA_RESERVED1, 0);
1681 	}
1682 
1683 	p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
1684 					    qed_db_addr(p_ll2_conn->cid,
1685 							DQ_DEMS_LEGACY);
1686 	/* prepare db data */
1687 	SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
1688 	SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
1689 	SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
1690 		  DQ_XCM_CORE_TX_BD_PROD_CMD);
1691 	p_tx->db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
1692 
1693 	rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
1694 	if (rc)
1695 		goto out;
1696 
1697 	rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
1698 	if (rc)
1699 		goto out;
1700 
1701 	if (!QED_IS_RDMA_PERSONALITY(p_hwfn) &&
1702 	    !QED_IS_NVMETCP_PERSONALITY(p_hwfn))
1703 		qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);
1704 
1705 	qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
1706 
1707 	if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
1708 		if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
1709 			qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
1710 						    QED_LLH_FILTER_ETHERTYPE,
1711 						    ETH_P_FCOE, 0);
1712 		qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
1713 					    QED_LLH_FILTER_ETHERTYPE,
1714 					    ETH_P_FIP, 0);
1715 	}
1716 
1717 out:
1718 	qed_ptt_release(p_hwfn, p_ptt);
1719 	return rc;
1720 }
1721 
qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn * p_hwfn,struct qed_ll2_rx_queue * p_rx,struct qed_ll2_rx_packet * p_curp)1722 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
1723 					     struct qed_ll2_rx_queue *p_rx,
1724 					     struct qed_ll2_rx_packet *p_curp)
1725 {
1726 	struct qed_ll2_rx_packet *p_posting_packet = NULL;
1727 	struct core_ll2_rx_prod rx_prod = { 0, 0 };
1728 	bool b_notify_fw = false;
1729 	u16 bd_prod, cq_prod;
1730 
1731 	/* This handles the flushing of already posted buffers */
1732 	while (!list_empty(&p_rx->posting_descq)) {
1733 		p_posting_packet = list_first_entry(&p_rx->posting_descq,
1734 						    struct qed_ll2_rx_packet,
1735 						    list_entry);
1736 		list_move_tail(&p_posting_packet->list_entry,
1737 			       &p_rx->active_descq);
1738 		b_notify_fw = true;
1739 	}
1740 
1741 	/* This handles the supplied packet [if there is one] */
1742 	if (p_curp) {
1743 		list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
1744 		b_notify_fw = true;
1745 	}
1746 
1747 	if (!b_notify_fw)
1748 		return;
1749 
1750 	bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
1751 	cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
1752 	if (p_rx->ctx_based) {
1753 		/* update producer by giving a doorbell */
1754 		p_rx->db_data.prod.bd_prod = cpu_to_le16(bd_prod);
1755 		p_rx->db_data.prod.cqe_prod = cpu_to_le16(cq_prod);
1756 		/* Make sure chain element is updated before ringing the
1757 		 * doorbell
1758 		 */
1759 		dma_wmb();
1760 		DIRECT_REG_WR64(p_rx->set_prod_addr,
1761 				*((u64 *)&p_rx->db_data));
1762 	} else {
1763 		rx_prod.bd_prod = cpu_to_le16(bd_prod);
1764 		rx_prod.cqe_prod = cpu_to_le16(cq_prod);
1765 
1766 		/* Make sure chain element is updated before ringing the
1767 		 * doorbell
1768 		 */
1769 		dma_wmb();
1770 
1771 		DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
1772 	}
1773 }
1774 
qed_ll2_post_rx_buffer(void * cxt,u8 connection_handle,dma_addr_t addr,u16 buf_len,void * cookie,u8 notify_fw)1775 int qed_ll2_post_rx_buffer(void *cxt,
1776 			   u8 connection_handle,
1777 			   dma_addr_t addr,
1778 			   u16 buf_len, void *cookie, u8 notify_fw)
1779 {
1780 	struct qed_hwfn *p_hwfn = cxt;
1781 	struct core_rx_bd_with_buff_len *p_curb = NULL;
1782 	struct qed_ll2_rx_packet *p_curp = NULL;
1783 	struct qed_ll2_info *p_ll2_conn;
1784 	struct qed_ll2_rx_queue *p_rx;
1785 	unsigned long flags;
1786 	void *p_data;
1787 	int rc = 0;
1788 
1789 	p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1790 	if (!p_ll2_conn)
1791 		return -EINVAL;
1792 	p_rx = &p_ll2_conn->rx_queue;
1793 	if (!p_rx->set_prod_addr)
1794 		return -EIO;
1795 
1796 	spin_lock_irqsave(&p_rx->lock, flags);
1797 	if (!list_empty(&p_rx->free_descq))
1798 		p_curp = list_first_entry(&p_rx->free_descq,
1799 					  struct qed_ll2_rx_packet, list_entry);
1800 	if (p_curp) {
1801 		if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
1802 		    qed_chain_get_elem_left(&p_rx->rcq_chain)) {
1803 			p_data = qed_chain_produce(&p_rx->rxq_chain);
1804 			p_curb = (struct core_rx_bd_with_buff_len *)p_data;
1805 			qed_chain_produce(&p_rx->rcq_chain);
1806 		}
1807 	}
1808 
1809 	/* If we're lacking entries, let's try to flush buffers to FW */
1810 	if (!p_curp || !p_curb) {
1811 		rc = -EBUSY;
1812 		p_curp = NULL;
1813 		goto out_notify;
1814 	}
1815 
1816 	/* We have an Rx packet we can fill */
1817 	DMA_REGPAIR_LE(p_curb->addr, addr);
1818 	p_curb->buff_length = cpu_to_le16(buf_len);
1819 	p_curp->rx_buf_addr = addr;
1820 	p_curp->cookie = cookie;
1821 	p_curp->rxq_bd = p_curb;
1822 	p_curp->buf_length = buf_len;
1823 	list_del(&p_curp->list_entry);
1824 
1825 	/* Check if we only want to enqueue this packet without informing FW */
1826 	if (!notify_fw) {
1827 		list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
1828 		goto out;
1829 	}
1830 
1831 out_notify:
1832 	qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
1833 out:
1834 	spin_unlock_irqrestore(&p_rx->lock, flags);
1835 	return rc;
1836 }
1837 
qed_ll2_prepare_tx_packet_set(struct qed_hwfn * p_hwfn,struct qed_ll2_tx_queue * p_tx,struct qed_ll2_tx_packet * p_curp,struct qed_ll2_tx_pkt_info * pkt,u8 notify_fw)1838 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
1839 					  struct qed_ll2_tx_queue *p_tx,
1840 					  struct qed_ll2_tx_packet *p_curp,
1841 					  struct qed_ll2_tx_pkt_info *pkt,
1842 					  u8 notify_fw)
1843 {
1844 	list_del(&p_curp->list_entry);
1845 	p_curp->cookie = pkt->cookie;
1846 	p_curp->bd_used = pkt->num_of_bds;
1847 	p_curp->notify_fw = notify_fw;
1848 	p_tx->cur_send_packet = p_curp;
1849 	p_tx->cur_send_frag_num = 0;
1850 
1851 	p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag;
1852 	p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len;
1853 	p_tx->cur_send_frag_num++;
1854 }
1855 
1856 static void
qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2,struct qed_ll2_tx_packet * p_curp,struct qed_ll2_tx_pkt_info * pkt)1857 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
1858 				 struct qed_ll2_info *p_ll2,
1859 				 struct qed_ll2_tx_packet *p_curp,
1860 				 struct qed_ll2_tx_pkt_info *pkt)
1861 {
1862 	struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
1863 	u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
1864 	struct core_tx_bd *start_bd = NULL;
1865 	enum core_roce_flavor_type roce_flavor;
1866 	enum core_tx_dest tx_dest;
1867 	u16 bd_data = 0, frag_idx;
1868 	u16 bitfield1;
1869 
1870 	roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE
1871 							     : CORE_RROCE;
1872 
1873 	switch (pkt->tx_dest) {
1874 	case QED_LL2_TX_DEST_NW:
1875 		tx_dest = CORE_TX_DEST_NW;
1876 		break;
1877 	case QED_LL2_TX_DEST_LB:
1878 		tx_dest = CORE_TX_DEST_LB;
1879 		break;
1880 	case QED_LL2_TX_DEST_DROP:
1881 		tx_dest = CORE_TX_DEST_DROP;
1882 		break;
1883 	default:
1884 		tx_dest = CORE_TX_DEST_LB;
1885 		break;
1886 	}
1887 
1888 	start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1889 	if (likely(QED_IS_IWARP_PERSONALITY(p_hwfn) &&
1890 		   p_ll2->input.conn_type == QED_LL2_TYPE_OOO)) {
1891 		start_bd->nw_vlan_or_lb_echo =
1892 		    cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE);
1893 	} else {
1894 		start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan);
1895 		if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
1896 		    p_ll2->input.conn_type == QED_LL2_TYPE_FCOE)
1897 			pkt->remove_stag = true;
1898 	}
1899 
1900 	bitfield1 = le16_to_cpu(start_bd->bitfield1);
1901 	SET_FIELD(bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, pkt->l4_hdr_offset_w);
1902 	SET_FIELD(bitfield1, CORE_TX_BD_TX_DST, tx_dest);
1903 	start_bd->bitfield1 = cpu_to_le16(bitfield1);
1904 
1905 	bd_data |= pkt->bd_flags;
1906 	SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1);
1907 	SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds);
1908 	SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor);
1909 	SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum));
1910 	SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum));
1911 	SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len));
1912 	SET_FIELD(bd_data, CORE_TX_BD_DATA_DISABLE_STAG_INSERTION,
1913 		  !!(pkt->remove_stag));
1914 
1915 	start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data);
1916 	DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag);
1917 	start_bd->nbytes = cpu_to_le16(pkt->first_frag_len);
1918 
1919 	DP_VERBOSE(p_hwfn,
1920 		   (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1921 		   "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
1922 		   p_ll2->queue_id,
1923 		   p_ll2->cid,
1924 		   p_ll2->input.conn_type,
1925 		   prod_idx,
1926 		   pkt->first_frag_len,
1927 		   pkt->num_of_bds,
1928 		   le32_to_cpu(start_bd->addr.hi),
1929 		   le32_to_cpu(start_bd->addr.lo));
1930 
1931 	if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds)
1932 		return;
1933 
1934 	/* Need to provide the packet with additional BDs for frags */
1935 	for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
1936 	     frag_idx < pkt->num_of_bds; frag_idx++) {
1937 		struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
1938 
1939 		*p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1940 		(*p_bd)->bd_data.as_bitfield = 0;
1941 		(*p_bd)->bitfield1 = 0;
1942 		p_curp->bds_set[frag_idx].tx_frag = 0;
1943 		p_curp->bds_set[frag_idx].frag_len = 0;
1944 	}
1945 }
1946 
1947 /* This should be called while the Txq spinlock is being held */
qed_ll2_tx_packet_notify(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)1948 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
1949 				     struct qed_ll2_info *p_ll2_conn)
1950 {
1951 	bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
1952 	struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1953 	struct qed_ll2_tx_packet *p_pkt = NULL;
1954 	u16 bd_prod;
1955 
1956 	/* If there are missing BDs, don't do anything now */
1957 	if (p_ll2_conn->tx_queue.cur_send_frag_num !=
1958 	    p_ll2_conn->tx_queue.cur_send_packet->bd_used)
1959 		return;
1960 
1961 	/* Push the current packet to the list and clean after it */
1962 	list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
1963 		      &p_ll2_conn->tx_queue.sending_descq);
1964 	p_ll2_conn->tx_queue.cur_send_packet = NULL;
1965 	p_ll2_conn->tx_queue.cur_send_frag_num = 0;
1966 
1967 	/* Notify FW of packet only if requested to */
1968 	if (!b_notify)
1969 		return;
1970 
1971 	bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
1972 
1973 	while (!list_empty(&p_tx->sending_descq)) {
1974 		p_pkt = list_first_entry(&p_tx->sending_descq,
1975 					 struct qed_ll2_tx_packet, list_entry);
1976 		if (!p_pkt)
1977 			break;
1978 
1979 		list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
1980 	}
1981 
1982 	p_tx->db_msg.spq_prod = cpu_to_le16(bd_prod);
1983 
1984 	/* Make sure the BDs data is updated before ringing the doorbell */
1985 	wmb();
1986 
1987 	DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&p_tx->db_msg));
1988 
1989 	DP_VERBOSE(p_hwfn,
1990 		   (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1991 		   "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
1992 		   p_ll2_conn->queue_id,
1993 		   p_ll2_conn->cid,
1994 		   p_ll2_conn->input.conn_type, p_tx->db_msg.spq_prod);
1995 }
1996 
qed_ll2_prepare_tx_packet(void * cxt,u8 connection_handle,struct qed_ll2_tx_pkt_info * pkt,bool notify_fw)1997 int qed_ll2_prepare_tx_packet(void *cxt,
1998 			      u8 connection_handle,
1999 			      struct qed_ll2_tx_pkt_info *pkt,
2000 			      bool notify_fw)
2001 {
2002 	struct qed_hwfn *p_hwfn = cxt;
2003 	struct qed_ll2_tx_packet *p_curp = NULL;
2004 	struct qed_ll2_info *p_ll2_conn = NULL;
2005 	struct qed_ll2_tx_queue *p_tx;
2006 	struct qed_chain *p_tx_chain;
2007 	unsigned long flags;
2008 	int rc = 0;
2009 
2010 	p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2011 	if (unlikely(!p_ll2_conn))
2012 		return -EINVAL;
2013 	p_tx = &p_ll2_conn->tx_queue;
2014 	p_tx_chain = &p_tx->txq_chain;
2015 
2016 	if (unlikely(pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet))
2017 		return -EIO;
2018 
2019 	spin_lock_irqsave(&p_tx->lock, flags);
2020 	if (unlikely(p_tx->cur_send_packet)) {
2021 		rc = -EEXIST;
2022 		goto out;
2023 	}
2024 
2025 	/* Get entry, but only if we have tx elements for it */
2026 	if (unlikely(!list_empty(&p_tx->free_descq)))
2027 		p_curp = list_first_entry(&p_tx->free_descq,
2028 					  struct qed_ll2_tx_packet, list_entry);
2029 	if (unlikely(p_curp &&
2030 		     qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds))
2031 		p_curp = NULL;
2032 
2033 	if (unlikely(!p_curp)) {
2034 		rc = -EBUSY;
2035 		goto out;
2036 	}
2037 
2038 	/* Prepare packet and BD, and perhaps send a doorbell to FW */
2039 	qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw);
2040 
2041 	qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt);
2042 
2043 	qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
2044 
2045 out:
2046 	spin_unlock_irqrestore(&p_tx->lock, flags);
2047 	return rc;
2048 }
2049 
qed_ll2_set_fragment_of_tx_packet(void * cxt,u8 connection_handle,dma_addr_t addr,u16 nbytes)2050 int qed_ll2_set_fragment_of_tx_packet(void *cxt,
2051 				      u8 connection_handle,
2052 				      dma_addr_t addr, u16 nbytes)
2053 {
2054 	struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
2055 	struct qed_hwfn *p_hwfn = cxt;
2056 	struct qed_ll2_info *p_ll2_conn = NULL;
2057 	u16 cur_send_frag_num = 0;
2058 	struct core_tx_bd *p_bd;
2059 	unsigned long flags;
2060 
2061 	p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2062 	if (unlikely(!p_ll2_conn))
2063 		return -EINVAL;
2064 
2065 	if (unlikely(!p_ll2_conn->tx_queue.cur_send_packet))
2066 		return -EINVAL;
2067 
2068 	p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
2069 	cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
2070 
2071 	if (unlikely(cur_send_frag_num >= p_cur_send_packet->bd_used))
2072 		return -EINVAL;
2073 
2074 	/* Fill the BD information, and possibly notify FW */
2075 	p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
2076 	DMA_REGPAIR_LE(p_bd->addr, addr);
2077 	p_bd->nbytes = cpu_to_le16(nbytes);
2078 	p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
2079 	p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
2080 
2081 	p_ll2_conn->tx_queue.cur_send_frag_num++;
2082 
2083 	spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
2084 	qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
2085 	spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
2086 
2087 	return 0;
2088 }
2089 
qed_ll2_terminate_connection(void * cxt,u8 connection_handle)2090 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle)
2091 {
2092 	struct qed_hwfn *p_hwfn = cxt;
2093 	struct qed_ll2_info *p_ll2_conn = NULL;
2094 	int rc = -EINVAL;
2095 	struct qed_ptt *p_ptt;
2096 
2097 	p_ptt = qed_ptt_acquire(p_hwfn);
2098 	if (!p_ptt)
2099 		return -EAGAIN;
2100 
2101 	p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
2102 	if (!p_ll2_conn) {
2103 		rc = -EINVAL;
2104 		goto out;
2105 	}
2106 
2107 	/* Stop Tx & Rx of connection, if needed */
2108 	if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
2109 		p_ll2_conn->tx_queue.b_cb_registered = false;
2110 		smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
2111 		rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
2112 		if (rc)
2113 			goto out;
2114 
2115 		qed_ll2_txq_flush(p_hwfn, connection_handle);
2116 		qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
2117 	}
2118 
2119 	if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
2120 		p_ll2_conn->rx_queue.b_cb_registered = false;
2121 		smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
2122 
2123 		if (p_ll2_conn->rx_queue.ctx_based)
2124 			qed_db_recovery_del(p_hwfn->cdev,
2125 					    p_ll2_conn->rx_queue.set_prod_addr,
2126 					    &p_ll2_conn->rx_queue.db_data);
2127 
2128 		rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
2129 		if (rc)
2130 			goto out;
2131 
2132 		qed_ll2_rxq_flush(p_hwfn, connection_handle);
2133 		qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
2134 	}
2135 
2136 	if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
2137 		qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
2138 
2139 	if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
2140 		if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
2141 			qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
2142 						       QED_LLH_FILTER_ETHERTYPE,
2143 						       ETH_P_FCOE, 0);
2144 		qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
2145 					       QED_LLH_FILTER_ETHERTYPE,
2146 					       ETH_P_FIP, 0);
2147 	}
2148 
2149 out:
2150 	qed_ptt_release(p_hwfn, p_ptt);
2151 	return rc;
2152 }
2153 
qed_ll2_release_connection_ooo(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)2154 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
2155 					   struct qed_ll2_info *p_ll2_conn)
2156 {
2157 	struct qed_ooo_buffer *p_buffer;
2158 
2159 	if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
2160 		return;
2161 
2162 	qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
2163 	while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
2164 						   p_hwfn->p_ooo_info))) {
2165 		dma_free_coherent(&p_hwfn->cdev->pdev->dev,
2166 				  p_buffer->rx_buffer_size,
2167 				  p_buffer->rx_buffer_virt_addr,
2168 				  p_buffer->rx_buffer_phys_addr);
2169 		kfree(p_buffer);
2170 	}
2171 }
2172 
qed_ll2_release_connection(void * cxt,u8 connection_handle)2173 void qed_ll2_release_connection(void *cxt, u8 connection_handle)
2174 {
2175 	struct qed_hwfn *p_hwfn = cxt;
2176 	struct qed_ll2_info *p_ll2_conn = NULL;
2177 
2178 	p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2179 	if (!p_ll2_conn)
2180 		return;
2181 
2182 	kfree(p_ll2_conn->tx_queue.descq_mem);
2183 	qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
2184 
2185 	kfree(p_ll2_conn->rx_queue.descq_array);
2186 	qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
2187 	qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
2188 
2189 	qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
2190 
2191 	qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
2192 
2193 	mutex_lock(&p_ll2_conn->mutex);
2194 	p_ll2_conn->b_active = false;
2195 	mutex_unlock(&p_ll2_conn->mutex);
2196 }
2197 
qed_ll2_alloc(struct qed_hwfn * p_hwfn)2198 int qed_ll2_alloc(struct qed_hwfn *p_hwfn)
2199 {
2200 	struct qed_ll2_info *p_ll2_connections;
2201 	u8 i;
2202 
2203 	/* Allocate LL2's set struct */
2204 	p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS,
2205 				    sizeof(struct qed_ll2_info), GFP_KERNEL);
2206 	if (!p_ll2_connections) {
2207 		DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
2208 		return -ENOMEM;
2209 	}
2210 
2211 	for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2212 		p_ll2_connections[i].my_id = i;
2213 
2214 	p_hwfn->p_ll2_info = p_ll2_connections;
2215 	return 0;
2216 }
2217 
qed_ll2_setup(struct qed_hwfn * p_hwfn)2218 void qed_ll2_setup(struct qed_hwfn *p_hwfn)
2219 {
2220 	int i;
2221 
2222 	for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2223 		mutex_init(&p_hwfn->p_ll2_info[i].mutex);
2224 }
2225 
qed_ll2_free(struct qed_hwfn * p_hwfn)2226 void qed_ll2_free(struct qed_hwfn *p_hwfn)
2227 {
2228 	if (!p_hwfn->p_ll2_info)
2229 		return;
2230 
2231 	kfree(p_hwfn->p_ll2_info);
2232 	p_hwfn->p_ll2_info = NULL;
2233 }
2234 
_qed_ll2_get_port_stats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_ll2_stats * p_stats)2235 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn,
2236 				    struct qed_ptt *p_ptt,
2237 				    struct qed_ll2_stats *p_stats)
2238 {
2239 	struct core_ll2_port_stats port_stats;
2240 
2241 	memset(&port_stats, 0, sizeof(port_stats));
2242 	qed_memcpy_from(p_hwfn, p_ptt, &port_stats,
2243 			BAR0_MAP_REG_TSDM_RAM +
2244 			TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)),
2245 			sizeof(port_stats));
2246 
2247 	p_stats->gsi_invalid_hdr += HILO_64_REGPAIR(port_stats.gsi_invalid_hdr);
2248 	p_stats->gsi_invalid_pkt_length +=
2249 	    HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length);
2250 	p_stats->gsi_unsupported_pkt_typ +=
2251 	    HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ);
2252 	p_stats->gsi_crcchksm_error +=
2253 	    HILO_64_REGPAIR(port_stats.gsi_crcchksm_error);
2254 }
2255 
_qed_ll2_get_tstats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_ll2_info * p_ll2_conn,struct qed_ll2_stats * p_stats)2256 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
2257 				struct qed_ptt *p_ptt,
2258 				struct qed_ll2_info *p_ll2_conn,
2259 				struct qed_ll2_stats *p_stats)
2260 {
2261 	struct core_ll2_tstorm_per_queue_stat tstats;
2262 	u8 qid = p_ll2_conn->queue_id;
2263 	u32 tstats_addr;
2264 
2265 	memset(&tstats, 0, sizeof(tstats));
2266 	tstats_addr = BAR0_MAP_REG_TSDM_RAM +
2267 		      CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
2268 	qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
2269 
2270 	p_stats->packet_too_big_discard +=
2271 			HILO_64_REGPAIR(tstats.packet_too_big_discard);
2272 	p_stats->no_buff_discard += HILO_64_REGPAIR(tstats.no_buff_discard);
2273 }
2274 
_qed_ll2_get_ustats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_ll2_info * p_ll2_conn,struct qed_ll2_stats * p_stats)2275 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
2276 				struct qed_ptt *p_ptt,
2277 				struct qed_ll2_info *p_ll2_conn,
2278 				struct qed_ll2_stats *p_stats)
2279 {
2280 	struct core_ll2_ustorm_per_queue_stat ustats;
2281 	u8 qid = p_ll2_conn->queue_id;
2282 	u32 ustats_addr;
2283 
2284 	memset(&ustats, 0, sizeof(ustats));
2285 	ustats_addr = BAR0_MAP_REG_USDM_RAM +
2286 		      CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
2287 	qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
2288 
2289 	p_stats->rcv_ucast_bytes += HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
2290 	p_stats->rcv_mcast_bytes += HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
2291 	p_stats->rcv_bcast_bytes += HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
2292 	p_stats->rcv_ucast_pkts += HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
2293 	p_stats->rcv_mcast_pkts += HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
2294 	p_stats->rcv_bcast_pkts += HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
2295 }
2296 
_qed_ll2_get_pstats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_ll2_info * p_ll2_conn,struct qed_ll2_stats * p_stats)2297 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
2298 				struct qed_ptt *p_ptt,
2299 				struct qed_ll2_info *p_ll2_conn,
2300 				struct qed_ll2_stats *p_stats)
2301 {
2302 	struct core_ll2_pstorm_per_queue_stat pstats;
2303 	u8 stats_id = p_ll2_conn->tx_stats_id;
2304 	u32 pstats_addr;
2305 
2306 	memset(&pstats, 0, sizeof(pstats));
2307 	pstats_addr = BAR0_MAP_REG_PSDM_RAM +
2308 		      CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
2309 	qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
2310 
2311 	p_stats->sent_ucast_bytes += HILO_64_REGPAIR(pstats.sent_ucast_bytes);
2312 	p_stats->sent_mcast_bytes += HILO_64_REGPAIR(pstats.sent_mcast_bytes);
2313 	p_stats->sent_bcast_bytes += HILO_64_REGPAIR(pstats.sent_bcast_bytes);
2314 	p_stats->sent_ucast_pkts += HILO_64_REGPAIR(pstats.sent_ucast_pkts);
2315 	p_stats->sent_mcast_pkts += HILO_64_REGPAIR(pstats.sent_mcast_pkts);
2316 	p_stats->sent_bcast_pkts += HILO_64_REGPAIR(pstats.sent_bcast_pkts);
2317 }
2318 
__qed_ll2_get_stats(void * cxt,u8 connection_handle,struct qed_ll2_stats * p_stats)2319 static int __qed_ll2_get_stats(void *cxt, u8 connection_handle,
2320 			       struct qed_ll2_stats *p_stats)
2321 {
2322 	struct qed_hwfn *p_hwfn = cxt;
2323 	struct qed_ll2_info *p_ll2_conn = NULL;
2324 	struct qed_ptt *p_ptt;
2325 
2326 	if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
2327 	    !p_hwfn->p_ll2_info)
2328 		return -EINVAL;
2329 
2330 	p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
2331 
2332 	p_ptt = qed_ptt_acquire(p_hwfn);
2333 	if (!p_ptt) {
2334 		DP_ERR(p_hwfn, "Failed to acquire ptt\n");
2335 		return -EINVAL;
2336 	}
2337 
2338 	if (p_ll2_conn->input.gsi_enable)
2339 		_qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats);
2340 
2341 	_qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2342 
2343 	_qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2344 
2345 	if (p_ll2_conn->tx_stats_en)
2346 		_qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2347 
2348 	qed_ptt_release(p_hwfn, p_ptt);
2349 
2350 	return 0;
2351 }
2352 
qed_ll2_get_stats(void * cxt,u8 connection_handle,struct qed_ll2_stats * p_stats)2353 int qed_ll2_get_stats(void *cxt,
2354 		      u8 connection_handle, struct qed_ll2_stats *p_stats)
2355 {
2356 	memset(p_stats, 0, sizeof(*p_stats));
2357 	return __qed_ll2_get_stats(cxt, connection_handle, p_stats);
2358 }
2359 
qed_ll2b_release_rx_packet(void * cxt,u8 connection_handle,void * cookie,dma_addr_t rx_buf_addr,bool b_last_packet)2360 static void qed_ll2b_release_rx_packet(void *cxt,
2361 				       u8 connection_handle,
2362 				       void *cookie,
2363 				       dma_addr_t rx_buf_addr,
2364 				       bool b_last_packet)
2365 {
2366 	struct qed_hwfn *p_hwfn = cxt;
2367 
2368 	qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie);
2369 }
2370 
qed_ll2_register_cb_ops(struct qed_dev * cdev,const struct qed_ll2_cb_ops * ops,void * cookie)2371 static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
2372 				    const struct qed_ll2_cb_ops *ops,
2373 				    void *cookie)
2374 {
2375 	cdev->ll2->cbs = ops;
2376 	cdev->ll2->cb_cookie = cookie;
2377 }
2378 
2379 static struct qed_ll2_cbs ll2_cbs = {
2380 	.rx_comp_cb = &qed_ll2b_complete_rx_packet,
2381 	.rx_release_cb = &qed_ll2b_release_rx_packet,
2382 	.tx_comp_cb = &qed_ll2b_complete_tx_packet,
2383 	.tx_release_cb = &qed_ll2b_complete_tx_packet,
2384 };
2385 
qed_ll2_set_conn_data(struct qed_hwfn * p_hwfn,struct qed_ll2_acquire_data * data,struct qed_ll2_params * params,enum qed_ll2_conn_type conn_type,u8 * handle,bool lb)2386 static void qed_ll2_set_conn_data(struct qed_hwfn *p_hwfn,
2387 				  struct qed_ll2_acquire_data *data,
2388 				  struct qed_ll2_params *params,
2389 				  enum qed_ll2_conn_type conn_type,
2390 				  u8 *handle, bool lb)
2391 {
2392 	memset(data, 0, sizeof(*data));
2393 
2394 	data->input.conn_type = conn_type;
2395 	data->input.mtu = params->mtu;
2396 	data->input.rx_num_desc = QED_LL2_RX_SIZE;
2397 	data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets;
2398 	data->input.rx_vlan_removal_en = params->rx_vlan_stripping;
2399 	data->input.tx_num_desc = QED_LL2_TX_SIZE;
2400 	data->p_connection_handle = handle;
2401 	data->cbs = &ll2_cbs;
2402 	ll2_cbs.cookie = p_hwfn;
2403 
2404 	if (lb) {
2405 		data->input.tx_tc = PKT_LB_TC;
2406 		data->input.tx_dest = QED_LL2_TX_DEST_LB;
2407 	} else {
2408 		data->input.tx_tc = 0;
2409 		data->input.tx_dest = QED_LL2_TX_DEST_NW;
2410 	}
2411 }
2412 
qed_ll2_start_ooo(struct qed_hwfn * p_hwfn,struct qed_ll2_params * params)2413 static int qed_ll2_start_ooo(struct qed_hwfn *p_hwfn,
2414 			     struct qed_ll2_params *params)
2415 {
2416 	u8 *handle = &p_hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
2417 	struct qed_ll2_acquire_data data;
2418 	int rc;
2419 
2420 	qed_ll2_set_conn_data(p_hwfn, &data, params,
2421 			      QED_LL2_TYPE_OOO, handle, true);
2422 
2423 	rc = qed_ll2_acquire_connection(p_hwfn, &data);
2424 	if (rc) {
2425 		DP_INFO(p_hwfn, "Failed to acquire LL2 OOO connection\n");
2426 		goto out;
2427 	}
2428 
2429 	rc = qed_ll2_establish_connection(p_hwfn, *handle);
2430 	if (rc) {
2431 		DP_INFO(p_hwfn, "Failed to establish LL2 OOO connection\n");
2432 		goto fail;
2433 	}
2434 
2435 	return 0;
2436 
2437 fail:
2438 	qed_ll2_release_connection(p_hwfn, *handle);
2439 out:
2440 	*handle = QED_LL2_UNUSED_HANDLE;
2441 	return rc;
2442 }
2443 
qed_ll2_is_storage_eng1(struct qed_dev * cdev)2444 static bool qed_ll2_is_storage_eng1(struct qed_dev *cdev)
2445 {
2446 	return (QED_IS_FCOE_PERSONALITY(QED_LEADING_HWFN(cdev)) ||
2447 		QED_IS_ISCSI_PERSONALITY(QED_LEADING_HWFN(cdev)) ||
2448 		QED_IS_NVMETCP_PERSONALITY(QED_LEADING_HWFN(cdev))) &&
2449 		(QED_AFFIN_HWFN(cdev) != QED_LEADING_HWFN(cdev));
2450 }
2451 
__qed_ll2_stop(struct qed_hwfn * p_hwfn)2452 static int __qed_ll2_stop(struct qed_hwfn *p_hwfn)
2453 {
2454 	struct qed_dev *cdev = p_hwfn->cdev;
2455 	int rc;
2456 
2457 	rc = qed_ll2_terminate_connection(p_hwfn, cdev->ll2->handle);
2458 	if (rc)
2459 		DP_INFO(cdev, "Failed to terminate LL2 connection\n");
2460 
2461 	qed_ll2_release_connection(p_hwfn, cdev->ll2->handle);
2462 
2463 	return rc;
2464 }
2465 
qed_ll2_stop(struct qed_dev * cdev)2466 static int qed_ll2_stop(struct qed_dev *cdev)
2467 {
2468 	bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2469 	struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2470 	int rc = 0, rc2 = 0;
2471 
2472 	if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
2473 		return 0;
2474 	if (!QED_IS_NVMETCP_PERSONALITY(p_hwfn))
2475 		qed_llh_remove_mac_filter(cdev, 0, cdev->ll2_mac_address);
2476 
2477 	qed_llh_remove_mac_filter(cdev, 0, cdev->ll2_mac_address);
2478 	eth_zero_addr(cdev->ll2_mac_address);
2479 
2480 	if (QED_IS_ISCSI_PERSONALITY(p_hwfn) || QED_IS_NVMETCP_PERSONALITY(p_hwfn))
2481 		qed_ll2_stop_ooo(p_hwfn);
2482 
2483 	/* In CMT mode, LL2 is always started on engine 0 for a storage PF */
2484 	if (b_is_storage_eng1) {
2485 		rc2 = __qed_ll2_stop(QED_LEADING_HWFN(cdev));
2486 		if (rc2)
2487 			DP_NOTICE(QED_LEADING_HWFN(cdev),
2488 				  "Failed to stop LL2 on engine 0\n");
2489 	}
2490 
2491 	rc = __qed_ll2_stop(p_hwfn);
2492 	if (rc)
2493 		DP_NOTICE(p_hwfn, "Failed to stop LL2\n");
2494 
2495 	qed_ll2_kill_buffers(cdev);
2496 
2497 	cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2498 
2499 	return rc | rc2;
2500 }
2501 
__qed_ll2_start(struct qed_hwfn * p_hwfn,struct qed_ll2_params * params)2502 static int __qed_ll2_start(struct qed_hwfn *p_hwfn,
2503 			   struct qed_ll2_params *params)
2504 {
2505 	struct qed_ll2_buffer *buffer, *tmp_buffer;
2506 	struct qed_dev *cdev = p_hwfn->cdev;
2507 	enum qed_ll2_conn_type conn_type;
2508 	struct qed_ll2_acquire_data data;
2509 	int rc, rx_cnt;
2510 
2511 	switch (p_hwfn->hw_info.personality) {
2512 	case QED_PCI_FCOE:
2513 		conn_type = QED_LL2_TYPE_FCOE;
2514 		break;
2515 	case QED_PCI_ISCSI:
2516 	case QED_PCI_NVMETCP:
2517 		conn_type = QED_LL2_TYPE_TCP_ULP;
2518 		break;
2519 	case QED_PCI_ETH_ROCE:
2520 		conn_type = QED_LL2_TYPE_ROCE;
2521 		break;
2522 	default:
2523 
2524 		conn_type = QED_LL2_TYPE_TEST;
2525 	}
2526 
2527 	qed_ll2_set_conn_data(p_hwfn, &data, params, conn_type,
2528 			      &cdev->ll2->handle, false);
2529 
2530 	rc = qed_ll2_acquire_connection(p_hwfn, &data);
2531 	if (rc) {
2532 		DP_INFO(p_hwfn, "Failed to acquire LL2 connection\n");
2533 		return rc;
2534 	}
2535 
2536 	rc = qed_ll2_establish_connection(p_hwfn, cdev->ll2->handle);
2537 	if (rc) {
2538 		DP_INFO(p_hwfn, "Failed to establish LL2 connection\n");
2539 		goto release_conn;
2540 	}
2541 
2542 	/* Post all Rx buffers to FW */
2543 	spin_lock_bh(&cdev->ll2->lock);
2544 	rx_cnt = cdev->ll2->rx_cnt;
2545 	list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
2546 		rc = qed_ll2_post_rx_buffer(p_hwfn,
2547 					    cdev->ll2->handle,
2548 					    buffer->phys_addr, 0, buffer, 1);
2549 		if (rc) {
2550 			DP_INFO(p_hwfn,
2551 				"Failed to post an Rx buffer; Deleting it\n");
2552 			dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
2553 					 cdev->ll2->rx_size, DMA_FROM_DEVICE);
2554 			kfree(buffer->data);
2555 			list_del(&buffer->list);
2556 			kfree(buffer);
2557 		} else {
2558 			rx_cnt++;
2559 		}
2560 	}
2561 	spin_unlock_bh(&cdev->ll2->lock);
2562 
2563 	if (rx_cnt == cdev->ll2->rx_cnt) {
2564 		DP_NOTICE(p_hwfn, "Failed passing even a single Rx buffer\n");
2565 		goto terminate_conn;
2566 	}
2567 	cdev->ll2->rx_cnt = rx_cnt;
2568 
2569 	return 0;
2570 
2571 terminate_conn:
2572 	qed_ll2_terminate_connection(p_hwfn, cdev->ll2->handle);
2573 release_conn:
2574 	qed_ll2_release_connection(p_hwfn, cdev->ll2->handle);
2575 	return rc;
2576 }
2577 
qed_ll2_start(struct qed_dev * cdev,struct qed_ll2_params * params)2578 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
2579 {
2580 	bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2581 	struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2582 	struct qed_ll2_buffer *buffer;
2583 	int rx_num_desc, i, rc;
2584 
2585 	if (!is_valid_ether_addr(params->ll2_mac_address)) {
2586 		DP_NOTICE(cdev, "Invalid Ethernet address\n");
2587 		return -EINVAL;
2588 	}
2589 
2590 	WARN_ON(!cdev->ll2->cbs);
2591 
2592 	/* Initialize LL2 locks & lists */
2593 	INIT_LIST_HEAD(&cdev->ll2->list);
2594 	spin_lock_init(&cdev->ll2->lock);
2595 
2596 	cdev->ll2->rx_size = PRM_DMA_PAD_BYTES_NUM + ETH_HLEN +
2597 			     L1_CACHE_BYTES + params->mtu;
2598 
2599 	/* Allocate memory for LL2.
2600 	 * In CMT mode, in case of a storage PF which is affintized to engine 1,
2601 	 * LL2 is started also on engine 0 and thus we need twofold buffers.
2602 	 */
2603 	rx_num_desc = QED_LL2_RX_SIZE * (b_is_storage_eng1 ? 2 : 1);
2604 	DP_INFO(cdev, "Allocating %d LL2 buffers of size %08x bytes\n",
2605 		rx_num_desc, cdev->ll2->rx_size);
2606 	for (i = 0; i < rx_num_desc; i++) {
2607 		buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
2608 		if (!buffer) {
2609 			DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
2610 			rc = -ENOMEM;
2611 			goto err0;
2612 		}
2613 
2614 		rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
2615 					  &buffer->phys_addr);
2616 		if (rc) {
2617 			kfree(buffer);
2618 			goto err0;
2619 		}
2620 
2621 		list_add_tail(&buffer->list, &cdev->ll2->list);
2622 	}
2623 
2624 	rc = __qed_ll2_start(p_hwfn, params);
2625 	if (rc) {
2626 		DP_NOTICE(cdev, "Failed to start LL2\n");
2627 		goto err0;
2628 	}
2629 
2630 	/* In CMT mode, always need to start LL2 on engine 0 for a storage PF,
2631 	 * since broadcast/mutlicast packets are routed to engine 0.
2632 	 */
2633 	if (b_is_storage_eng1) {
2634 		rc = __qed_ll2_start(QED_LEADING_HWFN(cdev), params);
2635 		if (rc) {
2636 			DP_NOTICE(QED_LEADING_HWFN(cdev),
2637 				  "Failed to start LL2 on engine 0\n");
2638 			goto err1;
2639 		}
2640 	}
2641 
2642 	if (QED_IS_ISCSI_PERSONALITY(p_hwfn) || QED_IS_NVMETCP_PERSONALITY(p_hwfn)) {
2643 		DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
2644 		rc = qed_ll2_start_ooo(p_hwfn, params);
2645 		if (rc) {
2646 			DP_NOTICE(cdev, "Failed to start OOO LL2\n");
2647 			goto err2;
2648 		}
2649 	}
2650 
2651 	if (!QED_IS_NVMETCP_PERSONALITY(p_hwfn)) {
2652 		rc = qed_llh_add_mac_filter(cdev, 0, params->ll2_mac_address);
2653 		if (rc) {
2654 			DP_NOTICE(cdev, "Failed to add an LLH filter\n");
2655 			goto err3;
2656 		}
2657 	}
2658 
2659 	ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
2660 
2661 	return 0;
2662 
2663 err3:
2664 	if (QED_IS_ISCSI_PERSONALITY(p_hwfn) || QED_IS_NVMETCP_PERSONALITY(p_hwfn))
2665 		qed_ll2_stop_ooo(p_hwfn);
2666 err2:
2667 	if (b_is_storage_eng1)
2668 		__qed_ll2_stop(QED_LEADING_HWFN(cdev));
2669 err1:
2670 	__qed_ll2_stop(p_hwfn);
2671 err0:
2672 	qed_ll2_kill_buffers(cdev);
2673 	cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2674 	return rc;
2675 }
2676 
qed_ll2_start_xmit(struct qed_dev * cdev,struct sk_buff * skb,unsigned long xmit_flags)2677 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb,
2678 			      unsigned long xmit_flags)
2679 {
2680 	struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2681 	struct qed_ll2_tx_pkt_info pkt;
2682 	const skb_frag_t *frag;
2683 	u8 flags = 0, nr_frags;
2684 	int rc = -EINVAL, i;
2685 	dma_addr_t mapping;
2686 	u16 vlan = 0;
2687 
2688 	if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
2689 		DP_INFO(cdev, "Cannot transmit a checksummed packet\n");
2690 		return -EINVAL;
2691 	}
2692 
2693 	/* Cache number of fragments from SKB since SKB may be freed by
2694 	 * the completion routine after calling qed_ll2_prepare_tx_packet()
2695 	 */
2696 	nr_frags = skb_shinfo(skb)->nr_frags;
2697 
2698 	if (unlikely(1 + nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET)) {
2699 		DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
2700 		       1 + nr_frags);
2701 		return -EINVAL;
2702 	}
2703 
2704 	mapping = dma_map_single(&cdev->pdev->dev, skb->data,
2705 				 skb->len, DMA_TO_DEVICE);
2706 	if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2707 		DP_NOTICE(cdev, "SKB mapping failed\n");
2708 		return -EINVAL;
2709 	}
2710 
2711 	/* Request HW to calculate IP csum */
2712 	if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
2713 	      ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
2714 		flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT);
2715 
2716 	if (skb_vlan_tag_present(skb)) {
2717 		vlan = skb_vlan_tag_get(skb);
2718 		flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT);
2719 	}
2720 
2721 	memset(&pkt, 0, sizeof(pkt));
2722 	pkt.num_of_bds = 1 + nr_frags;
2723 	pkt.vlan = vlan;
2724 	pkt.bd_flags = flags;
2725 	pkt.tx_dest = QED_LL2_TX_DEST_NW;
2726 	pkt.first_frag = mapping;
2727 	pkt.first_frag_len = skb->len;
2728 	pkt.cookie = skb;
2729 	if (test_bit(QED_MF_UFP_SPECIFIC, &cdev->mf_bits) &&
2730 	    test_bit(QED_LL2_XMIT_FLAGS_FIP_DISCOVERY, &xmit_flags))
2731 		pkt.remove_stag = true;
2732 
2733 	/* qed_ll2_prepare_tx_packet() may actually send the packet if
2734 	 * there are no fragments in the skb and subsequently the completion
2735 	 * routine may run and free the SKB, so no dereferencing the SKB
2736 	 * beyond this point unless skb has any fragments.
2737 	 */
2738 	rc = qed_ll2_prepare_tx_packet(p_hwfn, cdev->ll2->handle,
2739 				       &pkt, 1);
2740 	if (unlikely(rc))
2741 		goto err;
2742 
2743 	for (i = 0; i < nr_frags; i++) {
2744 		frag = &skb_shinfo(skb)->frags[i];
2745 
2746 		mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
2747 					   skb_frag_size(frag), DMA_TO_DEVICE);
2748 
2749 		if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2750 			DP_NOTICE(cdev,
2751 				  "Unable to map frag - dropping packet\n");
2752 			rc = -ENOMEM;
2753 			goto err;
2754 		}
2755 
2756 		rc = qed_ll2_set_fragment_of_tx_packet(p_hwfn,
2757 						       cdev->ll2->handle,
2758 						       mapping,
2759 						       skb_frag_size(frag));
2760 
2761 		/* if failed not much to do here, partial packet has been posted
2762 		 * we can't free memory, will need to wait for completion
2763 		 */
2764 		if (unlikely(rc))
2765 			goto err2;
2766 	}
2767 
2768 	return 0;
2769 
2770 err:
2771 	dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
2772 err2:
2773 	return rc;
2774 }
2775 
qed_ll2_stats(struct qed_dev * cdev,struct qed_ll2_stats * stats)2776 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
2777 {
2778 	bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2779 	struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2780 	int rc;
2781 
2782 	if (!cdev->ll2)
2783 		return -EINVAL;
2784 
2785 	rc = qed_ll2_get_stats(p_hwfn, cdev->ll2->handle, stats);
2786 	if (rc) {
2787 		DP_NOTICE(p_hwfn, "Failed to get LL2 stats\n");
2788 		return rc;
2789 	}
2790 
2791 	/* In CMT mode, LL2 is always started on engine 0 for a storage PF */
2792 	if (b_is_storage_eng1) {
2793 		rc = __qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
2794 					 cdev->ll2->handle, stats);
2795 		if (rc) {
2796 			DP_NOTICE(QED_LEADING_HWFN(cdev),
2797 				  "Failed to get LL2 stats on engine 0\n");
2798 			return rc;
2799 		}
2800 	}
2801 
2802 	return 0;
2803 }
2804 
2805 const struct qed_ll2_ops qed_ll2_ops_pass = {
2806 	.start = &qed_ll2_start,
2807 	.stop = &qed_ll2_stop,
2808 	.start_xmit = &qed_ll2_start_xmit,
2809 	.register_cb_ops = &qed_ll2_register_cb_ops,
2810 	.get_stats = &qed_ll2_stats,
2811 };
2812 
qed_ll2_alloc_if(struct qed_dev * cdev)2813 int qed_ll2_alloc_if(struct qed_dev *cdev)
2814 {
2815 	cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL);
2816 	return cdev->ll2 ? 0 : -ENOMEM;
2817 }
2818 
qed_ll2_dealloc_if(struct qed_dev * cdev)2819 void qed_ll2_dealloc_if(struct qed_dev *cdev)
2820 {
2821 	kfree(cdev->ll2);
2822 	cdev->ll2 = NULL;
2823 }
2824