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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * debugfs.c - DesignWare USB3 DRD Controller DebugFS file
4  *
5  * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
6  *
7  * Authors: Felipe Balbi <balbi@ti.com>,
8  *	    Sebastian Andrzej Siewior <bigeasy@linutronix.de>
9  */
10 
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/ptrace.h>
14 #include <linux/types.h>
15 #include <linux/spinlock.h>
16 #include <linux/debugfs.h>
17 #include <linux/seq_file.h>
18 #include <linux/delay.h>
19 #include <linux/uaccess.h>
20 
21 #include <linux/usb/ch9.h>
22 
23 #include "core.h"
24 #include "gadget.h"
25 #include "io.h"
26 #include "debug.h"
27 
28 #define DWC3_LSP_MUX_UNSELECTED 0xfffff
29 
30 #define dump_register(nm)				\
31 {							\
32 	.name	= __stringify(nm),			\
33 	.offset	= DWC3_ ##nm,				\
34 }
35 
36 #define dump_ep_register_set(n)			\
37 	{					\
38 		.name = "DEPCMDPAR2("__stringify(n)")",	\
39 		.offset = DWC3_DEP_BASE(n) +	\
40 			DWC3_DEPCMDPAR2,	\
41 	},					\
42 	{					\
43 		.name = "DEPCMDPAR1("__stringify(n)")",	\
44 		.offset = DWC3_DEP_BASE(n) +	\
45 			DWC3_DEPCMDPAR1,	\
46 	},					\
47 	{					\
48 		.name = "DEPCMDPAR0("__stringify(n)")",	\
49 		.offset = DWC3_DEP_BASE(n) +	\
50 			DWC3_DEPCMDPAR0,	\
51 	},					\
52 	{					\
53 		.name = "DEPCMD("__stringify(n)")",	\
54 		.offset = DWC3_DEP_BASE(n) +	\
55 			DWC3_DEPCMD,		\
56 	}
57 
58 
59 static const struct debugfs_reg32 dwc3_regs[] = {
60 	dump_register(GSBUSCFG0),
61 	dump_register(GSBUSCFG1),
62 	dump_register(GTXTHRCFG),
63 	dump_register(GRXTHRCFG),
64 	dump_register(GCTL),
65 	dump_register(GEVTEN),
66 	dump_register(GSTS),
67 	dump_register(GUCTL1),
68 	dump_register(GSNPSID),
69 	dump_register(GGPIO),
70 	dump_register(GUID),
71 	dump_register(GUCTL),
72 	dump_register(GBUSERRADDR0),
73 	dump_register(GBUSERRADDR1),
74 	dump_register(GPRTBIMAP0),
75 	dump_register(GPRTBIMAP1),
76 	dump_register(GHWPARAMS0),
77 	dump_register(GHWPARAMS1),
78 	dump_register(GHWPARAMS2),
79 	dump_register(GHWPARAMS3),
80 	dump_register(GHWPARAMS4),
81 	dump_register(GHWPARAMS5),
82 	dump_register(GHWPARAMS6),
83 	dump_register(GHWPARAMS7),
84 	dump_register(GDBGFIFOSPACE),
85 	dump_register(GDBGLTSSM),
86 	dump_register(GDBGBMU),
87 	dump_register(GPRTBIMAP_HS0),
88 	dump_register(GPRTBIMAP_HS1),
89 	dump_register(GPRTBIMAP_FS0),
90 	dump_register(GPRTBIMAP_FS1),
91 
92 	dump_register(GUSB2PHYCFG(0)),
93 	dump_register(GUSB2PHYCFG(1)),
94 	dump_register(GUSB2PHYCFG(2)),
95 	dump_register(GUSB2PHYCFG(3)),
96 	dump_register(GUSB2PHYCFG(4)),
97 	dump_register(GUSB2PHYCFG(5)),
98 	dump_register(GUSB2PHYCFG(6)),
99 	dump_register(GUSB2PHYCFG(7)),
100 	dump_register(GUSB2PHYCFG(8)),
101 	dump_register(GUSB2PHYCFG(9)),
102 	dump_register(GUSB2PHYCFG(10)),
103 	dump_register(GUSB2PHYCFG(11)),
104 	dump_register(GUSB2PHYCFG(12)),
105 	dump_register(GUSB2PHYCFG(13)),
106 	dump_register(GUSB2PHYCFG(14)),
107 	dump_register(GUSB2PHYCFG(15)),
108 
109 	dump_register(GUSB2I2CCTL(0)),
110 	dump_register(GUSB2I2CCTL(1)),
111 	dump_register(GUSB2I2CCTL(2)),
112 	dump_register(GUSB2I2CCTL(3)),
113 	dump_register(GUSB2I2CCTL(4)),
114 	dump_register(GUSB2I2CCTL(5)),
115 	dump_register(GUSB2I2CCTL(6)),
116 	dump_register(GUSB2I2CCTL(7)),
117 	dump_register(GUSB2I2CCTL(8)),
118 	dump_register(GUSB2I2CCTL(9)),
119 	dump_register(GUSB2I2CCTL(10)),
120 	dump_register(GUSB2I2CCTL(11)),
121 	dump_register(GUSB2I2CCTL(12)),
122 	dump_register(GUSB2I2CCTL(13)),
123 	dump_register(GUSB2I2CCTL(14)),
124 	dump_register(GUSB2I2CCTL(15)),
125 
126 	dump_register(GUSB2PHYACC(0)),
127 	dump_register(GUSB2PHYACC(1)),
128 	dump_register(GUSB2PHYACC(2)),
129 	dump_register(GUSB2PHYACC(3)),
130 	dump_register(GUSB2PHYACC(4)),
131 	dump_register(GUSB2PHYACC(5)),
132 	dump_register(GUSB2PHYACC(6)),
133 	dump_register(GUSB2PHYACC(7)),
134 	dump_register(GUSB2PHYACC(8)),
135 	dump_register(GUSB2PHYACC(9)),
136 	dump_register(GUSB2PHYACC(10)),
137 	dump_register(GUSB2PHYACC(11)),
138 	dump_register(GUSB2PHYACC(12)),
139 	dump_register(GUSB2PHYACC(13)),
140 	dump_register(GUSB2PHYACC(14)),
141 	dump_register(GUSB2PHYACC(15)),
142 
143 	dump_register(GUSB3PIPECTL(0)),
144 	dump_register(GUSB3PIPECTL(1)),
145 	dump_register(GUSB3PIPECTL(2)),
146 	dump_register(GUSB3PIPECTL(3)),
147 	dump_register(GUSB3PIPECTL(4)),
148 	dump_register(GUSB3PIPECTL(5)),
149 	dump_register(GUSB3PIPECTL(6)),
150 	dump_register(GUSB3PIPECTL(7)),
151 	dump_register(GUSB3PIPECTL(8)),
152 	dump_register(GUSB3PIPECTL(9)),
153 	dump_register(GUSB3PIPECTL(10)),
154 	dump_register(GUSB3PIPECTL(11)),
155 	dump_register(GUSB3PIPECTL(12)),
156 	dump_register(GUSB3PIPECTL(13)),
157 	dump_register(GUSB3PIPECTL(14)),
158 	dump_register(GUSB3PIPECTL(15)),
159 
160 	dump_register(GTXFIFOSIZ(0)),
161 	dump_register(GTXFIFOSIZ(1)),
162 	dump_register(GTXFIFOSIZ(2)),
163 	dump_register(GTXFIFOSIZ(3)),
164 	dump_register(GTXFIFOSIZ(4)),
165 	dump_register(GTXFIFOSIZ(5)),
166 	dump_register(GTXFIFOSIZ(6)),
167 	dump_register(GTXFIFOSIZ(7)),
168 	dump_register(GTXFIFOSIZ(8)),
169 	dump_register(GTXFIFOSIZ(9)),
170 	dump_register(GTXFIFOSIZ(10)),
171 	dump_register(GTXFIFOSIZ(11)),
172 	dump_register(GTXFIFOSIZ(12)),
173 	dump_register(GTXFIFOSIZ(13)),
174 	dump_register(GTXFIFOSIZ(14)),
175 	dump_register(GTXFIFOSIZ(15)),
176 	dump_register(GTXFIFOSIZ(16)),
177 	dump_register(GTXFIFOSIZ(17)),
178 	dump_register(GTXFIFOSIZ(18)),
179 	dump_register(GTXFIFOSIZ(19)),
180 	dump_register(GTXFIFOSIZ(20)),
181 	dump_register(GTXFIFOSIZ(21)),
182 	dump_register(GTXFIFOSIZ(22)),
183 	dump_register(GTXFIFOSIZ(23)),
184 	dump_register(GTXFIFOSIZ(24)),
185 	dump_register(GTXFIFOSIZ(25)),
186 	dump_register(GTXFIFOSIZ(26)),
187 	dump_register(GTXFIFOSIZ(27)),
188 	dump_register(GTXFIFOSIZ(28)),
189 	dump_register(GTXFIFOSIZ(29)),
190 	dump_register(GTXFIFOSIZ(30)),
191 	dump_register(GTXFIFOSIZ(31)),
192 
193 	dump_register(GRXFIFOSIZ(0)),
194 	dump_register(GRXFIFOSIZ(1)),
195 	dump_register(GRXFIFOSIZ(2)),
196 	dump_register(GRXFIFOSIZ(3)),
197 	dump_register(GRXFIFOSIZ(4)),
198 	dump_register(GRXFIFOSIZ(5)),
199 	dump_register(GRXFIFOSIZ(6)),
200 	dump_register(GRXFIFOSIZ(7)),
201 	dump_register(GRXFIFOSIZ(8)),
202 	dump_register(GRXFIFOSIZ(9)),
203 	dump_register(GRXFIFOSIZ(10)),
204 	dump_register(GRXFIFOSIZ(11)),
205 	dump_register(GRXFIFOSIZ(12)),
206 	dump_register(GRXFIFOSIZ(13)),
207 	dump_register(GRXFIFOSIZ(14)),
208 	dump_register(GRXFIFOSIZ(15)),
209 	dump_register(GRXFIFOSIZ(16)),
210 	dump_register(GRXFIFOSIZ(17)),
211 	dump_register(GRXFIFOSIZ(18)),
212 	dump_register(GRXFIFOSIZ(19)),
213 	dump_register(GRXFIFOSIZ(20)),
214 	dump_register(GRXFIFOSIZ(21)),
215 	dump_register(GRXFIFOSIZ(22)),
216 	dump_register(GRXFIFOSIZ(23)),
217 	dump_register(GRXFIFOSIZ(24)),
218 	dump_register(GRXFIFOSIZ(25)),
219 	dump_register(GRXFIFOSIZ(26)),
220 	dump_register(GRXFIFOSIZ(27)),
221 	dump_register(GRXFIFOSIZ(28)),
222 	dump_register(GRXFIFOSIZ(29)),
223 	dump_register(GRXFIFOSIZ(30)),
224 	dump_register(GRXFIFOSIZ(31)),
225 
226 	dump_register(GEVNTADRLO(0)),
227 	dump_register(GEVNTADRHI(0)),
228 	dump_register(GEVNTSIZ(0)),
229 	dump_register(GEVNTCOUNT(0)),
230 
231 	dump_register(GHWPARAMS8),
232 	dump_register(DCFG),
233 	dump_register(DCTL),
234 	dump_register(DEVTEN),
235 	dump_register(DSTS),
236 	dump_register(DGCMDPAR),
237 	dump_register(DGCMD),
238 	dump_register(DALEPENA),
239 
240 	dump_ep_register_set(0),
241 	dump_ep_register_set(1),
242 	dump_ep_register_set(2),
243 	dump_ep_register_set(3),
244 	dump_ep_register_set(4),
245 	dump_ep_register_set(5),
246 	dump_ep_register_set(6),
247 	dump_ep_register_set(7),
248 	dump_ep_register_set(8),
249 	dump_ep_register_set(9),
250 	dump_ep_register_set(10),
251 	dump_ep_register_set(11),
252 	dump_ep_register_set(12),
253 	dump_ep_register_set(13),
254 	dump_ep_register_set(14),
255 	dump_ep_register_set(15),
256 	dump_ep_register_set(16),
257 	dump_ep_register_set(17),
258 	dump_ep_register_set(18),
259 	dump_ep_register_set(19),
260 	dump_ep_register_set(20),
261 	dump_ep_register_set(21),
262 	dump_ep_register_set(22),
263 	dump_ep_register_set(23),
264 	dump_ep_register_set(24),
265 	dump_ep_register_set(25),
266 	dump_ep_register_set(26),
267 	dump_ep_register_set(27),
268 	dump_ep_register_set(28),
269 	dump_ep_register_set(29),
270 	dump_ep_register_set(30),
271 	dump_ep_register_set(31),
272 
273 	dump_register(OCFG),
274 	dump_register(OCTL),
275 	dump_register(OEVT),
276 	dump_register(OEVTEN),
277 	dump_register(OSTS),
278 };
279 
dwc3_host_lsp(struct seq_file * s)280 static void dwc3_host_lsp(struct seq_file *s)
281 {
282 	struct dwc3		*dwc = s->private;
283 	bool			dbc_enabled;
284 	u32			sel;
285 	u32			reg;
286 	u32			val;
287 
288 	dbc_enabled = !!(dwc->hwparams.hwparams1 & DWC3_GHWPARAMS1_ENDBC);
289 
290 	sel = dwc->dbg_lsp_select;
291 	if (sel == DWC3_LSP_MUX_UNSELECTED) {
292 		seq_puts(s, "Write LSP selection to print for host\n");
293 		return;
294 	}
295 
296 	reg = DWC3_GDBGLSPMUX_HOSTSELECT(sel);
297 
298 	dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
299 	val = dwc3_readl(dwc->regs, DWC3_GDBGLSP);
300 	seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", sel, val);
301 
302 	if (dbc_enabled && sel < 256) {
303 		reg |= DWC3_GDBGLSPMUX_ENDBC;
304 		dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
305 		val = dwc3_readl(dwc->regs, DWC3_GDBGLSP);
306 		seq_printf(s, "GDBGLSP_DBC[%d] = 0x%08x\n", sel, val);
307 	}
308 }
309 
dwc3_gadget_lsp(struct seq_file * s)310 static void dwc3_gadget_lsp(struct seq_file *s)
311 {
312 	struct dwc3		*dwc = s->private;
313 	int			i;
314 	u32			reg;
315 
316 	for (i = 0; i < 16; i++) {
317 		reg = DWC3_GDBGLSPMUX_DEVSELECT(i);
318 		dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
319 		reg = dwc3_readl(dwc->regs, DWC3_GDBGLSP);
320 		seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", i, reg);
321 	}
322 }
323 
dwc3_lsp_show(struct seq_file * s,void * unused)324 static int dwc3_lsp_show(struct seq_file *s, void *unused)
325 {
326 	struct dwc3		*dwc = s->private;
327 	unsigned int		current_mode;
328 	unsigned long		flags;
329 	u32			reg;
330 	int			ret;
331 
332 	ret = pm_runtime_resume_and_get(dwc->dev);
333 	if (ret < 0)
334 		return ret;
335 
336 	spin_lock_irqsave(&dwc->lock, flags);
337 	reg = dwc3_readl(dwc->regs, DWC3_GSTS);
338 	current_mode = DWC3_GSTS_CURMOD(reg);
339 
340 	switch (current_mode) {
341 	case DWC3_GSTS_CURMOD_HOST:
342 		dwc3_host_lsp(s);
343 		break;
344 	case DWC3_GSTS_CURMOD_DEVICE:
345 		dwc3_gadget_lsp(s);
346 		break;
347 	default:
348 		seq_puts(s, "Mode is unknown, no LSP register printed\n");
349 		break;
350 	}
351 	spin_unlock_irqrestore(&dwc->lock, flags);
352 
353 	pm_runtime_put_sync(dwc->dev);
354 
355 	return 0;
356 }
357 
dwc3_lsp_open(struct inode * inode,struct file * file)358 static int dwc3_lsp_open(struct inode *inode, struct file *file)
359 {
360 	return single_open(file, dwc3_lsp_show, inode->i_private);
361 }
362 
dwc3_lsp_write(struct file * file,const char __user * ubuf,size_t count,loff_t * ppos)363 static ssize_t dwc3_lsp_write(struct file *file, const char __user *ubuf,
364 			      size_t count, loff_t *ppos)
365 {
366 	struct seq_file		*s = file->private_data;
367 	struct dwc3		*dwc = s->private;
368 	unsigned long		flags;
369 	char			buf[32] = { 0 };
370 	u32			sel;
371 	int			ret;
372 
373 	if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
374 		return -EFAULT;
375 
376 	ret = kstrtouint(buf, 0, &sel);
377 	if (ret)
378 		return ret;
379 
380 	spin_lock_irqsave(&dwc->lock, flags);
381 	dwc->dbg_lsp_select = sel;
382 	spin_unlock_irqrestore(&dwc->lock, flags);
383 
384 	return count;
385 }
386 
387 static const struct file_operations dwc3_lsp_fops = {
388 	.open			= dwc3_lsp_open,
389 	.write			= dwc3_lsp_write,
390 	.read			= seq_read,
391 	.llseek			= seq_lseek,
392 	.release		= single_release,
393 };
394 
dwc3_mode_show(struct seq_file * s,void * unused)395 static int dwc3_mode_show(struct seq_file *s, void *unused)
396 {
397 	struct dwc3		*dwc = s->private;
398 	unsigned long		flags;
399 	u32			reg;
400 	int			ret;
401 
402 	ret = pm_runtime_resume_and_get(dwc->dev);
403 	if (ret < 0)
404 		return ret;
405 
406 	spin_lock_irqsave(&dwc->lock, flags);
407 	reg = dwc3_readl(dwc->regs, DWC3_GCTL);
408 	spin_unlock_irqrestore(&dwc->lock, flags);
409 
410 	switch (DWC3_GCTL_PRTCAP(reg)) {
411 	case DWC3_GCTL_PRTCAP_HOST:
412 		seq_puts(s, "host\n");
413 		break;
414 	case DWC3_GCTL_PRTCAP_DEVICE:
415 		seq_puts(s, "device\n");
416 		break;
417 	case DWC3_GCTL_PRTCAP_OTG:
418 		seq_puts(s, "otg\n");
419 		break;
420 	default:
421 		seq_printf(s, "UNKNOWN %08x\n", DWC3_GCTL_PRTCAP(reg));
422 	}
423 
424 	pm_runtime_put_sync(dwc->dev);
425 
426 	return 0;
427 }
428 
dwc3_mode_open(struct inode * inode,struct file * file)429 static int dwc3_mode_open(struct inode *inode, struct file *file)
430 {
431 	return single_open(file, dwc3_mode_show, inode->i_private);
432 }
433 
dwc3_mode_write(struct file * file,const char __user * ubuf,size_t count,loff_t * ppos)434 static ssize_t dwc3_mode_write(struct file *file,
435 		const char __user *ubuf, size_t count, loff_t *ppos)
436 {
437 	struct seq_file		*s = file->private_data;
438 	struct dwc3		*dwc = s->private;
439 	u32			mode = 0;
440 	char			buf[32];
441 
442 	if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
443 		return -EFAULT;
444 
445 	if (dwc->dr_mode != USB_DR_MODE_OTG)
446 		return count;
447 
448 	if (!strncmp(buf, "host", 4))
449 		mode = DWC3_GCTL_PRTCAP_HOST;
450 
451 	if (!strncmp(buf, "device", 6))
452 		mode = DWC3_GCTL_PRTCAP_DEVICE;
453 
454 	if (!strncmp(buf, "otg", 3))
455 		mode = DWC3_GCTL_PRTCAP_OTG;
456 
457 	dwc3_set_mode(dwc, mode);
458 
459 	return count;
460 }
461 
462 static const struct file_operations dwc3_mode_fops = {
463 	.open			= dwc3_mode_open,
464 	.write			= dwc3_mode_write,
465 	.read			= seq_read,
466 	.llseek			= seq_lseek,
467 	.release		= single_release,
468 };
469 
dwc3_testmode_show(struct seq_file * s,void * unused)470 static int dwc3_testmode_show(struct seq_file *s, void *unused)
471 {
472 	struct dwc3		*dwc = s->private;
473 	unsigned long		flags;
474 	u32			reg;
475 	int			ret;
476 
477 	ret = pm_runtime_resume_and_get(dwc->dev);
478 	if (ret < 0)
479 		return ret;
480 
481 	spin_lock_irqsave(&dwc->lock, flags);
482 	reg = dwc3_readl(dwc->regs, DWC3_DCTL);
483 	reg &= DWC3_DCTL_TSTCTRL_MASK;
484 	reg >>= 1;
485 	spin_unlock_irqrestore(&dwc->lock, flags);
486 
487 	switch (reg) {
488 	case 0:
489 		seq_puts(s, "no test\n");
490 		break;
491 	case USB_TEST_J:
492 		seq_puts(s, "test_j\n");
493 		break;
494 	case USB_TEST_K:
495 		seq_puts(s, "test_k\n");
496 		break;
497 	case USB_TEST_SE0_NAK:
498 		seq_puts(s, "test_se0_nak\n");
499 		break;
500 	case USB_TEST_PACKET:
501 		seq_puts(s, "test_packet\n");
502 		break;
503 	case USB_TEST_FORCE_ENABLE:
504 		seq_puts(s, "test_force_enable\n");
505 		break;
506 	default:
507 		seq_printf(s, "UNKNOWN %d\n", reg);
508 	}
509 
510 	pm_runtime_put_sync(dwc->dev);
511 
512 	return 0;
513 }
514 
dwc3_testmode_open(struct inode * inode,struct file * file)515 static int dwc3_testmode_open(struct inode *inode, struct file *file)
516 {
517 	return single_open(file, dwc3_testmode_show, inode->i_private);
518 }
519 
dwc3_testmode_write(struct file * file,const char __user * ubuf,size_t count,loff_t * ppos)520 static ssize_t dwc3_testmode_write(struct file *file,
521 		const char __user *ubuf, size_t count, loff_t *ppos)
522 {
523 	struct seq_file		*s = file->private_data;
524 	struct dwc3		*dwc = s->private;
525 	unsigned long		flags;
526 	u32			testmode = 0;
527 	char			buf[32];
528 	int			ret;
529 
530 	if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
531 		return -EFAULT;
532 
533 	if (!strncmp(buf, "test_j", 6))
534 		testmode = USB_TEST_J;
535 	else if (!strncmp(buf, "test_k", 6))
536 		testmode = USB_TEST_K;
537 	else if (!strncmp(buf, "test_se0_nak", 12))
538 		testmode = USB_TEST_SE0_NAK;
539 	else if (!strncmp(buf, "test_packet", 11))
540 		testmode = USB_TEST_PACKET;
541 	else if (!strncmp(buf, "test_force_enable", 17))
542 		testmode = USB_TEST_FORCE_ENABLE;
543 	else
544 		testmode = 0;
545 
546 	ret = pm_runtime_resume_and_get(dwc->dev);
547 	if (ret < 0)
548 		return ret;
549 
550 	spin_lock_irqsave(&dwc->lock, flags);
551 	dwc3_gadget_set_test_mode(dwc, testmode);
552 	spin_unlock_irqrestore(&dwc->lock, flags);
553 
554 	pm_runtime_put_sync(dwc->dev);
555 
556 	return count;
557 }
558 
559 static const struct file_operations dwc3_testmode_fops = {
560 	.open			= dwc3_testmode_open,
561 	.write			= dwc3_testmode_write,
562 	.read			= seq_read,
563 	.llseek			= seq_lseek,
564 	.release		= single_release,
565 };
566 
dwc3_link_state_show(struct seq_file * s,void * unused)567 static int dwc3_link_state_show(struct seq_file *s, void *unused)
568 {
569 	struct dwc3		*dwc = s->private;
570 	unsigned long		flags;
571 	enum dwc3_link_state	state;
572 	u32			reg;
573 	u8			speed;
574 	int			ret;
575 
576 	ret = pm_runtime_resume_and_get(dwc->dev);
577 	if (ret < 0)
578 		return ret;
579 
580 	spin_lock_irqsave(&dwc->lock, flags);
581 	reg = dwc3_readl(dwc->regs, DWC3_GSTS);
582 	if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) {
583 		seq_puts(s, "Not available\n");
584 		spin_unlock_irqrestore(&dwc->lock, flags);
585 		pm_runtime_put_sync(dwc->dev);
586 		return 0;
587 	}
588 
589 	reg = dwc3_readl(dwc->regs, DWC3_DSTS);
590 	state = DWC3_DSTS_USBLNKST(reg);
591 	speed = reg & DWC3_DSTS_CONNECTSPD;
592 
593 	seq_printf(s, "%s\n", (speed >= DWC3_DSTS_SUPERSPEED) ?
594 		   dwc3_gadget_link_string(state) :
595 		   dwc3_gadget_hs_link_string(state));
596 	spin_unlock_irqrestore(&dwc->lock, flags);
597 
598 	pm_runtime_put_sync(dwc->dev);
599 
600 	return 0;
601 }
602 
dwc3_link_state_open(struct inode * inode,struct file * file)603 static int dwc3_link_state_open(struct inode *inode, struct file *file)
604 {
605 	return single_open(file, dwc3_link_state_show, inode->i_private);
606 }
607 
dwc3_link_state_write(struct file * file,const char __user * ubuf,size_t count,loff_t * ppos)608 static ssize_t dwc3_link_state_write(struct file *file,
609 		const char __user *ubuf, size_t count, loff_t *ppos)
610 {
611 	struct seq_file		*s = file->private_data;
612 	struct dwc3		*dwc = s->private;
613 	unsigned long		flags;
614 	enum dwc3_link_state	state = 0;
615 	char			buf[32];
616 	u32			reg;
617 	u8			speed;
618 	int			ret;
619 
620 	if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
621 		return -EFAULT;
622 
623 	if (!strncmp(buf, "SS.Disabled", 11))
624 		state = DWC3_LINK_STATE_SS_DIS;
625 	else if (!strncmp(buf, "Rx.Detect", 9))
626 		state = DWC3_LINK_STATE_RX_DET;
627 	else if (!strncmp(buf, "SS.Inactive", 11))
628 		state = DWC3_LINK_STATE_SS_INACT;
629 	else if (!strncmp(buf, "Recovery", 8))
630 		state = DWC3_LINK_STATE_RECOV;
631 	else if (!strncmp(buf, "Compliance", 10))
632 		state = DWC3_LINK_STATE_CMPLY;
633 	else if (!strncmp(buf, "Loopback", 8))
634 		state = DWC3_LINK_STATE_LPBK;
635 	else
636 		return -EINVAL;
637 
638 	ret = pm_runtime_resume_and_get(dwc->dev);
639 	if (ret < 0)
640 		return ret;
641 
642 	spin_lock_irqsave(&dwc->lock, flags);
643 	reg = dwc3_readl(dwc->regs, DWC3_GSTS);
644 	if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) {
645 		spin_unlock_irqrestore(&dwc->lock, flags);
646 		pm_runtime_put_sync(dwc->dev);
647 		return -EINVAL;
648 	}
649 
650 	reg = dwc3_readl(dwc->regs, DWC3_DSTS);
651 	speed = reg & DWC3_DSTS_CONNECTSPD;
652 
653 	if (speed < DWC3_DSTS_SUPERSPEED &&
654 	    state != DWC3_LINK_STATE_RECOV) {
655 		spin_unlock_irqrestore(&dwc->lock, flags);
656 		pm_runtime_put_sync(dwc->dev);
657 		return -EINVAL;
658 	}
659 
660 	dwc3_gadget_set_link_state(dwc, state);
661 	spin_unlock_irqrestore(&dwc->lock, flags);
662 
663 	pm_runtime_put_sync(dwc->dev);
664 
665 	return count;
666 }
667 
668 static const struct file_operations dwc3_link_state_fops = {
669 	.open			= dwc3_link_state_open,
670 	.write			= dwc3_link_state_write,
671 	.read			= seq_read,
672 	.llseek			= seq_lseek,
673 	.release		= single_release,
674 };
675 
676 struct dwc3_ep_file_map {
677 	const char name[25];
678 	const struct file_operations *const fops;
679 };
680 
dwc3_tx_fifo_size_show(struct seq_file * s,void * unused)681 static int dwc3_tx_fifo_size_show(struct seq_file *s, void *unused)
682 {
683 	struct dwc3_ep		*dep = s->private;
684 	struct dwc3		*dwc = dep->dwc;
685 	unsigned long		flags;
686 	u32			mdwidth;
687 	u32			val;
688 	int			ret;
689 
690 	ret = pm_runtime_resume_and_get(dwc->dev);
691 	if (ret < 0)
692 		return ret;
693 
694 	spin_lock_irqsave(&dwc->lock, flags);
695 	val = dwc3_core_fifo_space(dep, DWC3_TXFIFO);
696 
697 	/* Convert to bytes */
698 	mdwidth = dwc3_mdwidth(dwc);
699 
700 	val *= mdwidth;
701 	val >>= 3;
702 	seq_printf(s, "%u\n", val);
703 	spin_unlock_irqrestore(&dwc->lock, flags);
704 
705 	pm_runtime_put_sync(dwc->dev);
706 
707 	return 0;
708 }
709 
dwc3_rx_fifo_size_show(struct seq_file * s,void * unused)710 static int dwc3_rx_fifo_size_show(struct seq_file *s, void *unused)
711 {
712 	struct dwc3_ep		*dep = s->private;
713 	struct dwc3		*dwc = dep->dwc;
714 	unsigned long		flags;
715 	u32			mdwidth;
716 	u32			val;
717 	int			ret;
718 
719 	ret = pm_runtime_resume_and_get(dwc->dev);
720 	if (ret < 0)
721 		return ret;
722 
723 	spin_lock_irqsave(&dwc->lock, flags);
724 	val = dwc3_core_fifo_space(dep, DWC3_RXFIFO);
725 
726 	/* Convert to bytes */
727 	mdwidth = dwc3_mdwidth(dwc);
728 
729 	val *= mdwidth;
730 	val >>= 3;
731 	seq_printf(s, "%u\n", val);
732 	spin_unlock_irqrestore(&dwc->lock, flags);
733 
734 	pm_runtime_put_sync(dwc->dev);
735 
736 	return 0;
737 }
738 
dwc3_tx_request_queue_show(struct seq_file * s,void * unused)739 static int dwc3_tx_request_queue_show(struct seq_file *s, void *unused)
740 {
741 	struct dwc3_ep		*dep = s->private;
742 	struct dwc3		*dwc = dep->dwc;
743 	unsigned long		flags;
744 	u32			val;
745 	int			ret;
746 
747 	ret = pm_runtime_resume_and_get(dwc->dev);
748 	if (ret < 0)
749 		return ret;
750 
751 	spin_lock_irqsave(&dwc->lock, flags);
752 	val = dwc3_core_fifo_space(dep, DWC3_TXREQQ);
753 	seq_printf(s, "%u\n", val);
754 	spin_unlock_irqrestore(&dwc->lock, flags);
755 
756 	pm_runtime_put_sync(dwc->dev);
757 
758 	return 0;
759 }
760 
dwc3_rx_request_queue_show(struct seq_file * s,void * unused)761 static int dwc3_rx_request_queue_show(struct seq_file *s, void *unused)
762 {
763 	struct dwc3_ep		*dep = s->private;
764 	struct dwc3		*dwc = dep->dwc;
765 	unsigned long		flags;
766 	u32			val;
767 	int			ret;
768 
769 	ret = pm_runtime_resume_and_get(dwc->dev);
770 	if (ret < 0)
771 		return ret;
772 
773 	spin_lock_irqsave(&dwc->lock, flags);
774 	val = dwc3_core_fifo_space(dep, DWC3_RXREQQ);
775 	seq_printf(s, "%u\n", val);
776 	spin_unlock_irqrestore(&dwc->lock, flags);
777 
778 	pm_runtime_put_sync(dwc->dev);
779 
780 	return 0;
781 }
782 
dwc3_rx_info_queue_show(struct seq_file * s,void * unused)783 static int dwc3_rx_info_queue_show(struct seq_file *s, void *unused)
784 {
785 	struct dwc3_ep		*dep = s->private;
786 	struct dwc3		*dwc = dep->dwc;
787 	unsigned long		flags;
788 	u32			val;
789 	int			ret;
790 
791 	ret = pm_runtime_resume_and_get(dwc->dev);
792 	if (ret < 0)
793 		return ret;
794 
795 	spin_lock_irqsave(&dwc->lock, flags);
796 	val = dwc3_core_fifo_space(dep, DWC3_RXINFOQ);
797 	seq_printf(s, "%u\n", val);
798 	spin_unlock_irqrestore(&dwc->lock, flags);
799 
800 	pm_runtime_put_sync(dwc->dev);
801 
802 	return 0;
803 }
804 
dwc3_descriptor_fetch_queue_show(struct seq_file * s,void * unused)805 static int dwc3_descriptor_fetch_queue_show(struct seq_file *s, void *unused)
806 {
807 	struct dwc3_ep		*dep = s->private;
808 	struct dwc3		*dwc = dep->dwc;
809 	unsigned long		flags;
810 	u32			val;
811 	int			ret;
812 
813 	ret = pm_runtime_resume_and_get(dwc->dev);
814 	if (ret < 0)
815 		return ret;
816 
817 	spin_lock_irqsave(&dwc->lock, flags);
818 	val = dwc3_core_fifo_space(dep, DWC3_DESCFETCHQ);
819 	seq_printf(s, "%u\n", val);
820 	spin_unlock_irqrestore(&dwc->lock, flags);
821 
822 	pm_runtime_put_sync(dwc->dev);
823 
824 	return 0;
825 }
826 
dwc3_event_queue_show(struct seq_file * s,void * unused)827 static int dwc3_event_queue_show(struct seq_file *s, void *unused)
828 {
829 	struct dwc3_ep		*dep = s->private;
830 	struct dwc3		*dwc = dep->dwc;
831 	unsigned long		flags;
832 	u32			val;
833 	int			ret;
834 
835 	ret = pm_runtime_resume_and_get(dwc->dev);
836 	if (ret < 0)
837 		return ret;
838 
839 	spin_lock_irqsave(&dwc->lock, flags);
840 	val = dwc3_core_fifo_space(dep, DWC3_EVENTQ);
841 	seq_printf(s, "%u\n", val);
842 	spin_unlock_irqrestore(&dwc->lock, flags);
843 
844 	pm_runtime_put_sync(dwc->dev);
845 
846 	return 0;
847 }
848 
dwc3_transfer_type_show(struct seq_file * s,void * unused)849 static int dwc3_transfer_type_show(struct seq_file *s, void *unused)
850 {
851 	struct dwc3_ep		*dep = s->private;
852 	struct dwc3		*dwc = dep->dwc;
853 	unsigned long		flags;
854 
855 	spin_lock_irqsave(&dwc->lock, flags);
856 	if (!(dep->flags & DWC3_EP_ENABLED) || !dep->endpoint.desc) {
857 		seq_puts(s, "--\n");
858 		goto out;
859 	}
860 
861 	switch (usb_endpoint_type(dep->endpoint.desc)) {
862 	case USB_ENDPOINT_XFER_CONTROL:
863 		seq_puts(s, "control\n");
864 		break;
865 	case USB_ENDPOINT_XFER_ISOC:
866 		seq_puts(s, "isochronous\n");
867 		break;
868 	case USB_ENDPOINT_XFER_BULK:
869 		seq_puts(s, "bulk\n");
870 		break;
871 	case USB_ENDPOINT_XFER_INT:
872 		seq_puts(s, "interrupt\n");
873 		break;
874 	default:
875 		seq_puts(s, "--\n");
876 	}
877 
878 out:
879 	spin_unlock_irqrestore(&dwc->lock, flags);
880 
881 	return 0;
882 }
883 
dwc3_trb_ring_show(struct seq_file * s,void * unused)884 static int dwc3_trb_ring_show(struct seq_file *s, void *unused)
885 {
886 	struct dwc3_ep		*dep = s->private;
887 	struct dwc3		*dwc = dep->dwc;
888 	unsigned long		flags;
889 	int			i;
890 	int			ret;
891 
892 	ret = pm_runtime_resume_and_get(dwc->dev);
893 	if (ret < 0)
894 		return ret;
895 
896 	spin_lock_irqsave(&dwc->lock, flags);
897 	if (dep->number <= 1) {
898 		seq_puts(s, "--\n");
899 		goto out;
900 	}
901 
902 	seq_puts(s, "buffer_addr,size,type,ioc,isp_imi,csp,chn,lst,hwo\n");
903 
904 	for (i = 0; i < DWC3_TRB_NUM; i++) {
905 		struct dwc3_trb *trb = &dep->trb_pool[i];
906 		unsigned int type = DWC3_TRBCTL_TYPE(trb->ctrl);
907 
908 		seq_printf(s, "%08x%08x,%d,%s,%d,%d,%d,%d,%d,%d       %c%c\n",
909 				trb->bph, trb->bpl, trb->size,
910 				dwc3_trb_type_string(type),
911 				!!(trb->ctrl & DWC3_TRB_CTRL_IOC),
912 				!!(trb->ctrl & DWC3_TRB_CTRL_ISP_IMI),
913 				!!(trb->ctrl & DWC3_TRB_CTRL_CSP),
914 				!!(trb->ctrl & DWC3_TRB_CTRL_CHN),
915 				!!(trb->ctrl & DWC3_TRB_CTRL_LST),
916 				!!(trb->ctrl & DWC3_TRB_CTRL_HWO),
917 				dep->trb_enqueue == i ? 'E' : ' ',
918 				dep->trb_dequeue == i ? 'D' : ' ');
919 	}
920 
921 out:
922 	spin_unlock_irqrestore(&dwc->lock, flags);
923 
924 	pm_runtime_put_sync(dwc->dev);
925 
926 	return 0;
927 }
928 
dwc3_ep_info_register_show(struct seq_file * s,void * unused)929 static int dwc3_ep_info_register_show(struct seq_file *s, void *unused)
930 {
931 	struct dwc3_ep		*dep = s->private;
932 	struct dwc3		*dwc = dep->dwc;
933 	unsigned long		flags;
934 	u64			ep_info;
935 	u32			lower_32_bits;
936 	u32			upper_32_bits;
937 	u32			reg;
938 	int			ret;
939 
940 	ret = pm_runtime_resume_and_get(dwc->dev);
941 	if (ret < 0)
942 		return ret;
943 
944 	spin_lock_irqsave(&dwc->lock, flags);
945 	reg = DWC3_GDBGLSPMUX_EPSELECT(dep->number);
946 	dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
947 
948 	lower_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO0);
949 	upper_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO1);
950 
951 	ep_info = ((u64)upper_32_bits << 32) | lower_32_bits;
952 	seq_printf(s, "0x%016llx\n", ep_info);
953 	spin_unlock_irqrestore(&dwc->lock, flags);
954 
955 	pm_runtime_put_sync(dwc->dev);
956 
957 	return 0;
958 }
959 
960 DEFINE_SHOW_ATTRIBUTE(dwc3_tx_fifo_size);
961 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_fifo_size);
962 DEFINE_SHOW_ATTRIBUTE(dwc3_tx_request_queue);
963 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_request_queue);
964 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_info_queue);
965 DEFINE_SHOW_ATTRIBUTE(dwc3_descriptor_fetch_queue);
966 DEFINE_SHOW_ATTRIBUTE(dwc3_event_queue);
967 DEFINE_SHOW_ATTRIBUTE(dwc3_transfer_type);
968 DEFINE_SHOW_ATTRIBUTE(dwc3_trb_ring);
969 DEFINE_SHOW_ATTRIBUTE(dwc3_ep_info_register);
970 
971 static const struct dwc3_ep_file_map dwc3_ep_file_map[] = {
972 	{ "tx_fifo_size", &dwc3_tx_fifo_size_fops, },
973 	{ "rx_fifo_size", &dwc3_rx_fifo_size_fops, },
974 	{ "tx_request_queue", &dwc3_tx_request_queue_fops, },
975 	{ "rx_request_queue", &dwc3_rx_request_queue_fops, },
976 	{ "rx_info_queue", &dwc3_rx_info_queue_fops, },
977 	{ "descriptor_fetch_queue", &dwc3_descriptor_fetch_queue_fops, },
978 	{ "event_queue", &dwc3_event_queue_fops, },
979 	{ "transfer_type", &dwc3_transfer_type_fops, },
980 	{ "trb_ring", &dwc3_trb_ring_fops, },
981 	{ "GDBGEPINFO", &dwc3_ep_info_register_fops, },
982 };
983 
dwc3_debugfs_create_endpoint_dir(struct dwc3_ep * dep)984 void dwc3_debugfs_create_endpoint_dir(struct dwc3_ep *dep)
985 {
986 	struct dentry		*dir;
987 	int			i;
988 
989 	dir = debugfs_create_dir(dep->name, dep->dwc->debug_root);
990 	for (i = 0; i < ARRAY_SIZE(dwc3_ep_file_map); i++) {
991 		const struct file_operations *fops = dwc3_ep_file_map[i].fops;
992 		const char *name = dwc3_ep_file_map[i].name;
993 
994 		debugfs_create_file(name, 0444, dir, dep, fops);
995 	}
996 }
997 
dwc3_debugfs_remove_endpoint_dir(struct dwc3_ep * dep)998 void dwc3_debugfs_remove_endpoint_dir(struct dwc3_ep *dep)
999 {
1000 	debugfs_lookup_and_remove(dep->name, dep->dwc->debug_root);
1001 }
1002 
dwc3_debugfs_init(struct dwc3 * dwc)1003 void dwc3_debugfs_init(struct dwc3 *dwc)
1004 {
1005 	struct dentry		*root;
1006 
1007 	dwc->regset = kzalloc(sizeof(*dwc->regset), GFP_KERNEL);
1008 	if (!dwc->regset)
1009 		return;
1010 
1011 	dwc->dbg_lsp_select = DWC3_LSP_MUX_UNSELECTED;
1012 
1013 	dwc->regset->regs = dwc3_regs;
1014 	dwc->regset->nregs = ARRAY_SIZE(dwc3_regs);
1015 	dwc->regset->base = dwc->regs - DWC3_GLOBALS_REGS_START;
1016 	dwc->regset->dev = dwc->dev;
1017 
1018 	root = debugfs_create_dir(dev_name(dwc->dev), usb_debug_root);
1019 	dwc->debug_root = root;
1020 	debugfs_create_regset32("regdump", 0444, root, dwc->regset);
1021 	debugfs_create_file("lsp_dump", 0644, root, dwc, &dwc3_lsp_fops);
1022 
1023 	if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE))
1024 		debugfs_create_file("mode", 0644, root, dwc,
1025 				    &dwc3_mode_fops);
1026 
1027 	if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) ||
1028 			IS_ENABLED(CONFIG_USB_DWC3_GADGET)) {
1029 		debugfs_create_file("testmode", 0644, root, dwc,
1030 				&dwc3_testmode_fops);
1031 		debugfs_create_file("link_state", 0644, root, dwc,
1032 				    &dwc3_link_state_fops);
1033 	}
1034 }
1035 
dwc3_debugfs_exit(struct dwc3 * dwc)1036 void dwc3_debugfs_exit(struct dwc3 *dwc)
1037 {
1038 	debugfs_lookup_and_remove(dev_name(dwc->dev), usb_debug_root);
1039 	kfree(dwc->regset);
1040 }
1041