1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
4 * Copyright (c) 2015-2021 The Linux Foundation. All rights reserved.
5 * Copyright (C) 2013 Red Hat
6 * Author: Rob Clark <robdclark@gmail.com>
7 */
8
9 #ifndef _DPU_CRTC_H_
10 #define _DPU_CRTC_H_
11
12 #include <linux/kthread.h>
13 #include <drm/drm_crtc.h>
14 #include "dpu_kms.h"
15 #include "dpu_core_perf.h"
16
17 #define DPU_CRTC_NAME_SIZE 12
18
19 /* define the maximum number of in-flight frame events */
20 #define DPU_CRTC_FRAME_EVENT_SIZE 4
21
22 /**
23 * enum dpu_crtc_client_type: crtc client type
24 * @RT_CLIENT: RealTime client like video/cmd mode display
25 * voting through apps rsc
26 * @NRT_CLIENT: Non-RealTime client like WB display
27 * voting through apps rsc
28 */
29 enum dpu_crtc_client_type {
30 RT_CLIENT,
31 NRT_CLIENT,
32 };
33
34 /**
35 * enum dpu_crtc_smmu_state: smmu state
36 * @ATTACHED: all the context banks are attached.
37 * @DETACHED: all the context banks are detached.
38 * @ATTACH_ALL_REQ: transient state of attaching context banks.
39 * @DETACH_ALL_REQ: transient state of detaching context banks.
40 */
41 enum dpu_crtc_smmu_state {
42 ATTACHED = 0,
43 DETACHED,
44 ATTACH_ALL_REQ,
45 DETACH_ALL_REQ,
46 };
47
48 /**
49 * enum dpu_crtc_smmu_state_transition_type: state transition type
50 * @NONE: no pending state transitions
51 * @PRE_COMMIT: state transitions should be done before processing the commit
52 * @POST_COMMIT: state transitions to be done after processing the commit.
53 */
54 enum dpu_crtc_smmu_state_transition_type {
55 NONE,
56 PRE_COMMIT,
57 POST_COMMIT
58 };
59
60 /**
61 * struct dpu_crtc_smmu_state_data: stores the smmu state and transition type
62 * @state: current state of smmu context banks
63 * @transition_type: transition request type
64 * @transition_error: whether there is error while transitioning the state
65 */
66 struct dpu_crtc_smmu_state_data {
67 uint32_t state;
68 uint32_t transition_type;
69 uint32_t transition_error;
70 };
71
72 /**
73 * enum dpu_crtc_crc_source: CRC source
74 * @DPU_CRTC_CRC_SOURCE_NONE: no source set
75 * @DPU_CRTC_CRC_SOURCE_LAYER_MIXER: CRC in layer mixer
76 * @DPU_CRTC_CRC_SOURCE_ENCODER: CRC in encoder
77 * @DPU_CRTC_CRC_SOURCE_INVALID: Invalid source
78 */
79 enum dpu_crtc_crc_source {
80 DPU_CRTC_CRC_SOURCE_NONE = 0,
81 DPU_CRTC_CRC_SOURCE_LAYER_MIXER,
82 DPU_CRTC_CRC_SOURCE_ENCODER,
83 DPU_CRTC_CRC_SOURCE_MAX,
84 DPU_CRTC_CRC_SOURCE_INVALID = -1
85 };
86
87 /**
88 * struct dpu_crtc_mixer: stores the map for each virtual pipeline in the CRTC
89 * @hw_lm: LM HW Driver context
90 * @lm_ctl: CTL Path HW driver context
91 * @lm_dspp: DSPP HW driver context
92 * @mixer_op_mode: mixer blending operation mode
93 * @flush_mask: mixer flush mask for ctl, mixer and pipe
94 */
95 struct dpu_crtc_mixer {
96 struct dpu_hw_mixer *hw_lm;
97 struct dpu_hw_ctl *lm_ctl;
98 struct dpu_hw_dspp *hw_dspp;
99 u32 mixer_op_mode;
100 };
101
102 /**
103 * struct dpu_crtc_frame_event: stores crtc frame event for crtc processing
104 * @work: base work structure
105 * @crtc: Pointer to crtc handling this event
106 * @list: event list
107 * @ts: timestamp at queue entry
108 * @event: event identifier
109 */
110 struct dpu_crtc_frame_event {
111 struct kthread_work work;
112 struct drm_crtc *crtc;
113 struct list_head list;
114 ktime_t ts;
115 u32 event;
116 };
117
118 /*
119 * Maximum number of free event structures to cache
120 */
121 #define DPU_CRTC_MAX_EVENT_COUNT 16
122
123 /**
124 * struct dpu_crtc - virtualized CRTC data structure
125 * @base : Base drm crtc structure
126 * @name : ASCII description of this crtc
127 * @event : Pointer to last received drm vblank event. If there is a
128 * pending vblank event, this will be non-null.
129 * @vsync_count : Running count of received vsync events
130 * @drm_requested_vblank : Whether vblanks have been enabled in the encoder
131 * @property_info : Opaque structure for generic property support
132 * @property_defaults : Array of default values for generic property support
133 * @vblank_cb_count : count of vblank callback since last reset
134 * @play_count : frame count between crtc enable and disable
135 * @vblank_cb_time : ktime at vblank count reset
136 * @enabled : whether the DPU CRTC is currently enabled. updated in the
137 * commit-thread, not state-swap time which is earlier, so
138 * safe to make decisions on during VBLANK on/off work
139 * @feature_list : list of color processing features supported on a crtc
140 * @active_list : list of color processing features are active
141 * @dirty_list : list of color processing features are dirty
142 * @ad_dirty: list containing ad properties that are dirty
143 * @ad_active: list containing ad properties that are active
144 * @frame_pending : Whether or not an update is pending
145 * @frame_events : static allocation of in-flight frame events
146 * @frame_event_list : available frame event list
147 * @spin_lock : spin lock for frame event, transaction status, etc...
148 * @frame_done_comp : for frame_event_done synchronization
149 * @event_thread : Pointer to event handler thread
150 * @event_worker : Event worker queue
151 * @event_lock : Spinlock around event handling code
152 * @phandle: Pointer to power handler
153 * @cur_perf : current performance committed to clock/bandwidth driver
154 * @crc_source : CRC source
155 */
156 struct dpu_crtc {
157 struct drm_crtc base;
158 char name[DPU_CRTC_NAME_SIZE];
159
160 struct drm_pending_vblank_event *event;
161 u32 vsync_count;
162
163 u32 vblank_cb_count;
164 u64 play_count;
165 ktime_t vblank_cb_time;
166 bool enabled;
167
168 struct list_head feature_list;
169 struct list_head active_list;
170 struct list_head dirty_list;
171 struct list_head ad_dirty;
172 struct list_head ad_active;
173
174 atomic_t frame_pending;
175 struct dpu_crtc_frame_event frame_events[DPU_CRTC_FRAME_EVENT_SIZE];
176 struct list_head frame_event_list;
177 spinlock_t spin_lock;
178 struct completion frame_done_comp;
179
180 /* for handling internal event thread */
181 spinlock_t event_lock;
182
183 struct dpu_core_perf_params cur_perf;
184
185 struct dpu_crtc_smmu_state_data smmu_state;
186 };
187
188 #define to_dpu_crtc(x) container_of(x, struct dpu_crtc, base)
189
190 /**
191 * struct dpu_crtc_state - dpu container for atomic crtc state
192 * @base: Base drm crtc state structure
193 * @bw_control : true if bw/clk controlled by core bw/clk properties
194 * @bw_split_vote : true if bw controlled by llcc/dram bw properties
195 * @lm_bounds : LM boundaries based on current mode full resolution, no ROI.
196 * Origin top left of CRTC.
197 * @property_state: Local storage for msm_prop properties
198 * @property_values: Current crtc property values
199 * @input_fence_timeout_ns : Cached input fence timeout, in ns
200 * @new_perf: new performance state being requested
201 * @num_mixers : Number of mixers in use
202 * @mixers : List of active mixers
203 * @num_ctls : Number of ctl paths in use
204 * @hw_ctls : List of active ctl paths
205 * @crc_source : CRC source
206 * @crc_frame_skip_count: Number of frames skipped before getting CRC
207 */
208 struct dpu_crtc_state {
209 struct drm_crtc_state base;
210
211 bool bw_control;
212 bool bw_split_vote;
213 struct drm_rect lm_bounds[CRTC_DUAL_MIXERS];
214
215 uint64_t input_fence_timeout_ns;
216
217 struct dpu_core_perf_params new_perf;
218
219 /* HW Resources reserved for the crtc */
220 u32 num_mixers;
221 struct dpu_crtc_mixer mixers[CRTC_DUAL_MIXERS];
222
223 u32 num_ctls;
224 struct dpu_hw_ctl *hw_ctls[CRTC_DUAL_MIXERS];
225
226 enum dpu_crtc_crc_source crc_source;
227 int crc_frame_skip_count;
228 };
229
230 #define to_dpu_crtc_state(x) \
231 container_of(x, struct dpu_crtc_state, base)
232
233 /**
234 * dpu_crtc_frame_pending - retun the number of pending frames
235 * @crtc: Pointer to drm crtc object
236 */
dpu_crtc_frame_pending(struct drm_crtc * crtc)237 static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc)
238 {
239 return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : -EINVAL;
240 }
241
242 /**
243 * dpu_crtc_vblank - enable or disable vblanks for this crtc
244 * @crtc: Pointer to drm crtc object
245 * @en: true to enable vblanks, false to disable
246 */
247 int dpu_crtc_vblank(struct drm_crtc *crtc, bool en);
248
249 /**
250 * dpu_crtc_vblank_callback - called on vblank irq, issues completion events
251 * @crtc: Pointer to drm crtc object
252 */
253 void dpu_crtc_vblank_callback(struct drm_crtc *crtc);
254
255 /**
256 * dpu_crtc_commit_kickoff - trigger kickoff of the commit for this crtc
257 * @crtc: Pointer to drm crtc object
258 */
259 void dpu_crtc_commit_kickoff(struct drm_crtc *crtc);
260
261 /**
262 * dpu_crtc_complete_commit - callback signalling completion of current commit
263 * @crtc: Pointer to drm crtc object
264 */
265 void dpu_crtc_complete_commit(struct drm_crtc *crtc);
266
267 /**
268 * dpu_crtc_init - create a new crtc object
269 * @dev: dpu device
270 * @plane: base plane
271 * @cursor: cursor plane
272 * @Return: new crtc object or error
273 */
274 struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane,
275 struct drm_plane *cursor);
276
277 /**
278 * dpu_crtc_register_custom_event - api for enabling/disabling crtc event
279 * @kms: Pointer to dpu_kms
280 * @crtc_drm: Pointer to crtc object
281 * @event: Event that client is interested
282 * @en: Flag to enable/disable the event
283 */
284 int dpu_crtc_register_custom_event(struct dpu_kms *kms,
285 struct drm_crtc *crtc_drm, u32 event, bool en);
286
287 /**
288 * dpu_crtc_get_intf_mode - get interface mode of the given crtc
289 * @crtc: Pointert to crtc
290 */
291 enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc);
292
293 /**
294 * dpu_crtc_get_client_type - check the crtc type- rt, nrt etc.
295 * @crtc: Pointer to crtc
296 */
dpu_crtc_get_client_type(struct drm_crtc * crtc)297 static inline enum dpu_crtc_client_type dpu_crtc_get_client_type(
298 struct drm_crtc *crtc)
299 {
300 return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT;
301 }
302
303 #endif /* _DPU_CRTC_H_ */
304