1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25 #include <linux/delay.h>
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/vga_switcheroo.h>
30 #include <linux/mmu_notifier.h>
31 #include <linux/dynamic_debug.h>
32
33 #include <drm/drm_aperture.h>
34 #include <drm/drm_crtc_helper.h>
35 #include <drm/drm_drv.h>
36 #include <drm/drm_gem_ttm_helper.h>
37 #include <drm/drm_ioctl.h>
38 #include <drm/drm_vblank.h>
39
40 #include <core/gpuobj.h>
41 #include <core/option.h>
42 #include <core/pci.h>
43 #include <core/tegra.h>
44
45 #include <nvif/driver.h>
46 #include <nvif/fifo.h>
47 #include <nvif/push006c.h>
48 #include <nvif/user.h>
49
50 #include <nvif/class.h>
51 #include <nvif/cl0002.h>
52 #include <nvif/cla06f.h>
53
54 #include "nouveau_drv.h"
55 #include "nouveau_dma.h"
56 #include "nouveau_ttm.h"
57 #include "nouveau_gem.h"
58 #include "nouveau_vga.h"
59 #include "nouveau_led.h"
60 #include "nouveau_hwmon.h"
61 #include "nouveau_acpi.h"
62 #include "nouveau_bios.h"
63 #include "nouveau_ioctl.h"
64 #include "nouveau_abi16.h"
65 #include "nouveau_fbcon.h"
66 #include "nouveau_fence.h"
67 #include "nouveau_debugfs.h"
68 #include "nouveau_usif.h"
69 #include "nouveau_connector.h"
70 #include "nouveau_platform.h"
71 #include "nouveau_svm.h"
72 #include "nouveau_dmem.h"
73
74 DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
75 "DRM_UT_CORE",
76 "DRM_UT_DRIVER",
77 "DRM_UT_KMS",
78 "DRM_UT_PRIME",
79 "DRM_UT_ATOMIC",
80 "DRM_UT_VBL",
81 "DRM_UT_STATE",
82 "DRM_UT_LEASE",
83 "DRM_UT_DP",
84 "DRM_UT_DRMRES");
85
86 MODULE_PARM_DESC(config, "option string to pass to driver core");
87 static char *nouveau_config;
88 module_param_named(config, nouveau_config, charp, 0400);
89
90 MODULE_PARM_DESC(debug, "debug string to pass to driver core");
91 static char *nouveau_debug;
92 module_param_named(debug, nouveau_debug, charp, 0400);
93
94 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
95 static int nouveau_noaccel = 0;
96 module_param_named(noaccel, nouveau_noaccel, int, 0400);
97
98 MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
99 "0 = disabled, 1 = enabled, 2 = headless)");
100 int nouveau_modeset = -1;
101 module_param_named(modeset, nouveau_modeset, int, 0400);
102
103 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
104 static int nouveau_atomic = 0;
105 module_param_named(atomic, nouveau_atomic, int, 0400);
106
107 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
108 static int nouveau_runtime_pm = -1;
109 module_param_named(runpm, nouveau_runtime_pm, int, 0400);
110
111 static struct drm_driver driver_stub;
112 static struct drm_driver driver_pci;
113 static struct drm_driver driver_platform;
114
115 static u64
nouveau_pci_name(struct pci_dev * pdev)116 nouveau_pci_name(struct pci_dev *pdev)
117 {
118 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
119 name |= pdev->bus->number << 16;
120 name |= PCI_SLOT(pdev->devfn) << 8;
121 return name | PCI_FUNC(pdev->devfn);
122 }
123
124 static u64
nouveau_platform_name(struct platform_device * platformdev)125 nouveau_platform_name(struct platform_device *platformdev)
126 {
127 return platformdev->id;
128 }
129
130 static u64
nouveau_name(struct drm_device * dev)131 nouveau_name(struct drm_device *dev)
132 {
133 if (dev_is_pci(dev->dev))
134 return nouveau_pci_name(to_pci_dev(dev->dev));
135 else
136 return nouveau_platform_name(to_platform_device(dev->dev));
137 }
138
139 static inline bool
nouveau_cli_work_ready(struct dma_fence * fence)140 nouveau_cli_work_ready(struct dma_fence *fence)
141 {
142 bool ret = true;
143
144 spin_lock_irq(fence->lock);
145 if (!dma_fence_is_signaled_locked(fence))
146 ret = false;
147 spin_unlock_irq(fence->lock);
148
149 if (ret == true)
150 dma_fence_put(fence);
151 return ret;
152 }
153
154 static void
nouveau_cli_work(struct work_struct * w)155 nouveau_cli_work(struct work_struct *w)
156 {
157 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
158 struct nouveau_cli_work *work, *wtmp;
159 mutex_lock(&cli->lock);
160 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
161 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
162 list_del(&work->head);
163 work->func(work);
164 }
165 }
166 mutex_unlock(&cli->lock);
167 }
168
169 static void
nouveau_cli_work_fence(struct dma_fence * fence,struct dma_fence_cb * cb)170 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
171 {
172 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
173 schedule_work(&work->cli->work);
174 }
175
176 void
nouveau_cli_work_queue(struct nouveau_cli * cli,struct dma_fence * fence,struct nouveau_cli_work * work)177 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
178 struct nouveau_cli_work *work)
179 {
180 work->fence = dma_fence_get(fence);
181 work->cli = cli;
182 mutex_lock(&cli->lock);
183 list_add_tail(&work->head, &cli->worker);
184 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
185 nouveau_cli_work_fence(fence, &work->cb);
186 mutex_unlock(&cli->lock);
187 }
188
189 static void
nouveau_cli_fini(struct nouveau_cli * cli)190 nouveau_cli_fini(struct nouveau_cli *cli)
191 {
192 /* All our channels are dead now, which means all the fences they
193 * own are signalled, and all callback functions have been called.
194 *
195 * So, after flushing the workqueue, there should be nothing left.
196 */
197 flush_work(&cli->work);
198 WARN_ON(!list_empty(&cli->worker));
199
200 usif_client_fini(cli);
201 nouveau_vmm_fini(&cli->svm);
202 nouveau_vmm_fini(&cli->vmm);
203 nvif_mmu_dtor(&cli->mmu);
204 nvif_device_dtor(&cli->device);
205 mutex_lock(&cli->drm->master.lock);
206 nvif_client_dtor(&cli->base);
207 mutex_unlock(&cli->drm->master.lock);
208 }
209
210 static int
nouveau_cli_init(struct nouveau_drm * drm,const char * sname,struct nouveau_cli * cli)211 nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
212 struct nouveau_cli *cli)
213 {
214 static const struct nvif_mclass
215 mems[] = {
216 { NVIF_CLASS_MEM_GF100, -1 },
217 { NVIF_CLASS_MEM_NV50 , -1 },
218 { NVIF_CLASS_MEM_NV04 , -1 },
219 {}
220 };
221 static const struct nvif_mclass
222 mmus[] = {
223 { NVIF_CLASS_MMU_GF100, -1 },
224 { NVIF_CLASS_MMU_NV50 , -1 },
225 { NVIF_CLASS_MMU_NV04 , -1 },
226 {}
227 };
228 static const struct nvif_mclass
229 vmms[] = {
230 { NVIF_CLASS_VMM_GP100, -1 },
231 { NVIF_CLASS_VMM_GM200, -1 },
232 { NVIF_CLASS_VMM_GF100, -1 },
233 { NVIF_CLASS_VMM_NV50 , -1 },
234 { NVIF_CLASS_VMM_NV04 , -1 },
235 {}
236 };
237 u64 device = nouveau_name(drm->dev);
238 int ret;
239
240 snprintf(cli->name, sizeof(cli->name), "%s", sname);
241 cli->drm = drm;
242 mutex_init(&cli->mutex);
243 usif_client_init(cli);
244
245 INIT_WORK(&cli->work, nouveau_cli_work);
246 INIT_LIST_HEAD(&cli->worker);
247 mutex_init(&cli->lock);
248
249 if (cli == &drm->master) {
250 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
251 cli->name, device, &cli->base);
252 } else {
253 mutex_lock(&drm->master.lock);
254 ret = nvif_client_ctor(&drm->master.base, cli->name, device,
255 &cli->base);
256 mutex_unlock(&drm->master.lock);
257 }
258 if (ret) {
259 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
260 goto done;
261 }
262
263 ret = nvif_device_ctor(&cli->base.object, "drmDevice", 0, NV_DEVICE,
264 &(struct nv_device_v0) {
265 .device = ~0,
266 .priv = true,
267 }, sizeof(struct nv_device_v0),
268 &cli->device);
269 if (ret) {
270 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
271 goto done;
272 }
273
274 ret = nvif_mclass(&cli->device.object, mmus);
275 if (ret < 0) {
276 NV_PRINTK(err, cli, "No supported MMU class\n");
277 goto done;
278 }
279
280 ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", mmus[ret].oclass,
281 &cli->mmu);
282 if (ret) {
283 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
284 goto done;
285 }
286
287 ret = nvif_mclass(&cli->mmu.object, vmms);
288 if (ret < 0) {
289 NV_PRINTK(err, cli, "No supported VMM class\n");
290 goto done;
291 }
292
293 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
294 if (ret) {
295 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
296 goto done;
297 }
298
299 ret = nvif_mclass(&cli->mmu.object, mems);
300 if (ret < 0) {
301 NV_PRINTK(err, cli, "No supported MEM class\n");
302 goto done;
303 }
304
305 cli->mem = &mems[ret];
306 return 0;
307 done:
308 if (ret)
309 nouveau_cli_fini(cli);
310 return ret;
311 }
312
313 static void
nouveau_accel_ce_fini(struct nouveau_drm * drm)314 nouveau_accel_ce_fini(struct nouveau_drm *drm)
315 {
316 nouveau_channel_idle(drm->cechan);
317 nvif_object_dtor(&drm->ttm.copy);
318 nouveau_channel_del(&drm->cechan);
319 }
320
321 static void
nouveau_accel_ce_init(struct nouveau_drm * drm)322 nouveau_accel_ce_init(struct nouveau_drm *drm)
323 {
324 struct nvif_device *device = &drm->client.device;
325 int ret = 0;
326
327 /* Allocate channel that has access to a (preferably async) copy
328 * engine, to use for TTM buffer moves.
329 */
330 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
331 ret = nouveau_channel_new(drm, device,
332 nvif_fifo_runlist_ce(device), 0,
333 true, &drm->cechan);
334 } else
335 if (device->info.chipset >= 0xa3 &&
336 device->info.chipset != 0xaa &&
337 device->info.chipset != 0xac) {
338 /* Prior to Kepler, there's only a single runlist, so all
339 * engines can be accessed from any channel.
340 *
341 * We still want to use a separate channel though.
342 */
343 ret = nouveau_channel_new(drm, device, NvDmaFB, NvDmaTT, false,
344 &drm->cechan);
345 }
346
347 if (ret)
348 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
349 }
350
351 static void
nouveau_accel_gr_fini(struct nouveau_drm * drm)352 nouveau_accel_gr_fini(struct nouveau_drm *drm)
353 {
354 nouveau_channel_idle(drm->channel);
355 nvif_object_dtor(&drm->ntfy);
356 nvkm_gpuobj_del(&drm->notify);
357 nouveau_channel_del(&drm->channel);
358 }
359
360 static void
nouveau_accel_gr_init(struct nouveau_drm * drm)361 nouveau_accel_gr_init(struct nouveau_drm *drm)
362 {
363 struct nvif_device *device = &drm->client.device;
364 u32 arg0, arg1;
365 int ret;
366
367 if (device->info.family >= NV_DEVICE_INFO_V0_AMPERE)
368 return;
369
370 /* Allocate channel that has access to the graphics engine. */
371 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
372 arg0 = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR);
373 arg1 = 1;
374 } else {
375 arg0 = NvDmaFB;
376 arg1 = NvDmaTT;
377 }
378
379 ret = nouveau_channel_new(drm, device, arg0, arg1, false,
380 &drm->channel);
381 if (ret) {
382 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
383 nouveau_accel_gr_fini(drm);
384 return;
385 }
386
387 /* A SW class is used on pre-NV50 HW to assist with handling the
388 * synchronisation of page flips, as well as to implement fences
389 * on TNT/TNT2 HW that lacks any kind of support in host.
390 */
391 if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) {
392 ret = nvif_object_ctor(&drm->channel->user, "drmNvsw",
393 NVDRM_NVSW, nouveau_abi16_swclass(drm),
394 NULL, 0, &drm->channel->nvsw);
395 if (ret == 0) {
396 struct nvif_push *push = drm->channel->chan.push;
397 ret = PUSH_WAIT(push, 2);
398 if (ret == 0)
399 PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle);
400 }
401
402 if (ret) {
403 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
404 nouveau_accel_gr_fini(drm);
405 return;
406 }
407 }
408
409 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
410 * even if notification is never requested, so, allocate a ctxdma on
411 * any GPU where it's possible we'll end up using M2MF for BO moves.
412 */
413 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
414 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL,
415 &drm->notify);
416 if (ret) {
417 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
418 nouveau_accel_gr_fini(drm);
419 return;
420 }
421
422 ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy",
423 NvNotify0, NV_DMA_IN_MEMORY,
424 &(struct nv_dma_v0) {
425 .target = NV_DMA_V0_TARGET_VRAM,
426 .access = NV_DMA_V0_ACCESS_RDWR,
427 .start = drm->notify->addr,
428 .limit = drm->notify->addr + 31
429 }, sizeof(struct nv_dma_v0),
430 &drm->ntfy);
431 if (ret) {
432 nouveau_accel_gr_fini(drm);
433 return;
434 }
435 }
436 }
437
438 static void
nouveau_accel_fini(struct nouveau_drm * drm)439 nouveau_accel_fini(struct nouveau_drm *drm)
440 {
441 nouveau_accel_ce_fini(drm);
442 nouveau_accel_gr_fini(drm);
443 if (drm->fence)
444 nouveau_fence(drm)->dtor(drm);
445 }
446
447 static void
nouveau_accel_init(struct nouveau_drm * drm)448 nouveau_accel_init(struct nouveau_drm *drm)
449 {
450 struct nvif_device *device = &drm->client.device;
451 struct nvif_sclass *sclass;
452 int ret, i, n;
453
454 if (nouveau_noaccel)
455 return;
456
457 /* Initialise global support for channels, and synchronisation. */
458 ret = nouveau_channels_init(drm);
459 if (ret)
460 return;
461
462 /*XXX: this is crap, but the fence/channel stuff is a little
463 * backwards in some places. this will be fixed.
464 */
465 ret = n = nvif_object_sclass_get(&device->object, &sclass);
466 if (ret < 0)
467 return;
468
469 for (ret = -ENOSYS, i = 0; i < n; i++) {
470 switch (sclass[i].oclass) {
471 case NV03_CHANNEL_DMA:
472 ret = nv04_fence_create(drm);
473 break;
474 case NV10_CHANNEL_DMA:
475 ret = nv10_fence_create(drm);
476 break;
477 case NV17_CHANNEL_DMA:
478 case NV40_CHANNEL_DMA:
479 ret = nv17_fence_create(drm);
480 break;
481 case NV50_CHANNEL_GPFIFO:
482 ret = nv50_fence_create(drm);
483 break;
484 case G82_CHANNEL_GPFIFO:
485 ret = nv84_fence_create(drm);
486 break;
487 case FERMI_CHANNEL_GPFIFO:
488 case KEPLER_CHANNEL_GPFIFO_A:
489 case KEPLER_CHANNEL_GPFIFO_B:
490 case MAXWELL_CHANNEL_GPFIFO_A:
491 case PASCAL_CHANNEL_GPFIFO_A:
492 case VOLTA_CHANNEL_GPFIFO_A:
493 case TURING_CHANNEL_GPFIFO_A:
494 case AMPERE_CHANNEL_GPFIFO_B:
495 ret = nvc0_fence_create(drm);
496 break;
497 default:
498 break;
499 }
500 }
501
502 nvif_object_sclass_put(&sclass);
503 if (ret) {
504 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
505 nouveau_accel_fini(drm);
506 return;
507 }
508
509 /* Volta requires access to a doorbell register for kickoff. */
510 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
511 ret = nvif_user_ctor(device, "drmUsermode");
512 if (ret)
513 return;
514 }
515
516 /* Allocate channels we need to support various functions. */
517 nouveau_accel_gr_init(drm);
518 nouveau_accel_ce_init(drm);
519
520 /* Initialise accelerated TTM buffer moves. */
521 nouveau_bo_move_init(drm);
522 }
523
524 static void __printf(2, 3)
nouveau_drm_errorf(struct nvif_object * object,const char * fmt,...)525 nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...)
526 {
527 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
528 struct va_format vaf;
529 va_list va;
530
531 va_start(va, fmt);
532 vaf.fmt = fmt;
533 vaf.va = &va;
534 NV_ERROR(drm, "%pV", &vaf);
535 va_end(va);
536 }
537
538 static void __printf(2, 3)
nouveau_drm_debugf(struct nvif_object * object,const char * fmt,...)539 nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...)
540 {
541 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
542 struct va_format vaf;
543 va_list va;
544
545 va_start(va, fmt);
546 vaf.fmt = fmt;
547 vaf.va = &va;
548 NV_DEBUG(drm, "%pV", &vaf);
549 va_end(va);
550 }
551
552 static const struct nvif_parent_func
553 nouveau_parent = {
554 .debugf = nouveau_drm_debugf,
555 .errorf = nouveau_drm_errorf,
556 };
557
558 static int
nouveau_drm_device_init(struct drm_device * dev)559 nouveau_drm_device_init(struct drm_device *dev)
560 {
561 struct nouveau_drm *drm;
562 int ret;
563
564 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
565 return -ENOMEM;
566 dev->dev_private = drm;
567 drm->dev = dev;
568
569 nvif_parent_ctor(&nouveau_parent, &drm->parent);
570 drm->master.base.object.parent = &drm->parent;
571
572 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
573 if (ret)
574 goto fail_alloc;
575
576 ret = nouveau_cli_init(drm, "DRM", &drm->client);
577 if (ret)
578 goto fail_master;
579
580 nvxx_client(&drm->client.base)->debug =
581 nvkm_dbgopt(nouveau_debug, "DRM");
582
583 INIT_LIST_HEAD(&drm->clients);
584 mutex_init(&drm->clients_lock);
585 spin_lock_init(&drm->tile.lock);
586
587 /* workaround an odd issue on nvc1 by disabling the device's
588 * nosnoop capability. hopefully won't cause issues until a
589 * better fix is found - assuming there is one...
590 */
591 if (drm->client.device.info.chipset == 0xc1)
592 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
593
594 nouveau_vga_init(drm);
595
596 ret = nouveau_ttm_init(drm);
597 if (ret)
598 goto fail_ttm;
599
600 ret = nouveau_bios_init(dev);
601 if (ret)
602 goto fail_bios;
603
604 nouveau_accel_init(drm);
605
606 ret = nouveau_display_create(dev);
607 if (ret)
608 goto fail_dispctor;
609
610 if (dev->mode_config.num_crtc) {
611 ret = nouveau_display_init(dev, false, false);
612 if (ret)
613 goto fail_dispinit;
614 }
615
616 nouveau_debugfs_init(drm);
617 nouveau_hwmon_init(dev);
618 nouveau_svm_init(drm);
619 nouveau_dmem_init(drm);
620 nouveau_fbcon_init(dev);
621 nouveau_led_init(dev);
622
623 if (nouveau_pmops_runtime()) {
624 pm_runtime_use_autosuspend(dev->dev);
625 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
626 pm_runtime_set_active(dev->dev);
627 pm_runtime_allow(dev->dev);
628 pm_runtime_mark_last_busy(dev->dev);
629 pm_runtime_put(dev->dev);
630 }
631
632 return 0;
633
634 fail_dispinit:
635 nouveau_display_destroy(dev);
636 fail_dispctor:
637 nouveau_accel_fini(drm);
638 nouveau_bios_takedown(dev);
639 fail_bios:
640 nouveau_ttm_fini(drm);
641 fail_ttm:
642 nouveau_vga_fini(drm);
643 nouveau_cli_fini(&drm->client);
644 fail_master:
645 nouveau_cli_fini(&drm->master);
646 fail_alloc:
647 nvif_parent_dtor(&drm->parent);
648 kfree(drm);
649 return ret;
650 }
651
652 static void
nouveau_drm_device_fini(struct drm_device * dev)653 nouveau_drm_device_fini(struct drm_device *dev)
654 {
655 struct nouveau_cli *cli, *temp_cli;
656 struct nouveau_drm *drm = nouveau_drm(dev);
657
658 if (nouveau_pmops_runtime()) {
659 pm_runtime_get_sync(dev->dev);
660 pm_runtime_forbid(dev->dev);
661 }
662
663 nouveau_led_fini(dev);
664 nouveau_fbcon_fini(dev);
665 nouveau_dmem_fini(drm);
666 nouveau_svm_fini(drm);
667 nouveau_hwmon_fini(dev);
668 nouveau_debugfs_fini(drm);
669
670 if (dev->mode_config.num_crtc)
671 nouveau_display_fini(dev, false, false);
672 nouveau_display_destroy(dev);
673
674 nouveau_accel_fini(drm);
675 nouveau_bios_takedown(dev);
676
677 nouveau_ttm_fini(drm);
678 nouveau_vga_fini(drm);
679
680 /*
681 * There may be existing clients from as-yet unclosed files. For now,
682 * clean them up here rather than deferring until the file is closed,
683 * but this likely not correct if we want to support hot-unplugging
684 * properly.
685 */
686 mutex_lock(&drm->clients_lock);
687 list_for_each_entry_safe(cli, temp_cli, &drm->clients, head) {
688 list_del(&cli->head);
689 mutex_lock(&cli->mutex);
690 if (cli->abi16)
691 nouveau_abi16_fini(cli->abi16);
692 mutex_unlock(&cli->mutex);
693 nouveau_cli_fini(cli);
694 kfree(cli);
695 }
696 mutex_unlock(&drm->clients_lock);
697
698 nouveau_cli_fini(&drm->client);
699 nouveau_cli_fini(&drm->master);
700 nvif_parent_dtor(&drm->parent);
701 mutex_destroy(&drm->clients_lock);
702 kfree(drm);
703 }
704
705 /*
706 * On some Intel PCIe bridge controllers doing a
707 * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear.
708 * Skipping the intermediate D3hot step seems to make it work again. This is
709 * probably caused by not meeting the expectation the involved AML code has
710 * when the GPU is put into D3hot state before invoking it.
711 *
712 * This leads to various manifestations of this issue:
713 * - AML code execution to power on the GPU hits an infinite loop (as the
714 * code waits on device memory to change).
715 * - kernel crashes, as all PCI reads return -1, which most code isn't able
716 * to handle well enough.
717 *
718 * In all cases dmesg will contain at least one line like this:
719 * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3'
720 * followed by a lot of nouveau timeouts.
721 *
722 * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not
723 * documented PCI config space register 0x248 of the Intel PCIe bridge
724 * controller (0x1901) in order to change the state of the PCIe link between
725 * the PCIe port and the GPU. There are alternative code paths using other
726 * registers, which seem to work fine (executed pre Windows 8):
727 * - 0xbc bit 0x20 (publicly available documentation claims 'reserved')
728 * - 0xb0 bit 0x10 (link disable)
729 * Changing the conditions inside the firmware by poking into the relevant
730 * addresses does resolve the issue, but it seemed to be ACPI private memory
731 * and not any device accessible memory at all, so there is no portable way of
732 * changing the conditions.
733 * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared.
734 *
735 * The only systems where this behavior can be seen are hybrid graphics laptops
736 * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether
737 * this issue only occurs in combination with listed Intel PCIe bridge
738 * controllers and the mentioned GPUs or other devices as well.
739 *
740 * documentation on the PCIe bridge controller can be found in the
741 * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2"
742 * Section "12 PCI Express* Controller (x16) Registers"
743 */
744
quirk_broken_nv_runpm(struct pci_dev * pdev)745 static void quirk_broken_nv_runpm(struct pci_dev *pdev)
746 {
747 struct drm_device *dev = pci_get_drvdata(pdev);
748 struct nouveau_drm *drm = nouveau_drm(dev);
749 struct pci_dev *bridge = pci_upstream_bridge(pdev);
750
751 if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL)
752 return;
753
754 switch (bridge->device) {
755 case 0x1901:
756 drm->old_pm_cap = pdev->pm_cap;
757 pdev->pm_cap = 0;
758 NV_INFO(drm, "Disabling PCI power management to avoid bug\n");
759 break;
760 }
761 }
762
nouveau_drm_probe(struct pci_dev * pdev,const struct pci_device_id * pent)763 static int nouveau_drm_probe(struct pci_dev *pdev,
764 const struct pci_device_id *pent)
765 {
766 struct nvkm_device *device;
767 struct drm_device *drm_dev;
768 int ret;
769
770 if (vga_switcheroo_client_probe_defer(pdev))
771 return -EPROBE_DEFER;
772
773 /* We need to check that the chipset is supported before booting
774 * fbdev off the hardware, as there's no way to put it back.
775 */
776 ret = nvkm_device_pci_new(pdev, nouveau_config, "error",
777 true, false, 0, &device);
778 if (ret)
779 return ret;
780
781 nvkm_device_del(&device);
782
783 /* Remove conflicting drivers (vesafb, efifb etc). */
784 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &driver_pci);
785 if (ret)
786 return ret;
787
788 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
789 true, true, ~0ULL, &device);
790 if (ret)
791 return ret;
792
793 pci_set_master(pdev);
794
795 if (nouveau_atomic)
796 driver_pci.driver_features |= DRIVER_ATOMIC;
797
798 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
799 if (IS_ERR(drm_dev)) {
800 ret = PTR_ERR(drm_dev);
801 goto fail_nvkm;
802 }
803
804 ret = pci_enable_device(pdev);
805 if (ret)
806 goto fail_drm;
807
808 pci_set_drvdata(pdev, drm_dev);
809
810 ret = nouveau_drm_device_init(drm_dev);
811 if (ret)
812 goto fail_pci;
813
814 ret = drm_dev_register(drm_dev, pent->driver_data);
815 if (ret)
816 goto fail_drm_dev_init;
817
818 quirk_broken_nv_runpm(pdev);
819 return 0;
820
821 fail_drm_dev_init:
822 nouveau_drm_device_fini(drm_dev);
823 fail_pci:
824 pci_disable_device(pdev);
825 fail_drm:
826 drm_dev_put(drm_dev);
827 fail_nvkm:
828 nvkm_device_del(&device);
829 return ret;
830 }
831
832 void
nouveau_drm_device_remove(struct drm_device * dev)833 nouveau_drm_device_remove(struct drm_device *dev)
834 {
835 struct nouveau_drm *drm = nouveau_drm(dev);
836 struct nvkm_client *client;
837 struct nvkm_device *device;
838
839 drm_dev_unplug(dev);
840
841 client = nvxx_client(&drm->client.base);
842 device = nvkm_device_find(client->device);
843
844 nouveau_drm_device_fini(dev);
845 drm_dev_put(dev);
846 nvkm_device_del(&device);
847 }
848
849 static void
nouveau_drm_remove(struct pci_dev * pdev)850 nouveau_drm_remove(struct pci_dev *pdev)
851 {
852 struct drm_device *dev = pci_get_drvdata(pdev);
853 struct nouveau_drm *drm = nouveau_drm(dev);
854
855 /* revert our workaround */
856 if (drm->old_pm_cap)
857 pdev->pm_cap = drm->old_pm_cap;
858 nouveau_drm_device_remove(dev);
859 pci_disable_device(pdev);
860 }
861
862 static int
nouveau_do_suspend(struct drm_device * dev,bool runtime)863 nouveau_do_suspend(struct drm_device *dev, bool runtime)
864 {
865 struct nouveau_drm *drm = nouveau_drm(dev);
866 struct ttm_resource_manager *man;
867 int ret;
868
869 nouveau_svm_suspend(drm);
870 nouveau_dmem_suspend(drm);
871 nouveau_led_suspend(dev);
872
873 if (dev->mode_config.num_crtc) {
874 NV_DEBUG(drm, "suspending console...\n");
875 nouveau_fbcon_set_suspend(dev, 1);
876 NV_DEBUG(drm, "suspending display...\n");
877 ret = nouveau_display_suspend(dev, runtime);
878 if (ret)
879 return ret;
880 }
881
882 NV_DEBUG(drm, "evicting buffers...\n");
883
884 man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM);
885 ttm_resource_manager_evict_all(&drm->ttm.bdev, man);
886
887 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
888 if (drm->cechan) {
889 ret = nouveau_channel_idle(drm->cechan);
890 if (ret)
891 goto fail_display;
892 }
893
894 if (drm->channel) {
895 ret = nouveau_channel_idle(drm->channel);
896 if (ret)
897 goto fail_display;
898 }
899
900 NV_DEBUG(drm, "suspending fence...\n");
901 if (drm->fence && nouveau_fence(drm)->suspend) {
902 if (!nouveau_fence(drm)->suspend(drm)) {
903 ret = -ENOMEM;
904 goto fail_display;
905 }
906 }
907
908 NV_DEBUG(drm, "suspending object tree...\n");
909 ret = nvif_client_suspend(&drm->master.base);
910 if (ret)
911 goto fail_client;
912
913 return 0;
914
915 fail_client:
916 if (drm->fence && nouveau_fence(drm)->resume)
917 nouveau_fence(drm)->resume(drm);
918
919 fail_display:
920 if (dev->mode_config.num_crtc) {
921 NV_DEBUG(drm, "resuming display...\n");
922 nouveau_display_resume(dev, runtime);
923 }
924 return ret;
925 }
926
927 static int
nouveau_do_resume(struct drm_device * dev,bool runtime)928 nouveau_do_resume(struct drm_device *dev, bool runtime)
929 {
930 int ret = 0;
931 struct nouveau_drm *drm = nouveau_drm(dev);
932
933 NV_DEBUG(drm, "resuming object tree...\n");
934 ret = nvif_client_resume(&drm->master.base);
935 if (ret) {
936 NV_ERROR(drm, "Client resume failed with error: %d\n", ret);
937 return ret;
938 }
939
940 NV_DEBUG(drm, "resuming fence...\n");
941 if (drm->fence && nouveau_fence(drm)->resume)
942 nouveau_fence(drm)->resume(drm);
943
944 nouveau_run_vbios_init(dev);
945
946 if (dev->mode_config.num_crtc) {
947 NV_DEBUG(drm, "resuming display...\n");
948 nouveau_display_resume(dev, runtime);
949 NV_DEBUG(drm, "resuming console...\n");
950 nouveau_fbcon_set_suspend(dev, 0);
951 }
952
953 nouveau_led_resume(dev);
954 nouveau_dmem_resume(drm);
955 nouveau_svm_resume(drm);
956 return 0;
957 }
958
959 int
nouveau_pmops_suspend(struct device * dev)960 nouveau_pmops_suspend(struct device *dev)
961 {
962 struct pci_dev *pdev = to_pci_dev(dev);
963 struct drm_device *drm_dev = pci_get_drvdata(pdev);
964 int ret;
965
966 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
967 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
968 return 0;
969
970 ret = nouveau_do_suspend(drm_dev, false);
971 if (ret)
972 return ret;
973
974 pci_save_state(pdev);
975 pci_disable_device(pdev);
976 pci_set_power_state(pdev, PCI_D3hot);
977 udelay(200);
978 return 0;
979 }
980
981 int
nouveau_pmops_resume(struct device * dev)982 nouveau_pmops_resume(struct device *dev)
983 {
984 struct pci_dev *pdev = to_pci_dev(dev);
985 struct drm_device *drm_dev = pci_get_drvdata(pdev);
986 int ret;
987
988 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
989 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
990 return 0;
991
992 pci_set_power_state(pdev, PCI_D0);
993 pci_restore_state(pdev);
994 ret = pci_enable_device(pdev);
995 if (ret)
996 return ret;
997 pci_set_master(pdev);
998
999 ret = nouveau_do_resume(drm_dev, false);
1000
1001 /* Monitors may have been connected / disconnected during suspend */
1002 nouveau_display_hpd_resume(drm_dev);
1003
1004 return ret;
1005 }
1006
1007 static int
nouveau_pmops_freeze(struct device * dev)1008 nouveau_pmops_freeze(struct device *dev)
1009 {
1010 struct pci_dev *pdev = to_pci_dev(dev);
1011 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1012 return nouveau_do_suspend(drm_dev, false);
1013 }
1014
1015 static int
nouveau_pmops_thaw(struct device * dev)1016 nouveau_pmops_thaw(struct device *dev)
1017 {
1018 struct pci_dev *pdev = to_pci_dev(dev);
1019 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1020 return nouveau_do_resume(drm_dev, false);
1021 }
1022
1023 bool
nouveau_pmops_runtime(void)1024 nouveau_pmops_runtime(void)
1025 {
1026 if (nouveau_runtime_pm == -1)
1027 return nouveau_is_optimus() || nouveau_is_v1_dsm();
1028 return nouveau_runtime_pm == 1;
1029 }
1030
1031 static int
nouveau_pmops_runtime_suspend(struct device * dev)1032 nouveau_pmops_runtime_suspend(struct device *dev)
1033 {
1034 struct pci_dev *pdev = to_pci_dev(dev);
1035 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1036 int ret;
1037
1038 if (!nouveau_pmops_runtime()) {
1039 pm_runtime_forbid(dev);
1040 return -EBUSY;
1041 }
1042
1043 nouveau_switcheroo_optimus_dsm();
1044 ret = nouveau_do_suspend(drm_dev, true);
1045 pci_save_state(pdev);
1046 pci_disable_device(pdev);
1047 pci_ignore_hotplug(pdev);
1048 pci_set_power_state(pdev, PCI_D3cold);
1049 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
1050 return ret;
1051 }
1052
1053 static int
nouveau_pmops_runtime_resume(struct device * dev)1054 nouveau_pmops_runtime_resume(struct device *dev)
1055 {
1056 struct pci_dev *pdev = to_pci_dev(dev);
1057 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1058 struct nouveau_drm *drm = nouveau_drm(drm_dev);
1059 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
1060 int ret;
1061
1062 if (!nouveau_pmops_runtime()) {
1063 pm_runtime_forbid(dev);
1064 return -EBUSY;
1065 }
1066
1067 pci_set_power_state(pdev, PCI_D0);
1068 pci_restore_state(pdev);
1069 ret = pci_enable_device(pdev);
1070 if (ret)
1071 return ret;
1072 pci_set_master(pdev);
1073
1074 ret = nouveau_do_resume(drm_dev, true);
1075 if (ret) {
1076 NV_ERROR(drm, "resume failed with: %d\n", ret);
1077 return ret;
1078 }
1079
1080 /* do magic */
1081 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
1082 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
1083
1084 /* Monitors may have been connected / disconnected during suspend */
1085 nouveau_display_hpd_resume(drm_dev);
1086
1087 return ret;
1088 }
1089
1090 static int
nouveau_pmops_runtime_idle(struct device * dev)1091 nouveau_pmops_runtime_idle(struct device *dev)
1092 {
1093 if (!nouveau_pmops_runtime()) {
1094 pm_runtime_forbid(dev);
1095 return -EBUSY;
1096 }
1097
1098 pm_runtime_mark_last_busy(dev);
1099 pm_runtime_autosuspend(dev);
1100 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
1101 return 1;
1102 }
1103
1104 static int
nouveau_drm_open(struct drm_device * dev,struct drm_file * fpriv)1105 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
1106 {
1107 struct nouveau_drm *drm = nouveau_drm(dev);
1108 struct nouveau_cli *cli;
1109 char name[32], tmpname[TASK_COMM_LEN];
1110 int ret;
1111
1112 /* need to bring up power immediately if opening device */
1113 ret = pm_runtime_get_sync(dev->dev);
1114 if (ret < 0 && ret != -EACCES) {
1115 pm_runtime_put_autosuspend(dev->dev);
1116 return ret;
1117 }
1118
1119 get_task_comm(tmpname, current);
1120 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
1121
1122 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
1123 ret = -ENOMEM;
1124 goto done;
1125 }
1126
1127 ret = nouveau_cli_init(drm, name, cli);
1128 if (ret)
1129 goto done;
1130
1131 fpriv->driver_priv = cli;
1132
1133 mutex_lock(&drm->clients_lock);
1134 list_add(&cli->head, &drm->clients);
1135 mutex_unlock(&drm->clients_lock);
1136
1137 done:
1138 if (ret && cli) {
1139 nouveau_cli_fini(cli);
1140 kfree(cli);
1141 }
1142
1143 pm_runtime_mark_last_busy(dev->dev);
1144 pm_runtime_put_autosuspend(dev->dev);
1145 return ret;
1146 }
1147
1148 static void
nouveau_drm_postclose(struct drm_device * dev,struct drm_file * fpriv)1149 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
1150 {
1151 struct nouveau_cli *cli = nouveau_cli(fpriv);
1152 struct nouveau_drm *drm = nouveau_drm(dev);
1153 int dev_index;
1154
1155 /*
1156 * The device is gone, and as it currently stands all clients are
1157 * cleaned up in the removal codepath. In the future this may change
1158 * so that we can support hot-unplugging, but for now we immediately
1159 * return to avoid a double-free situation.
1160 */
1161 if (!drm_dev_enter(dev, &dev_index))
1162 return;
1163
1164 pm_runtime_get_sync(dev->dev);
1165
1166 mutex_lock(&cli->mutex);
1167 if (cli->abi16)
1168 nouveau_abi16_fini(cli->abi16);
1169 mutex_unlock(&cli->mutex);
1170
1171 mutex_lock(&drm->clients_lock);
1172 list_del(&cli->head);
1173 mutex_unlock(&drm->clients_lock);
1174
1175 nouveau_cli_fini(cli);
1176 kfree(cli);
1177 pm_runtime_mark_last_busy(dev->dev);
1178 pm_runtime_put_autosuspend(dev->dev);
1179 drm_dev_exit(dev_index);
1180 }
1181
1182 static const struct drm_ioctl_desc
1183 nouveau_ioctls[] = {
1184 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW),
1185 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1186 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW),
1187 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW),
1188 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW),
1189 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW),
1190 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW),
1191 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW),
1192 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW),
1193 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW),
1194 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW),
1195 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW),
1196 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW),
1197 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW),
1198 };
1199
1200 long
nouveau_drm_ioctl(struct file * file,unsigned int cmd,unsigned long arg)1201 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1202 {
1203 struct drm_file *filp = file->private_data;
1204 struct drm_device *dev = filp->minor->dev;
1205 long ret;
1206
1207 ret = pm_runtime_get_sync(dev->dev);
1208 if (ret < 0 && ret != -EACCES) {
1209 pm_runtime_put_autosuspend(dev->dev);
1210 return ret;
1211 }
1212
1213 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1214 case DRM_NOUVEAU_NVIF:
1215 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1216 break;
1217 default:
1218 ret = drm_ioctl(file, cmd, arg);
1219 break;
1220 }
1221
1222 pm_runtime_mark_last_busy(dev->dev);
1223 pm_runtime_put_autosuspend(dev->dev);
1224 return ret;
1225 }
1226
1227 static const struct file_operations
1228 nouveau_driver_fops = {
1229 .owner = THIS_MODULE,
1230 .open = drm_open,
1231 .release = drm_release,
1232 .unlocked_ioctl = nouveau_drm_ioctl,
1233 .mmap = drm_gem_mmap,
1234 .poll = drm_poll,
1235 .read = drm_read,
1236 #if defined(CONFIG_COMPAT)
1237 .compat_ioctl = nouveau_compat_ioctl,
1238 #endif
1239 .llseek = noop_llseek,
1240 };
1241
1242 static struct drm_driver
1243 driver_stub = {
1244 .driver_features =
1245 DRIVER_GEM | DRIVER_MODESET | DRIVER_RENDER
1246 #if defined(CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT)
1247 | DRIVER_KMS_LEGACY_CONTEXT
1248 #endif
1249 ,
1250
1251 .open = nouveau_drm_open,
1252 .postclose = nouveau_drm_postclose,
1253 .lastclose = nouveau_vga_lastclose,
1254
1255 #if defined(CONFIG_DEBUG_FS)
1256 .debugfs_init = nouveau_drm_debugfs_init,
1257 #endif
1258
1259 .ioctls = nouveau_ioctls,
1260 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1261 .fops = &nouveau_driver_fops,
1262
1263 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1264 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1265 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1266 .gem_prime_mmap = drm_gem_prime_mmap,
1267
1268 .dumb_create = nouveau_display_dumb_create,
1269 .dumb_map_offset = drm_gem_ttm_dumb_map_offset,
1270
1271 .name = DRIVER_NAME,
1272 .desc = DRIVER_DESC,
1273 #ifdef GIT_REVISION
1274 .date = GIT_REVISION,
1275 #else
1276 .date = DRIVER_DATE,
1277 #endif
1278 .major = DRIVER_MAJOR,
1279 .minor = DRIVER_MINOR,
1280 .patchlevel = DRIVER_PATCHLEVEL,
1281 };
1282
1283 static struct pci_device_id
1284 nouveau_drm_pci_table[] = {
1285 {
1286 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1287 .class = PCI_BASE_CLASS_DISPLAY << 16,
1288 .class_mask = 0xff << 16,
1289 },
1290 {
1291 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1292 .class = PCI_BASE_CLASS_DISPLAY << 16,
1293 .class_mask = 0xff << 16,
1294 },
1295 {}
1296 };
1297
nouveau_display_options(void)1298 static void nouveau_display_options(void)
1299 {
1300 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1301
1302 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1303 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1304 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1305 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1306 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1307 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1308 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1309 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1310 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1311 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1312 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
1313 }
1314
1315 static const struct dev_pm_ops nouveau_pm_ops = {
1316 .suspend = nouveau_pmops_suspend,
1317 .resume = nouveau_pmops_resume,
1318 .freeze = nouveau_pmops_freeze,
1319 .thaw = nouveau_pmops_thaw,
1320 .poweroff = nouveau_pmops_freeze,
1321 .restore = nouveau_pmops_resume,
1322 .runtime_suspend = nouveau_pmops_runtime_suspend,
1323 .runtime_resume = nouveau_pmops_runtime_resume,
1324 .runtime_idle = nouveau_pmops_runtime_idle,
1325 };
1326
1327 static struct pci_driver
1328 nouveau_drm_pci_driver = {
1329 .name = "nouveau",
1330 .id_table = nouveau_drm_pci_table,
1331 .probe = nouveau_drm_probe,
1332 .remove = nouveau_drm_remove,
1333 .driver.pm = &nouveau_pm_ops,
1334 };
1335
1336 struct drm_device *
nouveau_platform_device_create(const struct nvkm_device_tegra_func * func,struct platform_device * pdev,struct nvkm_device ** pdevice)1337 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1338 struct platform_device *pdev,
1339 struct nvkm_device **pdevice)
1340 {
1341 struct drm_device *drm;
1342 int err;
1343
1344 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1345 true, true, ~0ULL, pdevice);
1346 if (err)
1347 goto err_free;
1348
1349 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1350 if (IS_ERR(drm)) {
1351 err = PTR_ERR(drm);
1352 goto err_free;
1353 }
1354
1355 err = nouveau_drm_device_init(drm);
1356 if (err)
1357 goto err_put;
1358
1359 platform_set_drvdata(pdev, drm);
1360
1361 return drm;
1362
1363 err_put:
1364 drm_dev_put(drm);
1365 err_free:
1366 nvkm_device_del(pdevice);
1367
1368 return ERR_PTR(err);
1369 }
1370
1371 static int __init
nouveau_drm_init(void)1372 nouveau_drm_init(void)
1373 {
1374 driver_pci = driver_stub;
1375 driver_platform = driver_stub;
1376
1377 nouveau_display_options();
1378
1379 if (nouveau_modeset == -1) {
1380 if (drm_firmware_drivers_only())
1381 nouveau_modeset = 0;
1382 }
1383
1384 if (!nouveau_modeset)
1385 return 0;
1386
1387 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1388 platform_driver_register(&nouveau_platform_driver);
1389 #endif
1390
1391 nouveau_register_dsm_handler();
1392 nouveau_backlight_ctor();
1393
1394 #ifdef CONFIG_PCI
1395 return pci_register_driver(&nouveau_drm_pci_driver);
1396 #else
1397 return 0;
1398 #endif
1399 }
1400
1401 static void __exit
nouveau_drm_exit(void)1402 nouveau_drm_exit(void)
1403 {
1404 if (!nouveau_modeset)
1405 return;
1406
1407 #ifdef CONFIG_PCI
1408 pci_unregister_driver(&nouveau_drm_pci_driver);
1409 #endif
1410 nouveau_backlight_dtor();
1411 nouveau_unregister_dsm_handler();
1412
1413 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1414 platform_driver_unregister(&nouveau_platform_driver);
1415 #endif
1416 if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM))
1417 mmu_notifier_synchronize();
1418 }
1419
1420 module_init(nouveau_drm_init);
1421 module_exit(nouveau_drm_exit);
1422
1423 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1424 MODULE_AUTHOR(DRIVER_AUTHOR);
1425 MODULE_DESCRIPTION(DRIVER_DESC);
1426 MODULE_LICENSE("GPL and additional rights");
1427