1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* QLogic qede NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7 #include <linux/crash_dump.h>
8 #include <linux/module.h>
9 #include <linux/pci.h>
10 #include <linux/device.h>
11 #include <linux/netdevice.h>
12 #include <linux/etherdevice.h>
13 #include <linux/skbuff.h>
14 #include <linux/errno.h>
15 #include <linux/list.h>
16 #include <linux/string.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/interrupt.h>
19 #include <asm/byteorder.h>
20 #include <asm/param.h>
21 #include <linux/io.h>
22 #include <linux/netdev_features.h>
23 #include <linux/udp.h>
24 #include <linux/tcp.h>
25 #include <net/udp_tunnel.h>
26 #include <linux/ip.h>
27 #include <net/ipv6.h>
28 #include <net/tcp.h>
29 #include <linux/if_ether.h>
30 #include <linux/if_vlan.h>
31 #include <linux/pkt_sched.h>
32 #include <linux/ethtool.h>
33 #include <linux/in.h>
34 #include <linux/random.h>
35 #include <net/ip6_checksum.h>
36 #include <linux/bitops.h>
37 #include <linux/vmalloc.h>
38 #include <linux/aer.h>
39 #include "qede.h"
40 #include "qede_ptp.h"
41
42 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
43 MODULE_LICENSE("GPL");
44
45 static uint debug;
46 module_param(debug, uint, 0);
47 MODULE_PARM_DESC(debug, " Default debug msglevel");
48
49 static const struct qed_eth_ops *qed_ops;
50
51 #define CHIP_NUM_57980S_40 0x1634
52 #define CHIP_NUM_57980S_10 0x1666
53 #define CHIP_NUM_57980S_MF 0x1636
54 #define CHIP_NUM_57980S_100 0x1644
55 #define CHIP_NUM_57980S_50 0x1654
56 #define CHIP_NUM_57980S_25 0x1656
57 #define CHIP_NUM_57980S_IOV 0x1664
58 #define CHIP_NUM_AH 0x8070
59 #define CHIP_NUM_AH_IOV 0x8090
60
61 #ifndef PCI_DEVICE_ID_NX2_57980E
62 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
63 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
64 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
65 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
66 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
67 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
68 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
69 #define PCI_DEVICE_ID_AH CHIP_NUM_AH
70 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV
71
72 #endif
73
74 enum qede_pci_private {
75 QEDE_PRIVATE_PF,
76 QEDE_PRIVATE_VF
77 };
78
79 static const struct pci_device_id qede_pci_tbl[] = {
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
86 #ifdef CONFIG_QED_SRIOV
87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
88 #endif
89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
90 #ifdef CONFIG_QED_SRIOV
91 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
92 #endif
93 { 0 }
94 };
95
96 MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
97
98 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
99 static pci_ers_result_t
100 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state);
101
102 #define TX_TIMEOUT (5 * HZ)
103
104 /* Utilize last protocol index for XDP */
105 #define XDP_PI 11
106
107 static void qede_remove(struct pci_dev *pdev);
108 static void qede_shutdown(struct pci_dev *pdev);
109 static void qede_link_update(void *dev, struct qed_link_output *link);
110 static void qede_schedule_recovery_handler(void *dev);
111 static void qede_recovery_handler(struct qede_dev *edev);
112 static void qede_schedule_hw_err_handler(void *dev,
113 enum qed_hw_err_type err_type);
114 static void qede_get_eth_tlv_data(void *edev, void *data);
115 static void qede_get_generic_tlv_data(void *edev,
116 struct qed_generic_tlvs *data);
117 static void qede_generic_hw_err_handler(struct qede_dev *edev);
118 #ifdef CONFIG_QED_SRIOV
qede_set_vf_vlan(struct net_device * ndev,int vf,u16 vlan,u8 qos,__be16 vlan_proto)119 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
120 __be16 vlan_proto)
121 {
122 struct qede_dev *edev = netdev_priv(ndev);
123
124 if (vlan > 4095) {
125 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
126 return -EINVAL;
127 }
128
129 if (vlan_proto != htons(ETH_P_8021Q))
130 return -EPROTONOSUPPORT;
131
132 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
133 vlan, vf);
134
135 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
136 }
137
qede_set_vf_mac(struct net_device * ndev,int vfidx,u8 * mac)138 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
139 {
140 struct qede_dev *edev = netdev_priv(ndev);
141
142 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx);
143
144 if (!is_valid_ether_addr(mac)) {
145 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
146 return -EINVAL;
147 }
148
149 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
150 }
151
qede_sriov_configure(struct pci_dev * pdev,int num_vfs_param)152 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
153 {
154 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
155 struct qed_dev_info *qed_info = &edev->dev_info.common;
156 struct qed_update_vport_params *vport_params;
157 int rc;
158
159 vport_params = vzalloc(sizeof(*vport_params));
160 if (!vport_params)
161 return -ENOMEM;
162 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
163
164 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
165
166 /* Enable/Disable Tx switching for PF */
167 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
168 !qed_info->b_inter_pf_switch && qed_info->tx_switching) {
169 vport_params->vport_id = 0;
170 vport_params->update_tx_switching_flg = 1;
171 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
172 edev->ops->vport_update(edev->cdev, vport_params);
173 }
174
175 vfree(vport_params);
176 return rc;
177 }
178 #endif
179
qede_suspend(struct device * dev)180 static int __maybe_unused qede_suspend(struct device *dev)
181 {
182 dev_info(dev, "Device does not support suspend operation\n");
183
184 return -EOPNOTSUPP;
185 }
186
187 static DEFINE_SIMPLE_DEV_PM_OPS(qede_pm_ops, qede_suspend, NULL);
188
189 static const struct pci_error_handlers qede_err_handler = {
190 .error_detected = qede_io_error_detected,
191 };
192
193 static struct pci_driver qede_pci_driver = {
194 .name = "qede",
195 .id_table = qede_pci_tbl,
196 .probe = qede_probe,
197 .remove = qede_remove,
198 .shutdown = qede_shutdown,
199 #ifdef CONFIG_QED_SRIOV
200 .sriov_configure = qede_sriov_configure,
201 #endif
202 .err_handler = &qede_err_handler,
203 .driver.pm = &qede_pm_ops,
204 };
205
206 static struct qed_eth_cb_ops qede_ll_ops = {
207 {
208 #ifdef CONFIG_RFS_ACCEL
209 .arfs_filter_op = qede_arfs_filter_op,
210 #endif
211 .link_update = qede_link_update,
212 .schedule_recovery_handler = qede_schedule_recovery_handler,
213 .schedule_hw_err_handler = qede_schedule_hw_err_handler,
214 .get_generic_tlv_data = qede_get_generic_tlv_data,
215 .get_protocol_tlv_data = qede_get_eth_tlv_data,
216 },
217 .force_mac = qede_force_mac,
218 .ports_update = qede_udp_ports_update,
219 };
220
qede_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)221 static int qede_netdev_event(struct notifier_block *this, unsigned long event,
222 void *ptr)
223 {
224 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
225 struct ethtool_drvinfo drvinfo;
226 struct qede_dev *edev;
227
228 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
229 goto done;
230
231 /* Check whether this is a qede device */
232 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
233 goto done;
234
235 memset(&drvinfo, 0, sizeof(drvinfo));
236 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
237 if (strcmp(drvinfo.driver, "qede"))
238 goto done;
239 edev = netdev_priv(ndev);
240
241 switch (event) {
242 case NETDEV_CHANGENAME:
243 /* Notify qed of the name change */
244 if (!edev->ops || !edev->ops->common)
245 goto done;
246 edev->ops->common->set_name(edev->cdev, edev->ndev->name);
247 break;
248 case NETDEV_CHANGEADDR:
249 edev = netdev_priv(ndev);
250 qede_rdma_event_changeaddr(edev);
251 break;
252 }
253
254 done:
255 return NOTIFY_DONE;
256 }
257
258 static struct notifier_block qede_netdev_notifier = {
259 .notifier_call = qede_netdev_event,
260 };
261
262 static
qede_init(void)263 int __init qede_init(void)
264 {
265 int ret;
266
267 pr_info("qede init: QLogic FastLinQ 4xxxx Ethernet Driver qede\n");
268
269 qede_forced_speed_maps_init();
270
271 qed_ops = qed_get_eth_ops();
272 if (!qed_ops) {
273 pr_notice("Failed to get qed ethtool operations\n");
274 return -EINVAL;
275 }
276
277 /* Must register notifier before pci ops, since we might miss
278 * interface rename after pci probe and netdev registration.
279 */
280 ret = register_netdevice_notifier(&qede_netdev_notifier);
281 if (ret) {
282 pr_notice("Failed to register netdevice_notifier\n");
283 qed_put_eth_ops();
284 return -EINVAL;
285 }
286
287 ret = pci_register_driver(&qede_pci_driver);
288 if (ret) {
289 pr_notice("Failed to register driver\n");
290 unregister_netdevice_notifier(&qede_netdev_notifier);
291 qed_put_eth_ops();
292 return -EINVAL;
293 }
294
295 return 0;
296 }
297
qede_cleanup(void)298 static void __exit qede_cleanup(void)
299 {
300 if (debug & QED_LOG_INFO_MASK)
301 pr_info("qede_cleanup called\n");
302
303 unregister_netdevice_notifier(&qede_netdev_notifier);
304 pci_unregister_driver(&qede_pci_driver);
305 qed_put_eth_ops();
306 }
307
308 module_init(qede_init);
309 module_exit(qede_cleanup);
310
311 static int qede_open(struct net_device *ndev);
312 static int qede_close(struct net_device *ndev);
313
qede_fill_by_demand_stats(struct qede_dev * edev)314 void qede_fill_by_demand_stats(struct qede_dev *edev)
315 {
316 struct qede_stats_common *p_common = &edev->stats.common;
317 struct qed_eth_stats stats;
318
319 edev->ops->get_vport_stats(edev->cdev, &stats);
320
321 spin_lock(&edev->stats_lock);
322
323 p_common->no_buff_discards = stats.common.no_buff_discards;
324 p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
325 p_common->ttl0_discard = stats.common.ttl0_discard;
326 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
327 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
328 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
329 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
330 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
331 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
332 p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
333 p_common->mac_filter_discards = stats.common.mac_filter_discards;
334 p_common->gft_filter_drop = stats.common.gft_filter_drop;
335
336 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
337 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
338 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
339 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
340 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
341 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
342 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
343 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
344 p_common->coalesced_events = stats.common.tpa_coalesced_events;
345 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
346 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
347 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
348
349 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
350 p_common->rx_65_to_127_byte_packets =
351 stats.common.rx_65_to_127_byte_packets;
352 p_common->rx_128_to_255_byte_packets =
353 stats.common.rx_128_to_255_byte_packets;
354 p_common->rx_256_to_511_byte_packets =
355 stats.common.rx_256_to_511_byte_packets;
356 p_common->rx_512_to_1023_byte_packets =
357 stats.common.rx_512_to_1023_byte_packets;
358 p_common->rx_1024_to_1518_byte_packets =
359 stats.common.rx_1024_to_1518_byte_packets;
360 p_common->rx_crc_errors = stats.common.rx_crc_errors;
361 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
362 p_common->rx_pause_frames = stats.common.rx_pause_frames;
363 p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
364 p_common->rx_align_errors = stats.common.rx_align_errors;
365 p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
366 p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
367 p_common->rx_jabbers = stats.common.rx_jabbers;
368 p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
369 p_common->rx_fragments = stats.common.rx_fragments;
370 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
371 p_common->tx_65_to_127_byte_packets =
372 stats.common.tx_65_to_127_byte_packets;
373 p_common->tx_128_to_255_byte_packets =
374 stats.common.tx_128_to_255_byte_packets;
375 p_common->tx_256_to_511_byte_packets =
376 stats.common.tx_256_to_511_byte_packets;
377 p_common->tx_512_to_1023_byte_packets =
378 stats.common.tx_512_to_1023_byte_packets;
379 p_common->tx_1024_to_1518_byte_packets =
380 stats.common.tx_1024_to_1518_byte_packets;
381 p_common->tx_pause_frames = stats.common.tx_pause_frames;
382 p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
383 p_common->brb_truncates = stats.common.brb_truncates;
384 p_common->brb_discards = stats.common.brb_discards;
385 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
386 p_common->link_change_count = stats.common.link_change_count;
387 p_common->ptp_skip_txts = edev->ptp_skip_txts;
388
389 if (QEDE_IS_BB(edev)) {
390 struct qede_stats_bb *p_bb = &edev->stats.bb;
391
392 p_bb->rx_1519_to_1522_byte_packets =
393 stats.bb.rx_1519_to_1522_byte_packets;
394 p_bb->rx_1519_to_2047_byte_packets =
395 stats.bb.rx_1519_to_2047_byte_packets;
396 p_bb->rx_2048_to_4095_byte_packets =
397 stats.bb.rx_2048_to_4095_byte_packets;
398 p_bb->rx_4096_to_9216_byte_packets =
399 stats.bb.rx_4096_to_9216_byte_packets;
400 p_bb->rx_9217_to_16383_byte_packets =
401 stats.bb.rx_9217_to_16383_byte_packets;
402 p_bb->tx_1519_to_2047_byte_packets =
403 stats.bb.tx_1519_to_2047_byte_packets;
404 p_bb->tx_2048_to_4095_byte_packets =
405 stats.bb.tx_2048_to_4095_byte_packets;
406 p_bb->tx_4096_to_9216_byte_packets =
407 stats.bb.tx_4096_to_9216_byte_packets;
408 p_bb->tx_9217_to_16383_byte_packets =
409 stats.bb.tx_9217_to_16383_byte_packets;
410 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
411 p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
412 } else {
413 struct qede_stats_ah *p_ah = &edev->stats.ah;
414
415 p_ah->rx_1519_to_max_byte_packets =
416 stats.ah.rx_1519_to_max_byte_packets;
417 p_ah->tx_1519_to_max_byte_packets =
418 stats.ah.tx_1519_to_max_byte_packets;
419 }
420
421 spin_unlock(&edev->stats_lock);
422 }
423
qede_get_stats64(struct net_device * dev,struct rtnl_link_stats64 * stats)424 static void qede_get_stats64(struct net_device *dev,
425 struct rtnl_link_stats64 *stats)
426 {
427 struct qede_dev *edev = netdev_priv(dev);
428 struct qede_stats_common *p_common;
429
430 p_common = &edev->stats.common;
431
432 spin_lock(&edev->stats_lock);
433
434 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
435 p_common->rx_bcast_pkts;
436 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
437 p_common->tx_bcast_pkts;
438
439 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
440 p_common->rx_bcast_bytes;
441 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
442 p_common->tx_bcast_bytes;
443
444 stats->tx_errors = p_common->tx_err_drop_pkts;
445 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
446
447 stats->rx_fifo_errors = p_common->no_buff_discards;
448
449 if (QEDE_IS_BB(edev))
450 stats->collisions = edev->stats.bb.tx_total_collisions;
451 stats->rx_crc_errors = p_common->rx_crc_errors;
452 stats->rx_frame_errors = p_common->rx_align_errors;
453
454 spin_unlock(&edev->stats_lock);
455 }
456
457 #ifdef CONFIG_QED_SRIOV
qede_get_vf_config(struct net_device * dev,int vfidx,struct ifla_vf_info * ivi)458 static int qede_get_vf_config(struct net_device *dev, int vfidx,
459 struct ifla_vf_info *ivi)
460 {
461 struct qede_dev *edev = netdev_priv(dev);
462
463 if (!edev->ops)
464 return -EINVAL;
465
466 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
467 }
468
qede_set_vf_rate(struct net_device * dev,int vfidx,int min_tx_rate,int max_tx_rate)469 static int qede_set_vf_rate(struct net_device *dev, int vfidx,
470 int min_tx_rate, int max_tx_rate)
471 {
472 struct qede_dev *edev = netdev_priv(dev);
473
474 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
475 max_tx_rate);
476 }
477
qede_set_vf_spoofchk(struct net_device * dev,int vfidx,bool val)478 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
479 {
480 struct qede_dev *edev = netdev_priv(dev);
481
482 if (!edev->ops)
483 return -EINVAL;
484
485 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
486 }
487
qede_set_vf_link_state(struct net_device * dev,int vfidx,int link_state)488 static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
489 int link_state)
490 {
491 struct qede_dev *edev = netdev_priv(dev);
492
493 if (!edev->ops)
494 return -EINVAL;
495
496 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
497 }
498
qede_set_vf_trust(struct net_device * dev,int vfidx,bool setting)499 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
500 {
501 struct qede_dev *edev = netdev_priv(dev);
502
503 if (!edev->ops)
504 return -EINVAL;
505
506 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
507 }
508 #endif
509
qede_ioctl(struct net_device * dev,struct ifreq * ifr,int cmd)510 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
511 {
512 struct qede_dev *edev = netdev_priv(dev);
513
514 if (!netif_running(dev))
515 return -EAGAIN;
516
517 switch (cmd) {
518 case SIOCSHWTSTAMP:
519 return qede_ptp_hw_ts(edev, ifr);
520 default:
521 DP_VERBOSE(edev, QED_MSG_DEBUG,
522 "default IOCTL cmd 0x%x\n", cmd);
523 return -EOPNOTSUPP;
524 }
525
526 return 0;
527 }
528
qede_fp_sb_dump(struct qede_dev * edev,struct qede_fastpath * fp)529 static void qede_fp_sb_dump(struct qede_dev *edev, struct qede_fastpath *fp)
530 {
531 char *p_sb = (char *)fp->sb_info->sb_virt;
532 u32 sb_size, i;
533
534 sb_size = sizeof(struct status_block);
535
536 for (i = 0; i < sb_size; i += 8)
537 DP_NOTICE(edev,
538 "%02hhX %02hhX %02hhX %02hhX %02hhX %02hhX %02hhX %02hhX\n",
539 p_sb[i], p_sb[i + 1], p_sb[i + 2], p_sb[i + 3],
540 p_sb[i + 4], p_sb[i + 5], p_sb[i + 6], p_sb[i + 7]);
541 }
542
543 static void
qede_txq_fp_log_metadata(struct qede_dev * edev,struct qede_fastpath * fp,struct qede_tx_queue * txq)544 qede_txq_fp_log_metadata(struct qede_dev *edev,
545 struct qede_fastpath *fp, struct qede_tx_queue *txq)
546 {
547 struct qed_chain *p_chain = &txq->tx_pbl;
548
549 /* Dump txq/fp/sb ids etc. other metadata */
550 DP_NOTICE(edev,
551 "fpid 0x%x sbid 0x%x txqid [0x%x] ndev_qid [0x%x] cos [0x%x] p_chain %p cap %d size %d jiffies %lu HZ 0x%x\n",
552 fp->id, fp->sb_info->igu_sb_id, txq->index, txq->ndev_txq_id, txq->cos,
553 p_chain, p_chain->capacity, p_chain->size, jiffies, HZ);
554
555 /* Dump all the relevant prod/cons indexes */
556 DP_NOTICE(edev,
557 "hw cons %04x sw_tx_prod=0x%x, sw_tx_cons=0x%x, bd_prod 0x%x bd_cons 0x%x\n",
558 le16_to_cpu(*txq->hw_cons_ptr), txq->sw_tx_prod, txq->sw_tx_cons,
559 qed_chain_get_prod_idx(p_chain), qed_chain_get_cons_idx(p_chain));
560 }
561
562 static void
qede_tx_log_print(struct qede_dev * edev,struct qede_fastpath * fp,struct qede_tx_queue * txq)563 qede_tx_log_print(struct qede_dev *edev, struct qede_fastpath *fp, struct qede_tx_queue *txq)
564 {
565 struct qed_sb_info_dbg sb_dbg;
566 int rc;
567
568 /* sb info */
569 qede_fp_sb_dump(edev, fp);
570
571 memset(&sb_dbg, 0, sizeof(sb_dbg));
572 rc = edev->ops->common->get_sb_info(edev->cdev, fp->sb_info, (u16)fp->id, &sb_dbg);
573
574 DP_NOTICE(edev, "IGU: prod %08x cons %08x CAU Tx %04x\n",
575 sb_dbg.igu_prod, sb_dbg.igu_cons, sb_dbg.pi[TX_PI(txq->cos)]);
576
577 /* report to mfw */
578 edev->ops->common->mfw_report(edev->cdev,
579 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n",
580 txq->index, le16_to_cpu(*txq->hw_cons_ptr),
581 qed_chain_get_cons_idx(&txq->tx_pbl),
582 qed_chain_get_prod_idx(&txq->tx_pbl), jiffies);
583 if (!rc)
584 edev->ops->common->mfw_report(edev->cdev,
585 "Txq[%d]: SB[0x%04x] - IGU: prod %08x cons %08x CAU Tx %04x\n",
586 txq->index, fp->sb_info->igu_sb_id,
587 sb_dbg.igu_prod, sb_dbg.igu_cons,
588 sb_dbg.pi[TX_PI(txq->cos)]);
589 }
590
qede_tx_timeout(struct net_device * dev,unsigned int txqueue)591 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue)
592 {
593 struct qede_dev *edev = netdev_priv(dev);
594 int i;
595
596 netif_carrier_off(dev);
597 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue);
598
599 for_each_queue(i) {
600 struct qede_tx_queue *txq;
601 struct qede_fastpath *fp;
602 int cos;
603
604 fp = &edev->fp_array[i];
605 if (!(fp->type & QEDE_FASTPATH_TX))
606 continue;
607
608 for_each_cos_in_txq(edev, cos) {
609 txq = &fp->txq[cos];
610
611 /* Dump basic metadata for all queues */
612 qede_txq_fp_log_metadata(edev, fp, txq);
613
614 if (qed_chain_get_cons_idx(&txq->tx_pbl) !=
615 qed_chain_get_prod_idx(&txq->tx_pbl))
616 qede_tx_log_print(edev, fp, txq);
617 }
618 }
619
620 if (IS_VF(edev))
621 return;
622
623 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
624 edev->state == QEDE_STATE_RECOVERY) {
625 DP_INFO(edev,
626 "Avoid handling a Tx timeout while another HW error is being handled\n");
627 return;
628 }
629
630 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags);
631 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
632 schedule_delayed_work(&edev->sp_task, 0);
633 }
634
qede_setup_tc(struct net_device * ndev,u8 num_tc)635 static int qede_setup_tc(struct net_device *ndev, u8 num_tc)
636 {
637 struct qede_dev *edev = netdev_priv(ndev);
638 int cos, count, offset;
639
640 if (num_tc > edev->dev_info.num_tc)
641 return -EINVAL;
642
643 netdev_reset_tc(ndev);
644 netdev_set_num_tc(ndev, num_tc);
645
646 for_each_cos_in_txq(edev, cos) {
647 count = QEDE_TSS_COUNT(edev);
648 offset = cos * QEDE_TSS_COUNT(edev);
649 netdev_set_tc_queue(ndev, cos, count, offset);
650 }
651
652 return 0;
653 }
654
655 static int
qede_set_flower(struct qede_dev * edev,struct flow_cls_offload * f,__be16 proto)656 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f,
657 __be16 proto)
658 {
659 switch (f->command) {
660 case FLOW_CLS_REPLACE:
661 return qede_add_tc_flower_fltr(edev, proto, f);
662 case FLOW_CLS_DESTROY:
663 return qede_delete_flow_filter(edev, f->cookie);
664 default:
665 return -EOPNOTSUPP;
666 }
667 }
668
qede_setup_tc_block_cb(enum tc_setup_type type,void * type_data,void * cb_priv)669 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
670 void *cb_priv)
671 {
672 struct flow_cls_offload *f;
673 struct qede_dev *edev = cb_priv;
674
675 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data))
676 return -EOPNOTSUPP;
677
678 switch (type) {
679 case TC_SETUP_CLSFLOWER:
680 f = type_data;
681 return qede_set_flower(edev, f, f->common.protocol);
682 default:
683 return -EOPNOTSUPP;
684 }
685 }
686
687 static LIST_HEAD(qede_block_cb_list);
688
689 static int
qede_setup_tc_offload(struct net_device * dev,enum tc_setup_type type,void * type_data)690 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type,
691 void *type_data)
692 {
693 struct qede_dev *edev = netdev_priv(dev);
694 struct tc_mqprio_qopt *mqprio;
695
696 switch (type) {
697 case TC_SETUP_BLOCK:
698 return flow_block_cb_setup_simple(type_data,
699 &qede_block_cb_list,
700 qede_setup_tc_block_cb,
701 edev, edev, true);
702 case TC_SETUP_QDISC_MQPRIO:
703 mqprio = type_data;
704
705 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
706 return qede_setup_tc(dev, mqprio->num_tc);
707 default:
708 return -EOPNOTSUPP;
709 }
710 }
711
712 static const struct net_device_ops qede_netdev_ops = {
713 .ndo_open = qede_open,
714 .ndo_stop = qede_close,
715 .ndo_start_xmit = qede_start_xmit,
716 .ndo_select_queue = qede_select_queue,
717 .ndo_set_rx_mode = qede_set_rx_mode,
718 .ndo_set_mac_address = qede_set_mac_addr,
719 .ndo_validate_addr = eth_validate_addr,
720 .ndo_change_mtu = qede_change_mtu,
721 .ndo_eth_ioctl = qede_ioctl,
722 .ndo_tx_timeout = qede_tx_timeout,
723 #ifdef CONFIG_QED_SRIOV
724 .ndo_set_vf_mac = qede_set_vf_mac,
725 .ndo_set_vf_vlan = qede_set_vf_vlan,
726 .ndo_set_vf_trust = qede_set_vf_trust,
727 #endif
728 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
729 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
730 .ndo_fix_features = qede_fix_features,
731 .ndo_set_features = qede_set_features,
732 .ndo_get_stats64 = qede_get_stats64,
733 #ifdef CONFIG_QED_SRIOV
734 .ndo_set_vf_link_state = qede_set_vf_link_state,
735 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
736 .ndo_get_vf_config = qede_get_vf_config,
737 .ndo_set_vf_rate = qede_set_vf_rate,
738 #endif
739 .ndo_features_check = qede_features_check,
740 .ndo_bpf = qede_xdp,
741 #ifdef CONFIG_RFS_ACCEL
742 .ndo_rx_flow_steer = qede_rx_flow_steer,
743 #endif
744 .ndo_xdp_xmit = qede_xdp_transmit,
745 .ndo_setup_tc = qede_setup_tc_offload,
746 };
747
748 static const struct net_device_ops qede_netdev_vf_ops = {
749 .ndo_open = qede_open,
750 .ndo_stop = qede_close,
751 .ndo_start_xmit = qede_start_xmit,
752 .ndo_select_queue = qede_select_queue,
753 .ndo_set_rx_mode = qede_set_rx_mode,
754 .ndo_set_mac_address = qede_set_mac_addr,
755 .ndo_validate_addr = eth_validate_addr,
756 .ndo_change_mtu = qede_change_mtu,
757 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
758 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
759 .ndo_fix_features = qede_fix_features,
760 .ndo_set_features = qede_set_features,
761 .ndo_get_stats64 = qede_get_stats64,
762 .ndo_features_check = qede_features_check,
763 };
764
765 static const struct net_device_ops qede_netdev_vf_xdp_ops = {
766 .ndo_open = qede_open,
767 .ndo_stop = qede_close,
768 .ndo_start_xmit = qede_start_xmit,
769 .ndo_select_queue = qede_select_queue,
770 .ndo_set_rx_mode = qede_set_rx_mode,
771 .ndo_set_mac_address = qede_set_mac_addr,
772 .ndo_validate_addr = eth_validate_addr,
773 .ndo_change_mtu = qede_change_mtu,
774 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
775 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
776 .ndo_fix_features = qede_fix_features,
777 .ndo_set_features = qede_set_features,
778 .ndo_get_stats64 = qede_get_stats64,
779 .ndo_features_check = qede_features_check,
780 .ndo_bpf = qede_xdp,
781 .ndo_xdp_xmit = qede_xdp_transmit,
782 };
783
784 /* -------------------------------------------------------------------------
785 * START OF PROBE / REMOVE
786 * -------------------------------------------------------------------------
787 */
788
qede_alloc_etherdev(struct qed_dev * cdev,struct pci_dev * pdev,struct qed_dev_eth_info * info,u32 dp_module,u8 dp_level)789 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
790 struct pci_dev *pdev,
791 struct qed_dev_eth_info *info,
792 u32 dp_module, u8 dp_level)
793 {
794 struct net_device *ndev;
795 struct qede_dev *edev;
796
797 ndev = alloc_etherdev_mqs(sizeof(*edev),
798 info->num_queues * info->num_tc,
799 info->num_queues);
800 if (!ndev) {
801 pr_err("etherdev allocation failed\n");
802 return NULL;
803 }
804
805 edev = netdev_priv(ndev);
806 edev->ndev = ndev;
807 edev->cdev = cdev;
808 edev->pdev = pdev;
809 edev->dp_module = dp_module;
810 edev->dp_level = dp_level;
811 edev->ops = qed_ops;
812
813 if (is_kdump_kernel()) {
814 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN;
815 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN;
816 } else {
817 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
818 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
819 }
820
821 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
822 info->num_queues, info->num_queues);
823
824 SET_NETDEV_DEV(ndev, &pdev->dev);
825
826 memset(&edev->stats, 0, sizeof(edev->stats));
827 memcpy(&edev->dev_info, info, sizeof(*info));
828
829 /* As ethtool doesn't have the ability to show WoL behavior as
830 * 'default', if device supports it declare it's enabled.
831 */
832 if (edev->dev_info.common.wol_support)
833 edev->wol_enabled = true;
834
835 INIT_LIST_HEAD(&edev->vlan_list);
836
837 return edev;
838 }
839
qede_init_ndev(struct qede_dev * edev)840 static void qede_init_ndev(struct qede_dev *edev)
841 {
842 struct net_device *ndev = edev->ndev;
843 struct pci_dev *pdev = edev->pdev;
844 bool udp_tunnel_enable = false;
845 netdev_features_t hw_features;
846
847 pci_set_drvdata(pdev, ndev);
848
849 ndev->mem_start = edev->dev_info.common.pci_mem_start;
850 ndev->base_addr = ndev->mem_start;
851 ndev->mem_end = edev->dev_info.common.pci_mem_end;
852 ndev->irq = edev->dev_info.common.pci_irq;
853
854 ndev->watchdog_timeo = TX_TIMEOUT;
855
856 if (IS_VF(edev)) {
857 if (edev->dev_info.xdp_supported)
858 ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
859 else
860 ndev->netdev_ops = &qede_netdev_vf_ops;
861 } else {
862 ndev->netdev_ops = &qede_netdev_ops;
863 }
864
865 qede_set_ethtool_ops(ndev);
866
867 ndev->priv_flags |= IFF_UNICAST_FLT;
868
869 /* user-changeble features */
870 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG |
871 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
872 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC;
873
874 if (edev->dev_info.common.b_arfs_capable)
875 hw_features |= NETIF_F_NTUPLE;
876
877 if (edev->dev_info.common.vxlan_enable ||
878 edev->dev_info.common.geneve_enable)
879 udp_tunnel_enable = true;
880
881 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
882 hw_features |= NETIF_F_TSO_ECN;
883 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
884 NETIF_F_SG | NETIF_F_TSO |
885 NETIF_F_TSO_ECN | NETIF_F_TSO6 |
886 NETIF_F_RXCSUM;
887 }
888
889 if (udp_tunnel_enable) {
890 hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
891 NETIF_F_GSO_UDP_TUNNEL_CSUM);
892 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
893 NETIF_F_GSO_UDP_TUNNEL_CSUM);
894
895 qede_set_udp_tunnels(edev);
896 }
897
898 if (edev->dev_info.common.gre_enable) {
899 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
900 ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
901 NETIF_F_GSO_GRE_CSUM);
902 }
903
904 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
905 NETIF_F_HIGHDMA;
906 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
907 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
908 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
909
910 ndev->hw_features = hw_features;
911
912 /* MTU range: 46 - 9600 */
913 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
914 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
915
916 /* Set network device HW mac */
917 eth_hw_addr_set(edev->ndev, edev->dev_info.common.hw_mac);
918
919 ndev->mtu = edev->dev_info.common.mtu;
920 }
921
922 /* This function converts from 32b param to two params of level and module
923 * Input 32b decoding:
924 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
925 * 'happy' flow, e.g. memory allocation failed.
926 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
927 * and provide important parameters.
928 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
929 * module. VERBOSE prints are for tracking the specific flow in low level.
930 *
931 * Notice that the level should be that of the lowest required logs.
932 */
qede_config_debug(uint debug,u32 * p_dp_module,u8 * p_dp_level)933 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
934 {
935 *p_dp_level = QED_LEVEL_NOTICE;
936 *p_dp_module = 0;
937
938 if (debug & QED_LOG_VERBOSE_MASK) {
939 *p_dp_level = QED_LEVEL_VERBOSE;
940 *p_dp_module = (debug & 0x3FFFFFFF);
941 } else if (debug & QED_LOG_INFO_MASK) {
942 *p_dp_level = QED_LEVEL_INFO;
943 } else if (debug & QED_LOG_NOTICE_MASK) {
944 *p_dp_level = QED_LEVEL_NOTICE;
945 }
946 }
947
qede_free_fp_array(struct qede_dev * edev)948 static void qede_free_fp_array(struct qede_dev *edev)
949 {
950 if (edev->fp_array) {
951 struct qede_fastpath *fp;
952 int i;
953
954 for_each_queue(i) {
955 fp = &edev->fp_array[i];
956
957 kfree(fp->sb_info);
958 /* Handle mem alloc failure case where qede_init_fp
959 * didn't register xdp_rxq_info yet.
960 * Implicit only (fp->type & QEDE_FASTPATH_RX)
961 */
962 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq))
963 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq);
964 kfree(fp->rxq);
965 kfree(fp->xdp_tx);
966 kfree(fp->txq);
967 }
968 kfree(edev->fp_array);
969 }
970
971 edev->num_queues = 0;
972 edev->fp_num_tx = 0;
973 edev->fp_num_rx = 0;
974 }
975
qede_alloc_fp_array(struct qede_dev * edev)976 static int qede_alloc_fp_array(struct qede_dev *edev)
977 {
978 u8 fp_combined, fp_rx = edev->fp_num_rx;
979 struct qede_fastpath *fp;
980 int i;
981
982 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
983 sizeof(*edev->fp_array), GFP_KERNEL);
984 if (!edev->fp_array) {
985 DP_NOTICE(edev, "fp array allocation failed\n");
986 goto err;
987 }
988
989 if (!edev->coal_entry) {
990 edev->coal_entry = kcalloc(QEDE_MAX_RSS_CNT(edev),
991 sizeof(*edev->coal_entry),
992 GFP_KERNEL);
993 if (!edev->coal_entry) {
994 DP_ERR(edev, "coalesce entry allocation failed\n");
995 goto err;
996 }
997 }
998
999 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
1000
1001 /* Allocate the FP elements for Rx queues followed by combined and then
1002 * the Tx. This ordering should be maintained so that the respective
1003 * queues (Rx or Tx) will be together in the fastpath array and the
1004 * associated ids will be sequential.
1005 */
1006 for_each_queue(i) {
1007 fp = &edev->fp_array[i];
1008
1009 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
1010 if (!fp->sb_info) {
1011 DP_NOTICE(edev, "sb info struct allocation failed\n");
1012 goto err;
1013 }
1014
1015 if (fp_rx) {
1016 fp->type = QEDE_FASTPATH_RX;
1017 fp_rx--;
1018 } else if (fp_combined) {
1019 fp->type = QEDE_FASTPATH_COMBINED;
1020 fp_combined--;
1021 } else {
1022 fp->type = QEDE_FASTPATH_TX;
1023 }
1024
1025 if (fp->type & QEDE_FASTPATH_TX) {
1026 fp->txq = kcalloc(edev->dev_info.num_tc,
1027 sizeof(*fp->txq), GFP_KERNEL);
1028 if (!fp->txq)
1029 goto err;
1030 }
1031
1032 if (fp->type & QEDE_FASTPATH_RX) {
1033 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
1034 if (!fp->rxq)
1035 goto err;
1036
1037 if (edev->xdp_prog) {
1038 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
1039 GFP_KERNEL);
1040 if (!fp->xdp_tx)
1041 goto err;
1042 fp->type |= QEDE_FASTPATH_XDP;
1043 }
1044 }
1045 }
1046
1047 return 0;
1048 err:
1049 qede_free_fp_array(edev);
1050 return -ENOMEM;
1051 }
1052
1053 /* The qede lock is used to protect driver state change and driver flows that
1054 * are not reentrant.
1055 */
__qede_lock(struct qede_dev * edev)1056 void __qede_lock(struct qede_dev *edev)
1057 {
1058 mutex_lock(&edev->qede_lock);
1059 }
1060
__qede_unlock(struct qede_dev * edev)1061 void __qede_unlock(struct qede_dev *edev)
1062 {
1063 mutex_unlock(&edev->qede_lock);
1064 }
1065
1066 /* This version of the lock should be used when acquiring the RTNL lock is also
1067 * needed in addition to the internal qede lock.
1068 */
qede_lock(struct qede_dev * edev)1069 static void qede_lock(struct qede_dev *edev)
1070 {
1071 rtnl_lock();
1072 __qede_lock(edev);
1073 }
1074
qede_unlock(struct qede_dev * edev)1075 static void qede_unlock(struct qede_dev *edev)
1076 {
1077 __qede_unlock(edev);
1078 rtnl_unlock();
1079 }
1080
qede_periodic_task(struct work_struct * work)1081 static void qede_periodic_task(struct work_struct *work)
1082 {
1083 struct qede_dev *edev = container_of(work, struct qede_dev,
1084 periodic_task.work);
1085
1086 qede_fill_by_demand_stats(edev);
1087 schedule_delayed_work(&edev->periodic_task, edev->stats_coal_ticks);
1088 }
1089
qede_init_periodic_task(struct qede_dev * edev)1090 static void qede_init_periodic_task(struct qede_dev *edev)
1091 {
1092 INIT_DELAYED_WORK(&edev->periodic_task, qede_periodic_task);
1093 spin_lock_init(&edev->stats_lock);
1094 edev->stats_coal_usecs = USEC_PER_SEC;
1095 edev->stats_coal_ticks = usecs_to_jiffies(USEC_PER_SEC);
1096 }
1097
qede_sp_task(struct work_struct * work)1098 static void qede_sp_task(struct work_struct *work)
1099 {
1100 struct qede_dev *edev = container_of(work, struct qede_dev,
1101 sp_task.work);
1102
1103 /* Disable execution of this deferred work once
1104 * qede removal is in progress, this stop any future
1105 * scheduling of sp_task.
1106 */
1107 if (test_bit(QEDE_SP_DISABLE, &edev->sp_flags))
1108 return;
1109
1110 /* The locking scheme depends on the specific flag:
1111 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to
1112 * ensure that ongoing flows are ended and new ones are not started.
1113 * In other cases - only the internal qede lock should be acquired.
1114 */
1115
1116 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) {
1117 cancel_delayed_work_sync(&edev->periodic_task);
1118 #ifdef CONFIG_QED_SRIOV
1119 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1120 * The recovery of the active VFs is currently not supported.
1121 */
1122 if (pci_num_vf(edev->pdev))
1123 qede_sriov_configure(edev->pdev, 0);
1124 #endif
1125 qede_lock(edev);
1126 qede_recovery_handler(edev);
1127 qede_unlock(edev);
1128 }
1129
1130 __qede_lock(edev);
1131
1132 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1133 if (edev->state == QEDE_STATE_OPEN)
1134 qede_config_rx_mode(edev->ndev);
1135
1136 #ifdef CONFIG_RFS_ACCEL
1137 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
1138 if (edev->state == QEDE_STATE_OPEN)
1139 qede_process_arfs_filters(edev, false);
1140 }
1141 #endif
1142 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags))
1143 qede_generic_hw_err_handler(edev);
1144 __qede_unlock(edev);
1145
1146 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) {
1147 #ifdef CONFIG_QED_SRIOV
1148 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1149 * The recovery of the active VFs is currently not supported.
1150 */
1151 if (pci_num_vf(edev->pdev))
1152 qede_sriov_configure(edev->pdev, 0);
1153 #endif
1154 edev->ops->common->recovery_process(edev->cdev);
1155 }
1156 }
1157
qede_update_pf_params(struct qed_dev * cdev)1158 static void qede_update_pf_params(struct qed_dev *cdev)
1159 {
1160 struct qed_pf_params pf_params;
1161 u16 num_cons;
1162
1163 /* 64 rx + 64 tx + 64 XDP */
1164 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1165
1166 /* 1 rx + 1 xdp + max tx cos */
1167 num_cons = QED_MIN_L2_CONS;
1168
1169 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons;
1170
1171 /* Same for VFs - make sure they'll have sufficient connections
1172 * to support XDP Tx queues.
1173 */
1174 pf_params.eth_pf_params.num_vf_cons = 48;
1175
1176 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
1177 qed_ops->common->update_pf_params(cdev, &pf_params);
1178 }
1179
1180 #define QEDE_FW_VER_STR_SIZE 80
1181
qede_log_probe(struct qede_dev * edev)1182 static void qede_log_probe(struct qede_dev *edev)
1183 {
1184 struct qed_dev_info *p_dev_info = &edev->dev_info.common;
1185 u8 buf[QEDE_FW_VER_STR_SIZE];
1186 size_t left_size;
1187
1188 snprintf(buf, QEDE_FW_VER_STR_SIZE,
1189 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
1190 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
1191 p_dev_info->fw_eng,
1192 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
1193 QED_MFW_VERSION_3_OFFSET,
1194 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
1195 QED_MFW_VERSION_2_OFFSET,
1196 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
1197 QED_MFW_VERSION_1_OFFSET,
1198 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
1199 QED_MFW_VERSION_0_OFFSET);
1200
1201 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
1202 if (p_dev_info->mbi_version && left_size)
1203 snprintf(buf + strlen(buf), left_size,
1204 " [MBI %d.%d.%d]",
1205 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
1206 QED_MBI_VERSION_2_OFFSET,
1207 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
1208 QED_MBI_VERSION_1_OFFSET,
1209 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
1210 QED_MBI_VERSION_0_OFFSET);
1211
1212 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
1213 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
1214 buf, edev->ndev->name);
1215 }
1216
1217 enum qede_probe_mode {
1218 QEDE_PROBE_NORMAL,
1219 QEDE_PROBE_RECOVERY,
1220 };
1221
__qede_probe(struct pci_dev * pdev,u32 dp_module,u8 dp_level,bool is_vf,enum qede_probe_mode mode)1222 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1223 bool is_vf, enum qede_probe_mode mode)
1224 {
1225 struct qed_probe_params probe_params;
1226 struct qed_slowpath_params sp_params;
1227 struct qed_dev_eth_info dev_info;
1228 struct qede_dev *edev;
1229 struct qed_dev *cdev;
1230 int rc;
1231
1232 if (unlikely(dp_level & QED_LEVEL_INFO))
1233 pr_notice("Starting qede probe\n");
1234
1235 memset(&probe_params, 0, sizeof(probe_params));
1236 probe_params.protocol = QED_PROTOCOL_ETH;
1237 probe_params.dp_module = dp_module;
1238 probe_params.dp_level = dp_level;
1239 probe_params.is_vf = is_vf;
1240 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY);
1241 cdev = qed_ops->common->probe(pdev, &probe_params);
1242 if (!cdev) {
1243 rc = -ENODEV;
1244 goto err0;
1245 }
1246
1247 qede_update_pf_params(cdev);
1248
1249 /* Start the Slowpath-process */
1250 memset(&sp_params, 0, sizeof(sp_params));
1251 sp_params.int_mode = QED_INT_MODE_MSIX;
1252 strscpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1253 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
1254 if (rc) {
1255 pr_notice("Cannot start slowpath\n");
1256 goto err1;
1257 }
1258
1259 /* Learn information crucial for qede to progress */
1260 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1261 if (rc)
1262 goto err2;
1263
1264 if (mode != QEDE_PROBE_RECOVERY) {
1265 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1266 dp_level);
1267 if (!edev) {
1268 rc = -ENOMEM;
1269 goto err2;
1270 }
1271
1272 edev->devlink = qed_ops->common->devlink_register(cdev);
1273 if (IS_ERR(edev->devlink)) {
1274 DP_NOTICE(edev, "Cannot register devlink\n");
1275 rc = PTR_ERR(edev->devlink);
1276 edev->devlink = NULL;
1277 goto err3;
1278 }
1279 } else {
1280 struct net_device *ndev = pci_get_drvdata(pdev);
1281 struct qed_devlink *qdl;
1282
1283 edev = netdev_priv(ndev);
1284 qdl = devlink_priv(edev->devlink);
1285 qdl->cdev = cdev;
1286 edev->cdev = cdev;
1287 memset(&edev->stats, 0, sizeof(edev->stats));
1288 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info));
1289 }
1290
1291 if (is_vf)
1292 set_bit(QEDE_FLAGS_IS_VF, &edev->flags);
1293
1294 qede_init_ndev(edev);
1295
1296 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY));
1297 if (rc)
1298 goto err3;
1299
1300 if (mode != QEDE_PROBE_RECOVERY) {
1301 /* Prepare the lock prior to the registration of the netdev,
1302 * as once it's registered we might reach flows requiring it
1303 * [it's even possible to reach a flow needing it directly
1304 * from there, although it's unlikely].
1305 */
1306 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1307 mutex_init(&edev->qede_lock);
1308 qede_init_periodic_task(edev);
1309
1310 rc = register_netdev(edev->ndev);
1311 if (rc) {
1312 DP_NOTICE(edev, "Cannot register net-device\n");
1313 goto err4;
1314 }
1315 }
1316
1317 edev->ops->common->set_name(cdev, edev->ndev->name);
1318
1319 /* PTP not supported on VFs */
1320 if (!is_vf)
1321 qede_ptp_enable(edev);
1322
1323 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1324
1325 #ifdef CONFIG_DCB
1326 if (!IS_VF(edev))
1327 qede_set_dcbnl_ops(edev->ndev);
1328 #endif
1329
1330 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
1331
1332 qede_log_probe(edev);
1333
1334 /* retain user config (for example - after recovery) */
1335 if (edev->stats_coal_usecs)
1336 schedule_delayed_work(&edev->periodic_task, 0);
1337
1338 return 0;
1339
1340 err4:
1341 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY));
1342 err3:
1343 if (mode != QEDE_PROBE_RECOVERY)
1344 free_netdev(edev->ndev);
1345 else
1346 edev->cdev = NULL;
1347 err2:
1348 qed_ops->common->slowpath_stop(cdev);
1349 err1:
1350 qed_ops->common->remove(cdev);
1351 err0:
1352 return rc;
1353 }
1354
qede_probe(struct pci_dev * pdev,const struct pci_device_id * id)1355 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1356 {
1357 bool is_vf = false;
1358 u32 dp_module = 0;
1359 u8 dp_level = 0;
1360
1361 switch ((enum qede_pci_private)id->driver_data) {
1362 case QEDE_PRIVATE_VF:
1363 if (debug & QED_LOG_VERBOSE_MASK)
1364 dev_err(&pdev->dev, "Probing a VF\n");
1365 is_vf = true;
1366 break;
1367 default:
1368 if (debug & QED_LOG_VERBOSE_MASK)
1369 dev_err(&pdev->dev, "Probing a PF\n");
1370 }
1371
1372 qede_config_debug(debug, &dp_module, &dp_level);
1373
1374 return __qede_probe(pdev, dp_module, dp_level, is_vf,
1375 QEDE_PROBE_NORMAL);
1376 }
1377
1378 enum qede_remove_mode {
1379 QEDE_REMOVE_NORMAL,
1380 QEDE_REMOVE_RECOVERY,
1381 };
1382
__qede_remove(struct pci_dev * pdev,enum qede_remove_mode mode)1383 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1384 {
1385 struct net_device *ndev = pci_get_drvdata(pdev);
1386 struct qede_dev *edev;
1387 struct qed_dev *cdev;
1388
1389 if (!ndev) {
1390 dev_info(&pdev->dev, "Device has already been removed\n");
1391 return;
1392 }
1393
1394 edev = netdev_priv(ndev);
1395 cdev = edev->cdev;
1396
1397 DP_INFO(edev, "Starting qede_remove\n");
1398
1399 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY));
1400
1401 if (mode != QEDE_REMOVE_RECOVERY) {
1402 set_bit(QEDE_SP_DISABLE, &edev->sp_flags);
1403 unregister_netdev(ndev);
1404
1405 cancel_delayed_work_sync(&edev->sp_task);
1406 cancel_delayed_work_sync(&edev->periodic_task);
1407
1408 edev->ops->common->set_power_state(cdev, PCI_D0);
1409
1410 pci_set_drvdata(pdev, NULL);
1411 }
1412
1413 qede_ptp_disable(edev);
1414
1415 /* Use global ops since we've freed edev */
1416 qed_ops->common->slowpath_stop(cdev);
1417 if (system_state == SYSTEM_POWER_OFF)
1418 return;
1419
1420 if (mode != QEDE_REMOVE_RECOVERY && edev->devlink) {
1421 qed_ops->common->devlink_unregister(edev->devlink);
1422 edev->devlink = NULL;
1423 }
1424 qed_ops->common->remove(cdev);
1425 edev->cdev = NULL;
1426
1427 /* Since this can happen out-of-sync with other flows,
1428 * don't release the netdevice until after slowpath stop
1429 * has been called to guarantee various other contexts
1430 * [e.g., QED register callbacks] won't break anything when
1431 * accessing the netdevice.
1432 */
1433 if (mode != QEDE_REMOVE_RECOVERY) {
1434 kfree(edev->coal_entry);
1435 free_netdev(ndev);
1436 }
1437
1438 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
1439 }
1440
qede_remove(struct pci_dev * pdev)1441 static void qede_remove(struct pci_dev *pdev)
1442 {
1443 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1444 }
1445
qede_shutdown(struct pci_dev * pdev)1446 static void qede_shutdown(struct pci_dev *pdev)
1447 {
1448 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1449 }
1450
1451 /* -------------------------------------------------------------------------
1452 * START OF LOAD / UNLOAD
1453 * -------------------------------------------------------------------------
1454 */
1455
qede_set_num_queues(struct qede_dev * edev)1456 static int qede_set_num_queues(struct qede_dev *edev)
1457 {
1458 int rc;
1459 u16 rss_num;
1460
1461 /* Setup queues according to possible resources*/
1462 if (edev->req_queues)
1463 rss_num = edev->req_queues;
1464 else
1465 rss_num = netif_get_num_default_rss_queues() *
1466 edev->dev_info.common.num_hwfns;
1467
1468 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1469
1470 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1471 if (rc > 0) {
1472 /* Managed to request interrupts for our queues */
1473 edev->num_queues = rc;
1474 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1475 QEDE_QUEUE_CNT(edev), rss_num);
1476 rc = 0;
1477 }
1478
1479 edev->fp_num_tx = edev->req_num_tx;
1480 edev->fp_num_rx = edev->req_num_rx;
1481
1482 return rc;
1483 }
1484
qede_free_mem_sb(struct qede_dev * edev,struct qed_sb_info * sb_info,u16 sb_id)1485 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
1486 u16 sb_id)
1487 {
1488 if (sb_info->sb_virt) {
1489 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id,
1490 QED_SB_TYPE_L2_QUEUE);
1491 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1492 (void *)sb_info->sb_virt, sb_info->sb_phys);
1493 memset(sb_info, 0, sizeof(*sb_info));
1494 }
1495 }
1496
1497 /* This function allocates fast-path status block memory */
qede_alloc_mem_sb(struct qede_dev * edev,struct qed_sb_info * sb_info,u16 sb_id)1498 static int qede_alloc_mem_sb(struct qede_dev *edev,
1499 struct qed_sb_info *sb_info, u16 sb_id)
1500 {
1501 struct status_block *sb_virt;
1502 dma_addr_t sb_phys;
1503 int rc;
1504
1505 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1506 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
1507 if (!sb_virt) {
1508 DP_ERR(edev, "Status block allocation failed\n");
1509 return -ENOMEM;
1510 }
1511
1512 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1513 sb_virt, sb_phys, sb_id,
1514 QED_SB_TYPE_L2_QUEUE);
1515 if (rc) {
1516 DP_ERR(edev, "Status block initialization failed\n");
1517 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1518 sb_virt, sb_phys);
1519 return rc;
1520 }
1521
1522 return 0;
1523 }
1524
qede_free_rx_buffers(struct qede_dev * edev,struct qede_rx_queue * rxq)1525 static void qede_free_rx_buffers(struct qede_dev *edev,
1526 struct qede_rx_queue *rxq)
1527 {
1528 u16 i;
1529
1530 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1531 struct sw_rx_data *rx_buf;
1532 struct page *data;
1533
1534 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1535 data = rx_buf->data;
1536
1537 dma_unmap_page(&edev->pdev->dev,
1538 rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
1539
1540 rx_buf->data = NULL;
1541 __free_page(data);
1542 }
1543 }
1544
qede_free_mem_rxq(struct qede_dev * edev,struct qede_rx_queue * rxq)1545 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1546 {
1547 /* Free rx buffers */
1548 qede_free_rx_buffers(edev, rxq);
1549
1550 /* Free the parallel SW ring */
1551 kfree(rxq->sw_rx_ring);
1552
1553 /* Free the real RQ ring used by FW */
1554 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1555 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1556 }
1557
qede_set_tpa_param(struct qede_rx_queue * rxq)1558 static void qede_set_tpa_param(struct qede_rx_queue *rxq)
1559 {
1560 int i;
1561
1562 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
1563 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
1564
1565 tpa_info->state = QEDE_AGG_STATE_NONE;
1566 }
1567 }
1568
1569 /* This function allocates all memory needed per Rx queue */
qede_alloc_mem_rxq(struct qede_dev * edev,struct qede_rx_queue * rxq)1570 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1571 {
1572 struct qed_chain_init_params params = {
1573 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1574 .num_elems = RX_RING_SIZE,
1575 };
1576 struct qed_dev *cdev = edev->cdev;
1577 int i, rc, size;
1578
1579 rxq->num_rx_buffers = edev->q_num_rx_buffers;
1580
1581 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
1582
1583 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD;
1584 size = rxq->rx_headroom +
1585 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1586
1587 /* Make sure that the headroom and payload fit in a single page */
1588 if (rxq->rx_buf_size + size > PAGE_SIZE)
1589 rxq->rx_buf_size = PAGE_SIZE - size;
1590
1591 /* Segment size to split a page in multiple equal parts,
1592 * unless XDP is used in which case we'd use the entire page.
1593 */
1594 if (!edev->xdp_prog) {
1595 size = size + rxq->rx_buf_size;
1596 rxq->rx_buf_seg_size = roundup_pow_of_two(size);
1597 } else {
1598 rxq->rx_buf_seg_size = PAGE_SIZE;
1599 edev->ndev->features &= ~NETIF_F_GRO_HW;
1600 }
1601
1602 /* Allocate the parallel driver ring for Rx buffers */
1603 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
1604 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1605 if (!rxq->sw_rx_ring) {
1606 DP_ERR(edev, "Rx buffers ring allocation failed\n");
1607 rc = -ENOMEM;
1608 goto err;
1609 }
1610
1611 /* Allocate FW Rx ring */
1612 params.mode = QED_CHAIN_MODE_NEXT_PTR;
1613 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE;
1614 params.elem_size = sizeof(struct eth_rx_bd);
1615
1616 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms);
1617 if (rc)
1618 goto err;
1619
1620 /* Allocate FW completion ring */
1621 params.mode = QED_CHAIN_MODE_PBL;
1622 params.intended_use = QED_CHAIN_USE_TO_CONSUME;
1623 params.elem_size = sizeof(union eth_rx_cqe);
1624
1625 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms);
1626 if (rc)
1627 goto err;
1628
1629 /* Allocate buffers for the Rx ring */
1630 rxq->filled_buffers = 0;
1631 for (i = 0; i < rxq->num_rx_buffers; i++) {
1632 rc = qede_alloc_rx_buffer(rxq, false);
1633 if (rc) {
1634 DP_ERR(edev,
1635 "Rx buffers allocation failed at index %d\n", i);
1636 goto err;
1637 }
1638 }
1639
1640 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW);
1641 if (!edev->gro_disable)
1642 qede_set_tpa_param(rxq);
1643 err:
1644 return rc;
1645 }
1646
qede_free_mem_txq(struct qede_dev * edev,struct qede_tx_queue * txq)1647 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1648 {
1649 /* Free the parallel SW ring */
1650 if (txq->is_xdp)
1651 kfree(txq->sw_tx_ring.xdp);
1652 else
1653 kfree(txq->sw_tx_ring.skbs);
1654
1655 /* Free the real RQ ring used by FW */
1656 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1657 }
1658
1659 /* This function allocates all memory needed per Tx queue */
qede_alloc_mem_txq(struct qede_dev * edev,struct qede_tx_queue * txq)1660 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1661 {
1662 struct qed_chain_init_params params = {
1663 .mode = QED_CHAIN_MODE_PBL,
1664 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1665 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1666 .num_elems = edev->q_num_tx_buffers,
1667 .elem_size = sizeof(union eth_tx_bd_types),
1668 };
1669 int size, rc;
1670
1671 txq->num_tx_buffers = edev->q_num_tx_buffers;
1672
1673 /* Allocate the parallel driver ring for Tx buffers */
1674 if (txq->is_xdp) {
1675 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
1676 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
1677 if (!txq->sw_tx_ring.xdp)
1678 goto err;
1679 } else {
1680 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
1681 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
1682 if (!txq->sw_tx_ring.skbs)
1683 goto err;
1684 }
1685
1686 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms);
1687 if (rc)
1688 goto err;
1689
1690 return 0;
1691
1692 err:
1693 qede_free_mem_txq(edev, txq);
1694 return -ENOMEM;
1695 }
1696
1697 /* This function frees all memory of a single fp */
qede_free_mem_fp(struct qede_dev * edev,struct qede_fastpath * fp)1698 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1699 {
1700 qede_free_mem_sb(edev, fp->sb_info, fp->id);
1701
1702 if (fp->type & QEDE_FASTPATH_RX)
1703 qede_free_mem_rxq(edev, fp->rxq);
1704
1705 if (fp->type & QEDE_FASTPATH_XDP)
1706 qede_free_mem_txq(edev, fp->xdp_tx);
1707
1708 if (fp->type & QEDE_FASTPATH_TX) {
1709 int cos;
1710
1711 for_each_cos_in_txq(edev, cos)
1712 qede_free_mem_txq(edev, &fp->txq[cos]);
1713 }
1714 }
1715
1716 /* This function allocates all memory needed for a single fp (i.e. an entity
1717 * which contains status block, one rx queue and/or multiple per-TC tx queues.
1718 */
qede_alloc_mem_fp(struct qede_dev * edev,struct qede_fastpath * fp)1719 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1720 {
1721 int rc = 0;
1722
1723 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
1724 if (rc)
1725 goto out;
1726
1727 if (fp->type & QEDE_FASTPATH_RX) {
1728 rc = qede_alloc_mem_rxq(edev, fp->rxq);
1729 if (rc)
1730 goto out;
1731 }
1732
1733 if (fp->type & QEDE_FASTPATH_XDP) {
1734 rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
1735 if (rc)
1736 goto out;
1737 }
1738
1739 if (fp->type & QEDE_FASTPATH_TX) {
1740 int cos;
1741
1742 for_each_cos_in_txq(edev, cos) {
1743 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]);
1744 if (rc)
1745 goto out;
1746 }
1747 }
1748
1749 out:
1750 return rc;
1751 }
1752
qede_free_mem_load(struct qede_dev * edev)1753 static void qede_free_mem_load(struct qede_dev *edev)
1754 {
1755 int i;
1756
1757 for_each_queue(i) {
1758 struct qede_fastpath *fp = &edev->fp_array[i];
1759
1760 qede_free_mem_fp(edev, fp);
1761 }
1762 }
1763
1764 /* This function allocates all qede memory at NIC load. */
qede_alloc_mem_load(struct qede_dev * edev)1765 static int qede_alloc_mem_load(struct qede_dev *edev)
1766 {
1767 int rc = 0, queue_id;
1768
1769 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
1770 struct qede_fastpath *fp = &edev->fp_array[queue_id];
1771
1772 rc = qede_alloc_mem_fp(edev, fp);
1773 if (rc) {
1774 DP_ERR(edev,
1775 "Failed to allocate memory for fastpath - rss id = %d\n",
1776 queue_id);
1777 qede_free_mem_load(edev);
1778 return rc;
1779 }
1780 }
1781
1782 return 0;
1783 }
1784
qede_empty_tx_queue(struct qede_dev * edev,struct qede_tx_queue * txq)1785 static void qede_empty_tx_queue(struct qede_dev *edev,
1786 struct qede_tx_queue *txq)
1787 {
1788 unsigned int pkts_compl = 0, bytes_compl = 0;
1789 struct netdev_queue *netdev_txq;
1790 int rc, len = 0;
1791
1792 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
1793
1794 while (qed_chain_get_cons_idx(&txq->tx_pbl) !=
1795 qed_chain_get_prod_idx(&txq->tx_pbl)) {
1796 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1797 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1798 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl),
1799 qed_chain_get_prod_idx(&txq->tx_pbl));
1800
1801 rc = qede_free_tx_pkt(edev, txq, &len);
1802 if (rc) {
1803 DP_NOTICE(edev,
1804 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1805 txq->index,
1806 qed_chain_get_cons_idx(&txq->tx_pbl),
1807 qed_chain_get_prod_idx(&txq->tx_pbl));
1808 break;
1809 }
1810
1811 bytes_compl += len;
1812 pkts_compl++;
1813 txq->sw_tx_cons++;
1814 }
1815
1816 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
1817 }
1818
qede_empty_tx_queues(struct qede_dev * edev)1819 static void qede_empty_tx_queues(struct qede_dev *edev)
1820 {
1821 int i;
1822
1823 for_each_queue(i)
1824 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1825 int cos;
1826
1827 for_each_cos_in_txq(edev, cos) {
1828 struct qede_fastpath *fp;
1829
1830 fp = &edev->fp_array[i];
1831 qede_empty_tx_queue(edev,
1832 &fp->txq[cos]);
1833 }
1834 }
1835 }
1836
1837 /* This function inits fp content and resets the SB, RXQ and TXQ structures */
qede_init_fp(struct qede_dev * edev)1838 static void qede_init_fp(struct qede_dev *edev)
1839 {
1840 int queue_id, rxq_index = 0, txq_index = 0;
1841 struct qede_fastpath *fp;
1842 bool init_xdp = false;
1843
1844 for_each_queue(queue_id) {
1845 fp = &edev->fp_array[queue_id];
1846
1847 fp->edev = edev;
1848 fp->id = queue_id;
1849
1850 if (fp->type & QEDE_FASTPATH_XDP) {
1851 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
1852 rxq_index);
1853 fp->xdp_tx->is_xdp = 1;
1854
1855 spin_lock_init(&fp->xdp_tx->xdp_tx_lock);
1856 init_xdp = true;
1857 }
1858
1859 if (fp->type & QEDE_FASTPATH_RX) {
1860 fp->rxq->rxq_id = rxq_index++;
1861
1862 /* Determine how to map buffers for this queue */
1863 if (fp->type & QEDE_FASTPATH_XDP)
1864 fp->rxq->data_direction = DMA_BIDIRECTIONAL;
1865 else
1866 fp->rxq->data_direction = DMA_FROM_DEVICE;
1867 fp->rxq->dev = &edev->pdev->dev;
1868
1869 /* Driver have no error path from here */
1870 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev,
1871 fp->rxq->rxq_id, 0) < 0);
1872
1873 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq,
1874 MEM_TYPE_PAGE_ORDER0,
1875 NULL)) {
1876 DP_NOTICE(edev,
1877 "Failed to register XDP memory model\n");
1878 }
1879 }
1880
1881 if (fp->type & QEDE_FASTPATH_TX) {
1882 int cos;
1883
1884 for_each_cos_in_txq(edev, cos) {
1885 struct qede_tx_queue *txq = &fp->txq[cos];
1886 u16 ndev_tx_id;
1887
1888 txq->cos = cos;
1889 txq->index = txq_index;
1890 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq);
1891 txq->ndev_txq_id = ndev_tx_id;
1892
1893 if (edev->dev_info.is_legacy)
1894 txq->is_legacy = true;
1895 txq->dev = &edev->pdev->dev;
1896 }
1897
1898 txq_index++;
1899 }
1900
1901 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1902 edev->ndev->name, queue_id);
1903 }
1904
1905 if (init_xdp) {
1906 edev->total_xdp_queues = QEDE_RSS_COUNT(edev);
1907 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues);
1908 }
1909 }
1910
qede_set_real_num_queues(struct qede_dev * edev)1911 static int qede_set_real_num_queues(struct qede_dev *edev)
1912 {
1913 int rc = 0;
1914
1915 rc = netif_set_real_num_tx_queues(edev->ndev,
1916 QEDE_TSS_COUNT(edev) *
1917 edev->dev_info.num_tc);
1918 if (rc) {
1919 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1920 return rc;
1921 }
1922
1923 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
1924 if (rc) {
1925 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1926 return rc;
1927 }
1928
1929 return 0;
1930 }
1931
qede_napi_disable_remove(struct qede_dev * edev)1932 static void qede_napi_disable_remove(struct qede_dev *edev)
1933 {
1934 int i;
1935
1936 for_each_queue(i) {
1937 napi_disable(&edev->fp_array[i].napi);
1938
1939 netif_napi_del(&edev->fp_array[i].napi);
1940 }
1941 }
1942
qede_napi_add_enable(struct qede_dev * edev)1943 static void qede_napi_add_enable(struct qede_dev *edev)
1944 {
1945 int i;
1946
1947 /* Add NAPI objects */
1948 for_each_queue(i) {
1949 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, qede_poll);
1950 napi_enable(&edev->fp_array[i].napi);
1951 }
1952 }
1953
qede_sync_free_irqs(struct qede_dev * edev)1954 static void qede_sync_free_irqs(struct qede_dev *edev)
1955 {
1956 int i;
1957
1958 for (i = 0; i < edev->int_info.used_cnt; i++) {
1959 if (edev->int_info.msix_cnt) {
1960 free_irq(edev->int_info.msix[i].vector,
1961 &edev->fp_array[i]);
1962 } else {
1963 edev->ops->common->simd_handler_clean(edev->cdev, i);
1964 }
1965 }
1966
1967 edev->int_info.used_cnt = 0;
1968 edev->int_info.msix_cnt = 0;
1969 }
1970
qede_req_msix_irqs(struct qede_dev * edev)1971 static int qede_req_msix_irqs(struct qede_dev *edev)
1972 {
1973 int i, rc;
1974
1975 /* Sanitize number of interrupts == number of prepared RSS queues */
1976 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
1977 DP_ERR(edev,
1978 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
1979 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
1980 return -EINVAL;
1981 }
1982
1983 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
1984 #ifdef CONFIG_RFS_ACCEL
1985 struct qede_fastpath *fp = &edev->fp_array[i];
1986
1987 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
1988 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
1989 edev->int_info.msix[i].vector);
1990 if (rc) {
1991 DP_ERR(edev, "Failed to add CPU rmap\n");
1992 qede_free_arfs(edev);
1993 }
1994 }
1995 #endif
1996 rc = request_irq(edev->int_info.msix[i].vector,
1997 qede_msix_fp_int, 0, edev->fp_array[i].name,
1998 &edev->fp_array[i]);
1999 if (rc) {
2000 DP_ERR(edev, "Request fp %d irq failed\n", i);
2001 #ifdef CONFIG_RFS_ACCEL
2002 if (edev->ndev->rx_cpu_rmap)
2003 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
2004
2005 edev->ndev->rx_cpu_rmap = NULL;
2006 #endif
2007 qede_sync_free_irqs(edev);
2008 return rc;
2009 }
2010 DP_VERBOSE(edev, NETIF_MSG_INTR,
2011 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2012 edev->fp_array[i].name, i,
2013 &edev->fp_array[i]);
2014 edev->int_info.used_cnt++;
2015 }
2016
2017 return 0;
2018 }
2019
qede_simd_fp_handler(void * cookie)2020 static void qede_simd_fp_handler(void *cookie)
2021 {
2022 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2023
2024 napi_schedule_irqoff(&fp->napi);
2025 }
2026
qede_setup_irqs(struct qede_dev * edev)2027 static int qede_setup_irqs(struct qede_dev *edev)
2028 {
2029 int i, rc = 0;
2030
2031 /* Learn Interrupt configuration */
2032 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2033 if (rc)
2034 return rc;
2035
2036 if (edev->int_info.msix_cnt) {
2037 rc = qede_req_msix_irqs(edev);
2038 if (rc)
2039 return rc;
2040 edev->ndev->irq = edev->int_info.msix[0].vector;
2041 } else {
2042 const struct qed_common_ops *ops;
2043
2044 /* qed should learn receive the RSS ids and callbacks */
2045 ops = edev->ops->common;
2046 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
2047 ops->simd_handler_config(edev->cdev,
2048 &edev->fp_array[i], i,
2049 qede_simd_fp_handler);
2050 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
2051 }
2052 return 0;
2053 }
2054
qede_drain_txq(struct qede_dev * edev,struct qede_tx_queue * txq,bool allow_drain)2055 static int qede_drain_txq(struct qede_dev *edev,
2056 struct qede_tx_queue *txq, bool allow_drain)
2057 {
2058 int rc, cnt = 1000;
2059
2060 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2061 if (!cnt) {
2062 if (allow_drain) {
2063 DP_NOTICE(edev,
2064 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2065 txq->index);
2066 rc = edev->ops->common->drain(edev->cdev);
2067 if (rc)
2068 return rc;
2069 return qede_drain_txq(edev, txq, false);
2070 }
2071 DP_NOTICE(edev,
2072 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2073 txq->index, txq->sw_tx_prod,
2074 txq->sw_tx_cons);
2075 return -ENODEV;
2076 }
2077 cnt--;
2078 usleep_range(1000, 2000);
2079 barrier();
2080 }
2081
2082 /* FW finished processing, wait for HW to transmit all tx packets */
2083 usleep_range(1000, 2000);
2084
2085 return 0;
2086 }
2087
qede_stop_txq(struct qede_dev * edev,struct qede_tx_queue * txq,int rss_id)2088 static int qede_stop_txq(struct qede_dev *edev,
2089 struct qede_tx_queue *txq, int rss_id)
2090 {
2091 /* delete doorbell from doorbell recovery mechanism */
2092 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr,
2093 &txq->tx_db);
2094
2095 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
2096 }
2097
qede_stop_queues(struct qede_dev * edev)2098 static int qede_stop_queues(struct qede_dev *edev)
2099 {
2100 struct qed_update_vport_params *vport_update_params;
2101 struct qed_dev *cdev = edev->cdev;
2102 struct qede_fastpath *fp;
2103 int rc, i;
2104
2105 /* Disable the vport */
2106 vport_update_params = vzalloc(sizeof(*vport_update_params));
2107 if (!vport_update_params)
2108 return -ENOMEM;
2109
2110 vport_update_params->vport_id = 0;
2111 vport_update_params->update_vport_active_flg = 1;
2112 vport_update_params->vport_active_flg = 0;
2113 vport_update_params->update_rss_flg = 0;
2114
2115 rc = edev->ops->vport_update(cdev, vport_update_params);
2116 vfree(vport_update_params);
2117
2118 if (rc) {
2119 DP_ERR(edev, "Failed to update vport\n");
2120 return rc;
2121 }
2122
2123 /* Flush Tx queues. If needed, request drain from MCP */
2124 for_each_queue(i) {
2125 fp = &edev->fp_array[i];
2126
2127 if (fp->type & QEDE_FASTPATH_TX) {
2128 int cos;
2129
2130 for_each_cos_in_txq(edev, cos) {
2131 rc = qede_drain_txq(edev, &fp->txq[cos], true);
2132 if (rc)
2133 return rc;
2134 }
2135 }
2136
2137 if (fp->type & QEDE_FASTPATH_XDP) {
2138 rc = qede_drain_txq(edev, fp->xdp_tx, true);
2139 if (rc)
2140 return rc;
2141 }
2142 }
2143
2144 /* Stop all Queues in reverse order */
2145 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
2146 fp = &edev->fp_array[i];
2147
2148 /* Stop the Tx Queue(s) */
2149 if (fp->type & QEDE_FASTPATH_TX) {
2150 int cos;
2151
2152 for_each_cos_in_txq(edev, cos) {
2153 rc = qede_stop_txq(edev, &fp->txq[cos], i);
2154 if (rc)
2155 return rc;
2156 }
2157 }
2158
2159 /* Stop the Rx Queue */
2160 if (fp->type & QEDE_FASTPATH_RX) {
2161 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
2162 if (rc) {
2163 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2164 return rc;
2165 }
2166 }
2167
2168 /* Stop the XDP forwarding queue */
2169 if (fp->type & QEDE_FASTPATH_XDP) {
2170 rc = qede_stop_txq(edev, fp->xdp_tx, i);
2171 if (rc)
2172 return rc;
2173
2174 bpf_prog_put(fp->rxq->xdp_prog);
2175 }
2176 }
2177
2178 /* Stop the vport */
2179 rc = edev->ops->vport_stop(cdev, 0);
2180 if (rc)
2181 DP_ERR(edev, "Failed to stop VPORT\n");
2182
2183 return rc;
2184 }
2185
qede_start_txq(struct qede_dev * edev,struct qede_fastpath * fp,struct qede_tx_queue * txq,u8 rss_id,u16 sb_idx)2186 static int qede_start_txq(struct qede_dev *edev,
2187 struct qede_fastpath *fp,
2188 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
2189 {
2190 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
2191 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
2192 struct qed_queue_start_common_params params;
2193 struct qed_txq_start_ret_params ret_params;
2194 int rc;
2195
2196 memset(¶ms, 0, sizeof(params));
2197 memset(&ret_params, 0, sizeof(ret_params));
2198
2199 /* Let the XDP queue share the queue-zone with one of the regular txq.
2200 * We don't really care about its coalescing.
2201 */
2202 if (txq->is_xdp)
2203 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
2204 else
2205 params.queue_id = txq->index;
2206
2207 params.p_sb = fp->sb_info;
2208 params.sb_idx = sb_idx;
2209 params.tc = txq->cos;
2210
2211 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table,
2212 page_cnt, &ret_params);
2213 if (rc) {
2214 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
2215 return rc;
2216 }
2217
2218 txq->doorbell_addr = ret_params.p_doorbell;
2219 txq->handle = ret_params.p_handle;
2220
2221 /* Determine the FW consumer address associated */
2222 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
2223
2224 /* Prepare the doorbell parameters */
2225 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
2226 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
2227 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
2228 DQ_XCM_ETH_TX_BD_PROD_CMD);
2229 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2230
2231 /* register doorbell with doorbell recovery mechanism */
2232 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr,
2233 &txq->tx_db, DB_REC_WIDTH_32B,
2234 DB_REC_KERNEL);
2235
2236 return rc;
2237 }
2238
qede_start_queues(struct qede_dev * edev,bool clear_stats)2239 static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2240 {
2241 int vlan_removal_en = 1;
2242 struct qed_dev *cdev = edev->cdev;
2243 struct qed_dev_info *qed_info = &edev->dev_info.common;
2244 struct qed_update_vport_params *vport_update_params;
2245 struct qed_queue_start_common_params q_params;
2246 struct qed_start_vport_params start = {0};
2247 int rc, i;
2248
2249 if (!edev->num_queues) {
2250 DP_ERR(edev,
2251 "Cannot update V-VPORT as active as there are no Rx queues\n");
2252 return -EINVAL;
2253 }
2254
2255 vport_update_params = vzalloc(sizeof(*vport_update_params));
2256 if (!vport_update_params)
2257 return -ENOMEM;
2258
2259 start.handle_ptp_pkts = !!(edev->ptp);
2260 start.gro_enable = !edev->gro_disable;
2261 start.mtu = edev->ndev->mtu;
2262 start.vport_id = 0;
2263 start.drop_ttl0 = true;
2264 start.remove_inner_vlan = vlan_removal_en;
2265 start.clear_stats = clear_stats;
2266
2267 rc = edev->ops->vport_start(cdev, &start);
2268
2269 if (rc) {
2270 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2271 goto out;
2272 }
2273
2274 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2275 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2276 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2277
2278 for_each_queue(i) {
2279 struct qede_fastpath *fp = &edev->fp_array[i];
2280 dma_addr_t p_phys_table;
2281 u32 page_cnt;
2282
2283 if (fp->type & QEDE_FASTPATH_RX) {
2284 struct qed_rxq_start_ret_params ret_params;
2285 struct qede_rx_queue *rxq = fp->rxq;
2286 __le16 *val;
2287
2288 memset(&ret_params, 0, sizeof(ret_params));
2289 memset(&q_params, 0, sizeof(q_params));
2290 q_params.queue_id = rxq->rxq_id;
2291 q_params.vport_id = 0;
2292 q_params.p_sb = fp->sb_info;
2293 q_params.sb_idx = RX_PI;
2294
2295 p_phys_table =
2296 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
2297 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
2298
2299 rc = edev->ops->q_rx_start(cdev, i, &q_params,
2300 rxq->rx_buf_size,
2301 rxq->rx_bd_ring.p_phys_addr,
2302 p_phys_table,
2303 page_cnt, &ret_params);
2304 if (rc) {
2305 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
2306 rc);
2307 goto out;
2308 }
2309
2310 /* Use the return parameters */
2311 rxq->hw_rxq_prod_addr = ret_params.p_prod;
2312 rxq->handle = ret_params.p_handle;
2313
2314 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
2315 rxq->hw_cons_ptr = val;
2316
2317 qede_update_rx_prod(edev, rxq);
2318 }
2319
2320 if (fp->type & QEDE_FASTPATH_XDP) {
2321 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
2322 if (rc)
2323 goto out;
2324
2325 bpf_prog_add(edev->xdp_prog, 1);
2326 fp->rxq->xdp_prog = edev->xdp_prog;
2327 }
2328
2329 if (fp->type & QEDE_FASTPATH_TX) {
2330 int cos;
2331
2332 for_each_cos_in_txq(edev, cos) {
2333 rc = qede_start_txq(edev, fp, &fp->txq[cos], i,
2334 TX_PI(cos));
2335 if (rc)
2336 goto out;
2337 }
2338 }
2339 }
2340
2341 /* Prepare and send the vport enable */
2342 vport_update_params->vport_id = start.vport_id;
2343 vport_update_params->update_vport_active_flg = 1;
2344 vport_update_params->vport_active_flg = 1;
2345
2346 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) &&
2347 qed_info->tx_switching) {
2348 vport_update_params->update_tx_switching_flg = 1;
2349 vport_update_params->tx_switching_flg = 1;
2350 }
2351
2352 qede_fill_rss_params(edev, &vport_update_params->rss_params,
2353 &vport_update_params->update_rss_flg);
2354
2355 rc = edev->ops->vport_update(cdev, vport_update_params);
2356 if (rc)
2357 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2358
2359 out:
2360 vfree(vport_update_params);
2361 return rc;
2362 }
2363
2364 enum qede_unload_mode {
2365 QEDE_UNLOAD_NORMAL,
2366 QEDE_UNLOAD_RECOVERY,
2367 };
2368
qede_unload(struct qede_dev * edev,enum qede_unload_mode mode,bool is_locked)2369 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
2370 bool is_locked)
2371 {
2372 struct qed_link_params link_params;
2373 int rc;
2374
2375 DP_INFO(edev, "Starting qede unload\n");
2376
2377 if (!is_locked)
2378 __qede_lock(edev);
2379
2380 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2381
2382 if (mode != QEDE_UNLOAD_RECOVERY)
2383 edev->state = QEDE_STATE_CLOSED;
2384
2385 qede_rdma_dev_event_close(edev);
2386
2387 /* Close OS Tx */
2388 netif_tx_disable(edev->ndev);
2389 netif_carrier_off(edev->ndev);
2390
2391 if (mode != QEDE_UNLOAD_RECOVERY) {
2392 /* Reset the link */
2393 memset(&link_params, 0, sizeof(link_params));
2394 link_params.link_up = false;
2395 edev->ops->common->set_link(edev->cdev, &link_params);
2396
2397 rc = qede_stop_queues(edev);
2398 if (rc) {
2399 #ifdef CONFIG_RFS_ACCEL
2400 if (edev->dev_info.common.b_arfs_capable) {
2401 qede_poll_for_freeing_arfs_filters(edev);
2402 if (edev->ndev->rx_cpu_rmap)
2403 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
2404
2405 edev->ndev->rx_cpu_rmap = NULL;
2406 }
2407 #endif
2408 qede_sync_free_irqs(edev);
2409 goto out;
2410 }
2411
2412 DP_INFO(edev, "Stopped Queues\n");
2413 }
2414
2415 qede_vlan_mark_nonconfigured(edev);
2416 edev->ops->fastpath_stop(edev->cdev);
2417
2418 if (edev->dev_info.common.b_arfs_capable) {
2419 qede_poll_for_freeing_arfs_filters(edev);
2420 qede_free_arfs(edev);
2421 }
2422
2423 /* Release the interrupts */
2424 qede_sync_free_irqs(edev);
2425 edev->ops->common->set_fp_int(edev->cdev, 0);
2426
2427 qede_napi_disable_remove(edev);
2428
2429 if (mode == QEDE_UNLOAD_RECOVERY)
2430 qede_empty_tx_queues(edev);
2431
2432 qede_free_mem_load(edev);
2433 qede_free_fp_array(edev);
2434
2435 out:
2436 if (!is_locked)
2437 __qede_unlock(edev);
2438
2439 if (mode != QEDE_UNLOAD_RECOVERY)
2440 DP_NOTICE(edev, "Link is down\n");
2441
2442 edev->ptp_skip_txts = 0;
2443
2444 DP_INFO(edev, "Ending qede unload\n");
2445 }
2446
2447 enum qede_load_mode {
2448 QEDE_LOAD_NORMAL,
2449 QEDE_LOAD_RELOAD,
2450 QEDE_LOAD_RECOVERY,
2451 };
2452
qede_load(struct qede_dev * edev,enum qede_load_mode mode,bool is_locked)2453 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
2454 bool is_locked)
2455 {
2456 struct qed_link_params link_params;
2457 struct ethtool_coalesce coal = {};
2458 u8 num_tc;
2459 int rc, i;
2460
2461 DP_INFO(edev, "Starting qede load\n");
2462
2463 if (!is_locked)
2464 __qede_lock(edev);
2465
2466 rc = qede_set_num_queues(edev);
2467 if (rc)
2468 goto out;
2469
2470 rc = qede_alloc_fp_array(edev);
2471 if (rc)
2472 goto out;
2473
2474 qede_init_fp(edev);
2475
2476 rc = qede_alloc_mem_load(edev);
2477 if (rc)
2478 goto err1;
2479 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
2480 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
2481
2482 rc = qede_set_real_num_queues(edev);
2483 if (rc)
2484 goto err2;
2485
2486 if (qede_alloc_arfs(edev)) {
2487 edev->ndev->features &= ~NETIF_F_NTUPLE;
2488 edev->dev_info.common.b_arfs_capable = false;
2489 }
2490
2491 qede_napi_add_enable(edev);
2492 DP_INFO(edev, "Napi added and enabled\n");
2493
2494 rc = qede_setup_irqs(edev);
2495 if (rc)
2496 goto err3;
2497 DP_INFO(edev, "Setup IRQs succeeded\n");
2498
2499 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2500 if (rc)
2501 goto err4;
2502 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2503
2504 num_tc = netdev_get_num_tc(edev->ndev);
2505 num_tc = num_tc ? num_tc : edev->dev_info.num_tc;
2506 qede_setup_tc(edev->ndev, num_tc);
2507
2508 /* Program un-configured VLANs */
2509 qede_configure_vlan_filters(edev);
2510
2511 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2512
2513 /* Ask for link-up using current configuration */
2514 memset(&link_params, 0, sizeof(link_params));
2515 link_params.link_up = true;
2516 edev->ops->common->set_link(edev->cdev, &link_params);
2517
2518 edev->state = QEDE_STATE_OPEN;
2519
2520 coal.rx_coalesce_usecs = QED_DEFAULT_RX_USECS;
2521 coal.tx_coalesce_usecs = QED_DEFAULT_TX_USECS;
2522
2523 for_each_queue(i) {
2524 if (edev->coal_entry[i].isvalid) {
2525 coal.rx_coalesce_usecs = edev->coal_entry[i].rxc;
2526 coal.tx_coalesce_usecs = edev->coal_entry[i].txc;
2527 }
2528 __qede_unlock(edev);
2529 qede_set_per_coalesce(edev->ndev, i, &coal);
2530 __qede_lock(edev);
2531 }
2532 DP_INFO(edev, "Ending successfully qede load\n");
2533
2534 goto out;
2535 err4:
2536 qede_sync_free_irqs(edev);
2537 err3:
2538 qede_napi_disable_remove(edev);
2539 err2:
2540 qede_free_mem_load(edev);
2541 err1:
2542 edev->ops->common->set_fp_int(edev->cdev, 0);
2543 qede_free_fp_array(edev);
2544 edev->num_queues = 0;
2545 edev->fp_num_tx = 0;
2546 edev->fp_num_rx = 0;
2547 out:
2548 if (!is_locked)
2549 __qede_unlock(edev);
2550
2551 return rc;
2552 }
2553
2554 /* 'func' should be able to run between unload and reload assuming interface
2555 * is actually running, or afterwards in case it's currently DOWN.
2556 */
qede_reload(struct qede_dev * edev,struct qede_reload_args * args,bool is_locked)2557 void qede_reload(struct qede_dev *edev,
2558 struct qede_reload_args *args, bool is_locked)
2559 {
2560 if (!is_locked)
2561 __qede_lock(edev);
2562
2563 /* Since qede_lock is held, internal state wouldn't change even
2564 * if netdev state would start transitioning. Check whether current
2565 * internal configuration indicates device is up, then reload.
2566 */
2567 if (edev->state == QEDE_STATE_OPEN) {
2568 qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
2569 if (args)
2570 args->func(edev, args);
2571 qede_load(edev, QEDE_LOAD_RELOAD, true);
2572
2573 /* Since no one is going to do it for us, re-configure */
2574 qede_config_rx_mode(edev->ndev);
2575 } else if (args) {
2576 args->func(edev, args);
2577 }
2578
2579 if (!is_locked)
2580 __qede_unlock(edev);
2581 }
2582
2583 /* called with rtnl_lock */
qede_open(struct net_device * ndev)2584 static int qede_open(struct net_device *ndev)
2585 {
2586 struct qede_dev *edev = netdev_priv(ndev);
2587 int rc;
2588
2589 netif_carrier_off(ndev);
2590
2591 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2592
2593 rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
2594 if (rc)
2595 return rc;
2596
2597 udp_tunnel_nic_reset_ntf(ndev);
2598
2599 edev->ops->common->update_drv_state(edev->cdev, true);
2600
2601 return 0;
2602 }
2603
qede_close(struct net_device * ndev)2604 static int qede_close(struct net_device *ndev)
2605 {
2606 struct qede_dev *edev = netdev_priv(ndev);
2607
2608 qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
2609
2610 if (edev->cdev)
2611 edev->ops->common->update_drv_state(edev->cdev, false);
2612
2613 return 0;
2614 }
2615
qede_link_update(void * dev,struct qed_link_output * link)2616 static void qede_link_update(void *dev, struct qed_link_output *link)
2617 {
2618 struct qede_dev *edev = dev;
2619
2620 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) {
2621 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n");
2622 return;
2623 }
2624
2625 if (link->link_up) {
2626 if (!netif_carrier_ok(edev->ndev)) {
2627 DP_NOTICE(edev, "Link is up\n");
2628 netif_tx_start_all_queues(edev->ndev);
2629 netif_carrier_on(edev->ndev);
2630 qede_rdma_dev_event_open(edev);
2631 }
2632 } else {
2633 if (netif_carrier_ok(edev->ndev)) {
2634 DP_NOTICE(edev, "Link is down\n");
2635 netif_tx_disable(edev->ndev);
2636 netif_carrier_off(edev->ndev);
2637 qede_rdma_dev_event_close(edev);
2638 }
2639 }
2640 }
2641
qede_schedule_recovery_handler(void * dev)2642 static void qede_schedule_recovery_handler(void *dev)
2643 {
2644 struct qede_dev *edev = dev;
2645
2646 if (edev->state == QEDE_STATE_RECOVERY) {
2647 DP_NOTICE(edev,
2648 "Avoid scheduling a recovery handling since already in recovery state\n");
2649 return;
2650 }
2651
2652 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags);
2653 schedule_delayed_work(&edev->sp_task, 0);
2654
2655 DP_INFO(edev, "Scheduled a recovery handler\n");
2656 }
2657
qede_recovery_failed(struct qede_dev * edev)2658 static void qede_recovery_failed(struct qede_dev *edev)
2659 {
2660 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n");
2661
2662 netif_device_detach(edev->ndev);
2663
2664 if (edev->cdev)
2665 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot);
2666 }
2667
qede_recovery_handler(struct qede_dev * edev)2668 static void qede_recovery_handler(struct qede_dev *edev)
2669 {
2670 u32 curr_state = edev->state;
2671 int rc;
2672
2673 DP_NOTICE(edev, "Starting a recovery process\n");
2674
2675 /* No need to acquire first the qede_lock since is done by qede_sp_task
2676 * before calling this function.
2677 */
2678 edev->state = QEDE_STATE_RECOVERY;
2679
2680 edev->ops->common->recovery_prolog(edev->cdev);
2681
2682 if (curr_state == QEDE_STATE_OPEN)
2683 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true);
2684
2685 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY);
2686
2687 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level,
2688 IS_VF(edev), QEDE_PROBE_RECOVERY);
2689 if (rc) {
2690 edev->cdev = NULL;
2691 goto err;
2692 }
2693
2694 if (curr_state == QEDE_STATE_OPEN) {
2695 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true);
2696 if (rc)
2697 goto err;
2698
2699 qede_config_rx_mode(edev->ndev);
2700 udp_tunnel_nic_reset_ntf(edev->ndev);
2701 }
2702
2703 edev->state = curr_state;
2704
2705 DP_NOTICE(edev, "Recovery handling is done\n");
2706
2707 return;
2708
2709 err:
2710 qede_recovery_failed(edev);
2711 }
2712
qede_atomic_hw_err_handler(struct qede_dev * edev)2713 static void qede_atomic_hw_err_handler(struct qede_dev *edev)
2714 {
2715 struct qed_dev *cdev = edev->cdev;
2716
2717 DP_NOTICE(edev,
2718 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n",
2719 edev->err_flags);
2720
2721 /* Get a call trace of the flow that led to the error */
2722 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags));
2723
2724 /* Prevent HW attentions from being reasserted */
2725 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags))
2726 edev->ops->common->attn_clr_enable(cdev, true);
2727
2728 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n");
2729 }
2730
qede_generic_hw_err_handler(struct qede_dev * edev)2731 static void qede_generic_hw_err_handler(struct qede_dev *edev)
2732 {
2733 DP_NOTICE(edev,
2734 "Generic sleepable HW error handling started - err_flags 0x%lx\n",
2735 edev->err_flags);
2736
2737 if (edev->devlink) {
2738 DP_NOTICE(edev, "Reporting fatal error to devlink\n");
2739 edev->ops->common->report_fatal_error(edev->devlink, edev->last_err_type);
2740 }
2741
2742 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2743
2744 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n");
2745 }
2746
qede_set_hw_err_flags(struct qede_dev * edev,enum qed_hw_err_type err_type)2747 static void qede_set_hw_err_flags(struct qede_dev *edev,
2748 enum qed_hw_err_type err_type)
2749 {
2750 unsigned long err_flags = 0;
2751
2752 switch (err_type) {
2753 case QED_HW_ERR_DMAE_FAIL:
2754 set_bit(QEDE_ERR_WARN, &err_flags);
2755 fallthrough;
2756 case QED_HW_ERR_MFW_RESP_FAIL:
2757 case QED_HW_ERR_HW_ATTN:
2758 case QED_HW_ERR_RAMROD_FAIL:
2759 case QED_HW_ERR_FW_ASSERT:
2760 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags);
2761 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags);
2762 /* make this error as recoverable and start recovery*/
2763 set_bit(QEDE_ERR_IS_RECOVERABLE, &err_flags);
2764 break;
2765
2766 default:
2767 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type);
2768 break;
2769 }
2770
2771 edev->err_flags |= err_flags;
2772 }
2773
qede_schedule_hw_err_handler(void * dev,enum qed_hw_err_type err_type)2774 static void qede_schedule_hw_err_handler(void *dev,
2775 enum qed_hw_err_type err_type)
2776 {
2777 struct qede_dev *edev = dev;
2778
2779 /* Fan failure cannot be masked by handling of another HW error or by a
2780 * concurrent recovery process.
2781 */
2782 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
2783 edev->state == QEDE_STATE_RECOVERY) &&
2784 err_type != QED_HW_ERR_FAN_FAIL) {
2785 DP_INFO(edev,
2786 "Avoid scheduling an error handling while another HW error is being handled\n");
2787 return;
2788 }
2789
2790 if (err_type >= QED_HW_ERR_LAST) {
2791 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type);
2792 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2793 return;
2794 }
2795
2796 edev->last_err_type = err_type;
2797 qede_set_hw_err_flags(edev, err_type);
2798 qede_atomic_hw_err_handler(edev);
2799 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
2800 schedule_delayed_work(&edev->sp_task, 0);
2801
2802 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type);
2803 }
2804
qede_is_txq_full(struct qede_dev * edev,struct qede_tx_queue * txq)2805 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq)
2806 {
2807 struct netdev_queue *netdev_txq;
2808
2809 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
2810 if (netif_xmit_stopped(netdev_txq))
2811 return true;
2812
2813 return false;
2814 }
2815
qede_get_generic_tlv_data(void * dev,struct qed_generic_tlvs * data)2816 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data)
2817 {
2818 struct qede_dev *edev = dev;
2819 struct netdev_hw_addr *ha;
2820 int i;
2821
2822 if (edev->ndev->features & NETIF_F_IP_CSUM)
2823 data->feat_flags |= QED_TLV_IP_CSUM;
2824 if (edev->ndev->features & NETIF_F_TSO)
2825 data->feat_flags |= QED_TLV_LSO;
2826
2827 ether_addr_copy(data->mac[0], edev->ndev->dev_addr);
2828 eth_zero_addr(data->mac[1]);
2829 eth_zero_addr(data->mac[2]);
2830 /* Copy the first two UC macs */
2831 netif_addr_lock_bh(edev->ndev);
2832 i = 1;
2833 netdev_for_each_uc_addr(ha, edev->ndev) {
2834 ether_addr_copy(data->mac[i++], ha->addr);
2835 if (i == QED_TLV_MAC_COUNT)
2836 break;
2837 }
2838
2839 netif_addr_unlock_bh(edev->ndev);
2840 }
2841
qede_get_eth_tlv_data(void * dev,void * data)2842 static void qede_get_eth_tlv_data(void *dev, void *data)
2843 {
2844 struct qed_mfw_tlv_eth *etlv = data;
2845 struct qede_dev *edev = dev;
2846 struct qede_fastpath *fp;
2847 int i;
2848
2849 etlv->lso_maxoff_size = 0XFFFF;
2850 etlv->lso_maxoff_size_set = true;
2851 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN;
2852 etlv->lso_minseg_size_set = true;
2853 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC);
2854 etlv->prom_mode_set = true;
2855 etlv->tx_descr_size = QEDE_TSS_COUNT(edev);
2856 etlv->tx_descr_size_set = true;
2857 etlv->rx_descr_size = QEDE_RSS_COUNT(edev);
2858 etlv->rx_descr_size_set = true;
2859 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB;
2860 etlv->iov_offload_set = true;
2861
2862 /* Fill information regarding queues; Should be done under the qede
2863 * lock to guarantee those don't change beneath our feet.
2864 */
2865 etlv->txqs_empty = true;
2866 etlv->rxqs_empty = true;
2867 etlv->num_txqs_full = 0;
2868 etlv->num_rxqs_full = 0;
2869
2870 __qede_lock(edev);
2871 for_each_queue(i) {
2872 fp = &edev->fp_array[i];
2873 if (fp->type & QEDE_FASTPATH_TX) {
2874 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp);
2875
2876 if (txq->sw_tx_cons != txq->sw_tx_prod)
2877 etlv->txqs_empty = false;
2878 if (qede_is_txq_full(edev, txq))
2879 etlv->num_txqs_full++;
2880 }
2881 if (fp->type & QEDE_FASTPATH_RX) {
2882 if (qede_has_rx_work(fp->rxq))
2883 etlv->rxqs_empty = false;
2884
2885 /* This one is a bit tricky; Firmware might stop
2886 * placing packets if ring is not yet full.
2887 * Give an approximation.
2888 */
2889 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) -
2890 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) >
2891 RX_RING_SIZE - 100)
2892 etlv->num_rxqs_full++;
2893 }
2894 }
2895 __qede_unlock(edev);
2896
2897 etlv->txqs_empty_set = true;
2898 etlv->rxqs_empty_set = true;
2899 etlv->num_txqs_full_set = true;
2900 etlv->num_rxqs_full_set = true;
2901 }
2902
2903 /**
2904 * qede_io_error_detected(): Called when PCI error is detected
2905 *
2906 * @pdev: Pointer to PCI device
2907 * @state: The current pci connection state
2908 *
2909 *Return: pci_ers_result_t.
2910 *
2911 * This function is called after a PCI bus error affecting
2912 * this device has been detected.
2913 */
2914 static pci_ers_result_t
qede_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)2915 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2916 {
2917 struct net_device *dev = pci_get_drvdata(pdev);
2918 struct qede_dev *edev = netdev_priv(dev);
2919
2920 if (!edev)
2921 return PCI_ERS_RESULT_NONE;
2922
2923 DP_NOTICE(edev, "IO error detected [%d]\n", state);
2924
2925 __qede_lock(edev);
2926 if (edev->state == QEDE_STATE_RECOVERY) {
2927 DP_NOTICE(edev, "Device already in the recovery state\n");
2928 __qede_unlock(edev);
2929 return PCI_ERS_RESULT_NONE;
2930 }
2931
2932 /* PF handles the recovery of its VFs */
2933 if (IS_VF(edev)) {
2934 DP_VERBOSE(edev, QED_MSG_IOV,
2935 "VF recovery is handled by its PF\n");
2936 __qede_unlock(edev);
2937 return PCI_ERS_RESULT_RECOVERED;
2938 }
2939
2940 /* Close OS Tx */
2941 netif_tx_disable(edev->ndev);
2942 netif_carrier_off(edev->ndev);
2943
2944 set_bit(QEDE_SP_AER, &edev->sp_flags);
2945 schedule_delayed_work(&edev->sp_task, 0);
2946
2947 __qede_unlock(edev);
2948
2949 return PCI_ERS_RESULT_CAN_RECOVER;
2950 }
2951