1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11 #ifndef __PHY_H
12 #define __PHY_H
13
14 #include <linux/compiler.h>
15 #include <linux/spinlock.h>
16 #include <linux/ethtool.h>
17 #include <linux/linkmode.h>
18 #include <linux/netlink.h>
19 #include <linux/mdio.h>
20 #include <linux/mii.h>
21 #include <linux/mii_timestamper.h>
22 #include <linux/module.h>
23 #include <linux/timer.h>
24 #include <linux/workqueue.h>
25 #include <linux/mod_devicetable.h>
26 #include <linux/u64_stats_sync.h>
27 #include <linux/irqreturn.h>
28 #include <linux/iopoll.h>
29 #include <linux/refcount.h>
30 #include <linux/android_kabi.h>
31
32 #include <linux/atomic.h>
33
34 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
35 SUPPORTED_TP | \
36 SUPPORTED_MII)
37
38 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
39 SUPPORTED_10baseT_Full)
40
41 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
42 SUPPORTED_100baseT_Full)
43
44 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
45 SUPPORTED_1000baseT_Full)
46
47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
55
56 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
57 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
58 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
59 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
60 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
61 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
62 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
63 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
64
65 extern const int phy_basic_ports_array[3];
66 extern const int phy_fibre_port_array[1];
67 extern const int phy_all_ports_features_array[7];
68 extern const int phy_10_100_features_array[4];
69 extern const int phy_basic_t1_features_array[3];
70 extern const int phy_gbit_features_array[2];
71 extern const int phy_10gbit_features_array[1];
72
73 /*
74 * Set phydev->irq to PHY_POLL if interrupts are not supported,
75 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
76 * the attached MAC driver handles the interrupt
77 */
78 #define PHY_POLL -1
79 #define PHY_MAC_INTERRUPT -2
80
81 #define PHY_IS_INTERNAL 0x00000001
82 #define PHY_RST_AFTER_CLK_EN 0x00000002
83 #define PHY_POLL_CABLE_TEST 0x00000004
84 #define MDIO_DEVICE_IS_PHY 0x80000000
85
86 /**
87 * enum phy_interface_t - Interface Mode definitions
88 *
89 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
90 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
91 * @PHY_INTERFACE_MODE_MII: Media-independent interface
92 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
93 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
94 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
95 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
96 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
97 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
98 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
99 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
100 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
101 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
102 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
103 * @PHY_INTERFACE_MODE_SMII: Serial MII
104 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
105 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
106 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
107 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
108 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
109 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
110 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
111 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
112 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
113 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
114 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
115 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
116 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
117 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
118 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
119 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
120 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
121 * @PHY_INTERFACE_MODE_MAX: Book keeping
122 *
123 * Describes the interface between the MAC and PHY.
124 */
125 typedef enum {
126 PHY_INTERFACE_MODE_NA,
127 PHY_INTERFACE_MODE_INTERNAL,
128 PHY_INTERFACE_MODE_MII,
129 PHY_INTERFACE_MODE_GMII,
130 PHY_INTERFACE_MODE_SGMII,
131 PHY_INTERFACE_MODE_TBI,
132 PHY_INTERFACE_MODE_REVMII,
133 PHY_INTERFACE_MODE_RMII,
134 PHY_INTERFACE_MODE_REVRMII,
135 PHY_INTERFACE_MODE_RGMII,
136 PHY_INTERFACE_MODE_RGMII_ID,
137 PHY_INTERFACE_MODE_RGMII_RXID,
138 PHY_INTERFACE_MODE_RGMII_TXID,
139 PHY_INTERFACE_MODE_RTBI,
140 PHY_INTERFACE_MODE_SMII,
141 PHY_INTERFACE_MODE_XGMII,
142 PHY_INTERFACE_MODE_XLGMII,
143 PHY_INTERFACE_MODE_MOCA,
144 PHY_INTERFACE_MODE_QSGMII,
145 PHY_INTERFACE_MODE_TRGMII,
146 PHY_INTERFACE_MODE_100BASEX,
147 PHY_INTERFACE_MODE_1000BASEX,
148 PHY_INTERFACE_MODE_2500BASEX,
149 PHY_INTERFACE_MODE_5GBASER,
150 PHY_INTERFACE_MODE_RXAUI,
151 PHY_INTERFACE_MODE_XAUI,
152 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
153 PHY_INTERFACE_MODE_10GBASER,
154 PHY_INTERFACE_MODE_25GBASER,
155 PHY_INTERFACE_MODE_USXGMII,
156 /* 10GBASE-KR - with Clause 73 AN */
157 PHY_INTERFACE_MODE_10GKR,
158 PHY_INTERFACE_MODE_QUSGMII,
159 PHY_INTERFACE_MODE_1000BASEKX,
160 PHY_INTERFACE_MODE_MAX,
161 } phy_interface_t;
162
163 /* PHY interface mode bitmap handling */
164 #define DECLARE_PHY_INTERFACE_MASK(name) \
165 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
166
phy_interface_zero(unsigned long * intf)167 static inline void phy_interface_zero(unsigned long *intf)
168 {
169 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
170 }
171
phy_interface_empty(const unsigned long * intf)172 static inline bool phy_interface_empty(const unsigned long *intf)
173 {
174 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
175 }
176
phy_interface_and(unsigned long * dst,const unsigned long * a,const unsigned long * b)177 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
178 const unsigned long *b)
179 {
180 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
181 }
182
phy_interface_or(unsigned long * dst,const unsigned long * a,const unsigned long * b)183 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
184 const unsigned long *b)
185 {
186 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
187 }
188
phy_interface_set_rgmii(unsigned long * intf)189 static inline void phy_interface_set_rgmii(unsigned long *intf)
190 {
191 __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
192 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
193 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
194 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
195 }
196
197 /*
198 * phy_supported_speeds - return all speeds currently supported by a PHY device
199 */
200 unsigned int phy_supported_speeds(struct phy_device *phy,
201 unsigned int *speeds,
202 unsigned int size);
203
204 /**
205 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
206 * @interface: enum phy_interface_t value
207 *
208 * Description: maps enum &phy_interface_t defined in this file
209 * into the device tree binding of 'phy-mode', so that Ethernet
210 * device driver can get PHY interface from device tree.
211 */
phy_modes(phy_interface_t interface)212 static inline const char *phy_modes(phy_interface_t interface)
213 {
214 switch (interface) {
215 case PHY_INTERFACE_MODE_NA:
216 return "";
217 case PHY_INTERFACE_MODE_INTERNAL:
218 return "internal";
219 case PHY_INTERFACE_MODE_MII:
220 return "mii";
221 case PHY_INTERFACE_MODE_GMII:
222 return "gmii";
223 case PHY_INTERFACE_MODE_SGMII:
224 return "sgmii";
225 case PHY_INTERFACE_MODE_TBI:
226 return "tbi";
227 case PHY_INTERFACE_MODE_REVMII:
228 return "rev-mii";
229 case PHY_INTERFACE_MODE_RMII:
230 return "rmii";
231 case PHY_INTERFACE_MODE_REVRMII:
232 return "rev-rmii";
233 case PHY_INTERFACE_MODE_RGMII:
234 return "rgmii";
235 case PHY_INTERFACE_MODE_RGMII_ID:
236 return "rgmii-id";
237 case PHY_INTERFACE_MODE_RGMII_RXID:
238 return "rgmii-rxid";
239 case PHY_INTERFACE_MODE_RGMII_TXID:
240 return "rgmii-txid";
241 case PHY_INTERFACE_MODE_RTBI:
242 return "rtbi";
243 case PHY_INTERFACE_MODE_SMII:
244 return "smii";
245 case PHY_INTERFACE_MODE_XGMII:
246 return "xgmii";
247 case PHY_INTERFACE_MODE_XLGMII:
248 return "xlgmii";
249 case PHY_INTERFACE_MODE_MOCA:
250 return "moca";
251 case PHY_INTERFACE_MODE_QSGMII:
252 return "qsgmii";
253 case PHY_INTERFACE_MODE_TRGMII:
254 return "trgmii";
255 case PHY_INTERFACE_MODE_1000BASEX:
256 return "1000base-x";
257 case PHY_INTERFACE_MODE_1000BASEKX:
258 return "1000base-kx";
259 case PHY_INTERFACE_MODE_2500BASEX:
260 return "2500base-x";
261 case PHY_INTERFACE_MODE_5GBASER:
262 return "5gbase-r";
263 case PHY_INTERFACE_MODE_RXAUI:
264 return "rxaui";
265 case PHY_INTERFACE_MODE_XAUI:
266 return "xaui";
267 case PHY_INTERFACE_MODE_10GBASER:
268 return "10gbase-r";
269 case PHY_INTERFACE_MODE_25GBASER:
270 return "25gbase-r";
271 case PHY_INTERFACE_MODE_USXGMII:
272 return "usxgmii";
273 case PHY_INTERFACE_MODE_10GKR:
274 return "10gbase-kr";
275 case PHY_INTERFACE_MODE_100BASEX:
276 return "100base-x";
277 case PHY_INTERFACE_MODE_QUSGMII:
278 return "qusgmii";
279 default:
280 return "unknown";
281 }
282 }
283
284 #define PHY_INIT_TIMEOUT 100000
285 #define PHY_FORCE_TIMEOUT 10
286
287 #define PHY_MAX_ADDR 32
288
289 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
290 #define PHY_ID_FMT "%s:%02x"
291
292 #define MII_BUS_ID_SIZE 61
293
294 struct device;
295 struct phylink;
296 struct sfp_bus;
297 struct sfp_upstream_ops;
298 struct sk_buff;
299
300 /**
301 * struct mdio_bus_stats - Statistics counters for MDIO busses
302 * @transfers: Total number of transfers, i.e. @writes + @reads
303 * @errors: Number of MDIO transfers that returned an error
304 * @writes: Number of write transfers
305 * @reads: Number of read transfers
306 * @syncp: Synchronisation for incrementing statistics
307 */
308 struct mdio_bus_stats {
309 u64_stats_t transfers;
310 u64_stats_t errors;
311 u64_stats_t writes;
312 u64_stats_t reads;
313 /* Must be last, add new statistics above */
314 struct u64_stats_sync syncp;
315 };
316
317 /**
318 * struct phy_package_shared - Shared information in PHY packages
319 * @addr: Common PHY address used to combine PHYs in one package
320 * @refcnt: Number of PHYs connected to this shared data
321 * @flags: Initialization of PHY package
322 * @priv_size: Size of the shared private data @priv
323 * @priv: Driver private data shared across a PHY package
324 *
325 * Represents a shared structure between different phydev's in the same
326 * package, for example a quad PHY. See phy_package_join() and
327 * phy_package_leave().
328 */
329 struct phy_package_shared {
330 int addr;
331 refcount_t refcnt;
332 unsigned long flags;
333 size_t priv_size;
334
335 /* private data pointer */
336 /* note that this pointer is shared between different phydevs and
337 * the user has to take care of appropriate locking. It is allocated
338 * and freed automatically by phy_package_join() and
339 * phy_package_leave().
340 */
341 void *priv;
342 };
343
344 /* used as bit number in atomic bitops */
345 #define PHY_SHARED_F_INIT_DONE 0
346 #define PHY_SHARED_F_PROBE_DONE 1
347
348 /**
349 * struct mii_bus - Represents an MDIO bus
350 *
351 * @owner: Who owns this device
352 * @name: User friendly name for this MDIO device, or driver name
353 * @id: Unique identifier for this bus, typical from bus hierarchy
354 * @priv: Driver private data
355 *
356 * The Bus class for PHYs. Devices which provide access to
357 * PHYs should register using this structure
358 */
359 struct mii_bus {
360 struct module *owner;
361 const char *name;
362 char id[MII_BUS_ID_SIZE];
363 void *priv;
364 /** @read: Perform a read transfer on the bus */
365 int (*read)(struct mii_bus *bus, int addr, int regnum);
366 /** @write: Perform a write transfer on the bus */
367 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
368 /** @reset: Perform a reset of the bus */
369 int (*reset)(struct mii_bus *bus);
370
371 /** @stats: Statistic counters per device on the bus */
372 struct mdio_bus_stats stats[PHY_MAX_ADDR];
373
374 /**
375 * @mdio_lock: A lock to ensure that only one thing can read/write
376 * the MDIO bus at a time
377 */
378 struct mutex mdio_lock;
379
380 /** @parent: Parent device of this bus */
381 struct device *parent;
382 /** @state: State of bus structure */
383 enum {
384 MDIOBUS_ALLOCATED = 1,
385 MDIOBUS_REGISTERED,
386 MDIOBUS_UNREGISTERED,
387 MDIOBUS_RELEASED,
388 } state;
389
390 /** @dev: Kernel device representation */
391 struct device dev;
392
393 /** @mdio_map: list of all MDIO devices on bus */
394 struct mdio_device *mdio_map[PHY_MAX_ADDR];
395
396 /** @phy_mask: PHY addresses to be ignored when probing */
397 u32 phy_mask;
398
399 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
400 u32 phy_ignore_ta_mask;
401
402 /**
403 * @irq: An array of interrupts, each PHY's interrupt at the index
404 * matching its address
405 */
406 int irq[PHY_MAX_ADDR];
407
408 /** @reset_delay_us: GPIO reset pulse width in microseconds */
409 int reset_delay_us;
410 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
411 int reset_post_delay_us;
412 /** @reset_gpiod: Reset GPIO descriptor pointer */
413 struct gpio_desc *reset_gpiod;
414
415 /** @probe_capabilities: bus capabilities, used for probing */
416 enum {
417 MDIOBUS_NO_CAP = 0,
418 MDIOBUS_C22,
419 MDIOBUS_C45,
420 MDIOBUS_C22_C45,
421 } probe_capabilities;
422
423 /** @shared_lock: protect access to the shared element */
424 struct mutex shared_lock;
425
426 /** @shared: shared state across different PHYs */
427 struct phy_package_shared *shared[PHY_MAX_ADDR];
428 };
429 #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
430
431 struct mii_bus *mdiobus_alloc_size(size_t size);
432
433 /**
434 * mdiobus_alloc - Allocate an MDIO bus structure
435 *
436 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
437 * for the driver to register the bus.
438 */
mdiobus_alloc(void)439 static inline struct mii_bus *mdiobus_alloc(void)
440 {
441 return mdiobus_alloc_size(0);
442 }
443
444 int __mdiobus_register(struct mii_bus *bus, struct module *owner);
445 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
446 struct module *owner);
447 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
448 #define devm_mdiobus_register(dev, bus) \
449 __devm_mdiobus_register(dev, bus, THIS_MODULE)
450
451 void mdiobus_unregister(struct mii_bus *bus);
452 void mdiobus_free(struct mii_bus *bus);
453 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
devm_mdiobus_alloc(struct device * dev)454 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
455 {
456 return devm_mdiobus_alloc_size(dev, 0);
457 }
458
459 struct mii_bus *mdio_find_bus(const char *mdio_name);
460 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
461
462 #define PHY_INTERRUPT_DISABLED false
463 #define PHY_INTERRUPT_ENABLED true
464
465 /**
466 * enum phy_state - PHY state machine states:
467 *
468 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
469 * should be called if and only if the PHY is in this state,
470 * given that the PHY device exists.
471 * - PHY driver probe function will set the state to @PHY_READY
472 *
473 * @PHY_READY: PHY is ready to send and receive packets, but the
474 * controller is not. By default, PHYs which do not implement
475 * probe will be set to this state by phy_probe().
476 * - start will set the state to UP
477 *
478 * @PHY_UP: The PHY and attached device are ready to do work.
479 * Interrupts should be started here.
480 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
481 *
482 * @PHY_NOLINK: PHY is up, but not currently plugged in.
483 * - irq or timer will set @PHY_RUNNING if link comes back
484 * - phy_stop moves to @PHY_HALTED
485 *
486 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
487 * and/or receiving packets
488 * - irq or timer will set @PHY_NOLINK if link goes down
489 * - phy_stop moves to @PHY_HALTED
490 *
491 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
492 * is not expected to work, carrier will be indicated as down. PHY will be
493 * poll once per second, or on interrupt for it current state.
494 * Once complete, move to UP to restart the PHY.
495 * - phy_stop aborts the running test and moves to @PHY_HALTED
496 *
497 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or
498 * PHY is in an error state.
499 * - phy_start moves to @PHY_UP
500 */
501 enum phy_state {
502 PHY_DOWN = 0,
503 PHY_READY,
504 PHY_HALTED,
505 PHY_UP,
506 PHY_RUNNING,
507 PHY_NOLINK,
508 PHY_CABLETEST,
509 };
510
511 #define MDIO_MMD_NUM 32
512
513 /**
514 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
515 * @devices_in_package: IEEE 802.3 devices in package register value.
516 * @mmds_present: bit vector of MMDs present.
517 * @device_ids: The device identifer for each present device.
518 */
519 struct phy_c45_device_ids {
520 u32 devices_in_package;
521 u32 mmds_present;
522 u32 device_ids[MDIO_MMD_NUM];
523 };
524
525 struct macsec_context;
526 struct macsec_ops;
527
528 /**
529 * struct phy_device - An instance of a PHY
530 *
531 * @mdio: MDIO bus this PHY is on
532 * @drv: Pointer to the driver for this PHY instance
533 * @phy_id: UID for this device found during discovery
534 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
535 * @is_c45: Set to true if this PHY uses clause 45 addressing.
536 * @is_internal: Set to true if this PHY is internal to a MAC.
537 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
538 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
539 * @has_fixups: Set to true if this PHY has fixups/quirks.
540 * @suspended: Set to true if this PHY has been suspended successfully.
541 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
542 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
543 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
544 * @downshifted_rate: Set true if link speed has been downshifted.
545 * @is_on_sfp_module: Set true if PHY is located on an SFP module.
546 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
547 * @state: State of the PHY for management purposes
548 * @dev_flags: Device-specific flags used by the PHY driver.
549 *
550 * - Bits [15:0] are free to use by the PHY driver to communicate
551 * driver specific behavior.
552 * - Bits [23:16] are currently reserved for future use.
553 * - Bits [31:24] are reserved for defining generic
554 * PHY driver behavior.
555 * @irq: IRQ number of the PHY's interrupt (-1 if none)
556 * @phy_timer: The timer for handling the state machine
557 * @phylink: Pointer to phylink instance for this PHY
558 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
559 * @sfp_bus: SFP bus attached to this PHY's fiber port
560 * @attached_dev: The attached enet driver's device instance ptr
561 * @adjust_link: Callback for the enet controller to respond to changes: in the
562 * link state.
563 * @phy_link_change: Callback for phylink for notification of link change
564 * @macsec_ops: MACsec offloading ops.
565 *
566 * @speed: Current link speed
567 * @duplex: Current duplex
568 * @port: Current port
569 * @pause: Current pause
570 * @asym_pause: Current asymmetric pause
571 * @supported: Combined MAC/PHY supported linkmodes
572 * @advertising: Currently advertised linkmodes
573 * @adv_old: Saved advertised while power saving for WoL
574 * @lp_advertising: Current link partner advertised linkmodes
575 * @host_interfaces: PHY interface modes supported by host
576 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
577 * @autoneg: Flag autoneg being used
578 * @rate_matching: Current rate matching mode
579 * @link: Current link state
580 * @autoneg_complete: Flag auto negotiation of the link has completed
581 * @mdix: Current crossover
582 * @mdix_ctrl: User setting of crossover
583 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
584 * @interrupts: Flag interrupts have been enabled
585 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
586 * handling shall be postponed until PHY has resumed
587 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
588 * requiring a rerun of the interrupt handler after resume
589 * @interface: enum phy_interface_t value
590 * @skb: Netlink message for cable diagnostics
591 * @nest: Netlink nest used for cable diagnostics
592 * @ehdr: nNtlink header for cable diagnostics
593 * @phy_led_triggers: Array of LED triggers
594 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
595 * @led_link_trigger: LED trigger for link up/down
596 * @last_triggered: last LED trigger for link speed
597 * @master_slave_set: User requested master/slave configuration
598 * @master_slave_get: Current master/slave advertisement
599 * @master_slave_state: Current master/slave configuration
600 * @mii_ts: Pointer to time stamper callbacks
601 * @psec: Pointer to Power Sourcing Equipment control struct
602 * @lock: Mutex for serialization access to PHY
603 * @state_queue: Work queue for state machine
604 * @shared: Pointer to private data shared by phys in one package
605 * @priv: Pointer to driver private data
606 *
607 * interrupts currently only supports enabled or disabled,
608 * but could be changed in the future to support enabling
609 * and disabling specific interrupts
610 *
611 * Contains some infrastructure for polling and interrupt
612 * handling, as well as handling shifts in PHY hardware state
613 */
614 struct phy_device {
615 struct mdio_device mdio;
616
617 /* Information about the PHY type */
618 /* And management functions */
619 struct phy_driver *drv;
620
621 u32 phy_id;
622
623 struct phy_c45_device_ids c45_ids;
624 unsigned is_c45:1;
625 unsigned is_internal:1;
626 unsigned is_pseudo_fixed_link:1;
627 unsigned is_gigabit_capable:1;
628 unsigned has_fixups:1;
629 unsigned suspended:1;
630 unsigned suspended_by_mdio_bus:1;
631 unsigned sysfs_links:1;
632 unsigned loopback_enabled:1;
633 unsigned downshifted_rate:1;
634 unsigned is_on_sfp_module:1;
635 unsigned mac_managed_pm:1;
636
637 unsigned autoneg:1;
638 /* The most recently read link state */
639 unsigned link:1;
640 unsigned autoneg_complete:1;
641
642 /* Interrupts are enabled */
643 unsigned interrupts:1;
644 unsigned irq_suspended:1;
645 unsigned irq_rerun:1;
646
647 int rate_matching;
648
649 enum phy_state state;
650
651 u32 dev_flags;
652
653 phy_interface_t interface;
654
655 /*
656 * forced speed & duplex (no autoneg)
657 * partner speed & duplex & pause (autoneg)
658 */
659 int speed;
660 int duplex;
661 int port;
662 int pause;
663 int asym_pause;
664 u8 master_slave_get;
665 u8 master_slave_set;
666 u8 master_slave_state;
667
668 /* Union of PHY and Attached devices' supported link modes */
669 /* See ethtool.h for more info */
670 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
671 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
672 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
673 /* used with phy_speed_down */
674 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
675
676 /* Host supported PHY interface types. Should be ignored if empty. */
677 DECLARE_PHY_INTERFACE_MASK(host_interfaces);
678
679 /* Energy efficient ethernet modes which should be prohibited */
680 u32 eee_broken_modes;
681
682 #ifdef CONFIG_LED_TRIGGER_PHY
683 struct phy_led_trigger *phy_led_triggers;
684 unsigned int phy_num_led_triggers;
685 struct phy_led_trigger *last_triggered;
686
687 struct phy_led_trigger *led_link_trigger;
688 #endif
689
690 /*
691 * Interrupt number for this PHY
692 * -1 means no interrupt
693 */
694 int irq;
695
696 /* private data pointer */
697 /* For use by PHYs to maintain extra state */
698 void *priv;
699
700 /* shared data pointer */
701 /* For use by PHYs inside the same package that need a shared state. */
702 struct phy_package_shared *shared;
703
704 /* Reporting cable test results */
705 struct sk_buff *skb;
706 void *ehdr;
707 struct nlattr *nest;
708
709 /* Interrupt and Polling infrastructure */
710 struct delayed_work state_queue;
711
712 struct mutex lock;
713
714 /* This may be modified under the rtnl lock */
715 bool sfp_bus_attached;
716 struct sfp_bus *sfp_bus;
717 struct phylink *phylink;
718 struct net_device *attached_dev;
719 struct mii_timestamper *mii_ts;
720 struct pse_control *psec;
721
722 u8 mdix;
723 u8 mdix_ctrl;
724
725 int pma_extable;
726
727 void (*phy_link_change)(struct phy_device *phydev, bool up);
728 void (*adjust_link)(struct net_device *dev);
729
730 #if IS_ENABLED(CONFIG_MACSEC)
731 /* MACsec management functions */
732 const struct macsec_ops *macsec_ops;
733 #endif
734
735 ANDROID_KABI_RESERVE(1);
736 ANDROID_KABI_RESERVE(2);
737 ANDROID_KABI_RESERVE(3);
738 ANDROID_KABI_RESERVE(4);
739 };
740
to_phy_device(const struct device * dev)741 static inline struct phy_device *to_phy_device(const struct device *dev)
742 {
743 return container_of(to_mdio_device(dev), struct phy_device, mdio);
744 }
745
746 /**
747 * struct phy_tdr_config - Configuration of a TDR raw test
748 *
749 * @first: Distance for first data collection point
750 * @last: Distance for last data collection point
751 * @step: Step between data collection points
752 * @pair: Bitmap of cable pairs to collect data for
753 *
754 * A structure containing possible configuration parameters
755 * for a TDR cable test. The driver does not need to implement
756 * all the parameters, but should report what is actually used.
757 * All distances are in centimeters.
758 */
759 struct phy_tdr_config {
760 u32 first;
761 u32 last;
762 u32 step;
763 s8 pair;
764 };
765 #define PHY_PAIR_ALL -1
766
767 /**
768 * struct phy_driver - Driver structure for a particular PHY type
769 *
770 * @mdiodrv: Data common to all MDIO devices
771 * @phy_id: The result of reading the UID registers of this PHY
772 * type, and ANDing them with the phy_id_mask. This driver
773 * only works for PHYs with IDs which match this field
774 * @name: The friendly name of this PHY type
775 * @phy_id_mask: Defines the important bits of the phy_id
776 * @features: A mandatory list of features (speed, duplex, etc)
777 * supported by this PHY
778 * @flags: A bitfield defining certain other features this PHY
779 * supports (like interrupts)
780 * @driver_data: Static driver data
781 *
782 * All functions are optional. If config_aneg or read_status
783 * are not implemented, the phy core uses the genphy versions.
784 * Note that none of these functions should be called from
785 * interrupt time. The goal is for the bus read/write functions
786 * to be able to block when the bus transaction is happening,
787 * and be freed up by an interrupt (The MPC85xx has this ability,
788 * though it is not currently supported in the driver).
789 */
790 struct phy_driver {
791 struct mdio_driver_common mdiodrv;
792 u32 phy_id;
793 char *name;
794 u32 phy_id_mask;
795 const unsigned long * const features;
796 u32 flags;
797 const void *driver_data;
798
799 /**
800 * @soft_reset: Called to issue a PHY software reset
801 */
802 int (*soft_reset)(struct phy_device *phydev);
803
804 /**
805 * @config_init: Called to initialize the PHY,
806 * including after a reset
807 */
808 int (*config_init)(struct phy_device *phydev);
809
810 /**
811 * @probe: Called during discovery. Used to set
812 * up device-specific structures, if any
813 */
814 int (*probe)(struct phy_device *phydev);
815
816 /**
817 * @get_features: Probe the hardware to determine what
818 * abilities it has. Should only set phydev->supported.
819 */
820 int (*get_features)(struct phy_device *phydev);
821
822 /**
823 * @get_rate_matching: Get the supported type of rate matching for a
824 * particular phy interface. This is used by phy consumers to determine
825 * whether to advertise lower-speed modes for that interface. It is
826 * assumed that if a rate matching mode is supported on an interface,
827 * then that interface's rate can be adapted to all slower link speeds
828 * supported by the phy. If iface is %PHY_INTERFACE_MODE_NA, and the phy
829 * supports any kind of rate matching for any interface, then it must
830 * return that rate matching mode (preferring %RATE_MATCH_PAUSE to
831 * %RATE_MATCH_CRS). If the interface is not supported, this should
832 * return %RATE_MATCH_NONE.
833 */
834 int (*get_rate_matching)(struct phy_device *phydev,
835 phy_interface_t iface);
836
837 /* PHY Power Management */
838 /** @suspend: Suspend the hardware, saving state if needed */
839 int (*suspend)(struct phy_device *phydev);
840 /** @resume: Resume the hardware, restoring state if needed */
841 int (*resume)(struct phy_device *phydev);
842
843 /**
844 * @config_aneg: Configures the advertisement and resets
845 * autonegotiation if phydev->autoneg is on,
846 * forces the speed to the current settings in phydev
847 * if phydev->autoneg is off
848 */
849 int (*config_aneg)(struct phy_device *phydev);
850
851 /** @aneg_done: Determines the auto negotiation result */
852 int (*aneg_done)(struct phy_device *phydev);
853
854 /** @read_status: Determines the negotiated speed and duplex */
855 int (*read_status)(struct phy_device *phydev);
856
857 /**
858 * @config_intr: Enables or disables interrupts.
859 * It should also clear any pending interrupts prior to enabling the
860 * IRQs and after disabling them.
861 */
862 int (*config_intr)(struct phy_device *phydev);
863
864 /** @handle_interrupt: Override default interrupt handling */
865 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
866
867 /** @remove: Clears up any memory if needed */
868 void (*remove)(struct phy_device *phydev);
869
870 /**
871 * @match_phy_device: Returns true if this is a suitable
872 * driver for the given phydev. If NULL, matching is based on
873 * phy_id and phy_id_mask.
874 */
875 int (*match_phy_device)(struct phy_device *phydev);
876
877 /**
878 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
879 * register changes to enable Wake on LAN, so set_wol is
880 * provided to be called in the ethernet driver's set_wol
881 * function.
882 */
883 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
884
885 /**
886 * @get_wol: See set_wol, but for checking whether Wake on LAN
887 * is enabled.
888 */
889 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
890
891 /**
892 * @link_change_notify: Called to inform a PHY device driver
893 * when the core is about to change the link state. This
894 * callback is supposed to be used as fixup hook for drivers
895 * that need to take action when the link state
896 * changes. Drivers are by no means allowed to mess with the
897 * PHY device structure in their implementations.
898 */
899 void (*link_change_notify)(struct phy_device *dev);
900
901 /**
902 * @read_mmd: PHY specific driver override for reading a MMD
903 * register. This function is optional for PHY specific
904 * drivers. When not provided, the default MMD read function
905 * will be used by phy_read_mmd(), which will use either a
906 * direct read for Clause 45 PHYs or an indirect read for
907 * Clause 22 PHYs. devnum is the MMD device number within the
908 * PHY device, regnum is the register within the selected MMD
909 * device.
910 */
911 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
912
913 /**
914 * @write_mmd: PHY specific driver override for writing a MMD
915 * register. This function is optional for PHY specific
916 * drivers. When not provided, the default MMD write function
917 * will be used by phy_write_mmd(), which will use either a
918 * direct write for Clause 45 PHYs, or an indirect write for
919 * Clause 22 PHYs. devnum is the MMD device number within the
920 * PHY device, regnum is the register within the selected MMD
921 * device. val is the value to be written.
922 */
923 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
924 u16 val);
925
926 /** @read_page: Return the current PHY register page number */
927 int (*read_page)(struct phy_device *dev);
928 /** @write_page: Set the current PHY register page number */
929 int (*write_page)(struct phy_device *dev, int page);
930
931 /**
932 * @module_info: Get the size and type of the eeprom contained
933 * within a plug-in module
934 */
935 int (*module_info)(struct phy_device *dev,
936 struct ethtool_modinfo *modinfo);
937
938 /**
939 * @module_eeprom: Get the eeprom information from the plug-in
940 * module
941 */
942 int (*module_eeprom)(struct phy_device *dev,
943 struct ethtool_eeprom *ee, u8 *data);
944
945 /** @cable_test_start: Start a cable test */
946 int (*cable_test_start)(struct phy_device *dev);
947
948 /** @cable_test_tdr_start: Start a raw TDR cable test */
949 int (*cable_test_tdr_start)(struct phy_device *dev,
950 const struct phy_tdr_config *config);
951
952 /**
953 * @cable_test_get_status: Once per second, or on interrupt,
954 * request the status of the test.
955 */
956 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
957
958 /* Get statistics from the PHY using ethtool */
959 /** @get_sset_count: Number of statistic counters */
960 int (*get_sset_count)(struct phy_device *dev);
961 /** @get_strings: Names of the statistic counters */
962 void (*get_strings)(struct phy_device *dev, u8 *data);
963 /** @get_stats: Return the statistic counter values */
964 void (*get_stats)(struct phy_device *dev,
965 struct ethtool_stats *stats, u64 *data);
966
967 /* Get and Set PHY tunables */
968 /** @get_tunable: Return the value of a tunable */
969 int (*get_tunable)(struct phy_device *dev,
970 struct ethtool_tunable *tuna, void *data);
971 /** @set_tunable: Set the value of a tunable */
972 int (*set_tunable)(struct phy_device *dev,
973 struct ethtool_tunable *tuna,
974 const void *data);
975 /** @set_loopback: Set the loopback mood of the PHY */
976 int (*set_loopback)(struct phy_device *dev, bool enable);
977 /** @get_sqi: Get the signal quality indication */
978 int (*get_sqi)(struct phy_device *dev);
979 /** @get_sqi_max: Get the maximum signal quality indication */
980 int (*get_sqi_max)(struct phy_device *dev);
981
982 ANDROID_KABI_RESERVE(1);
983 ANDROID_KABI_RESERVE(2);
984 };
985 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
986 struct phy_driver, mdiodrv)
987
988 #define PHY_ANY_ID "MATCH ANY PHY"
989 #define PHY_ANY_UID 0xffffffff
990
991 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
992 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
993 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
994
995 /* A Structure for boards to register fixups with the PHY Lib */
996 struct phy_fixup {
997 struct list_head list;
998 char bus_id[MII_BUS_ID_SIZE + 3];
999 u32 phy_uid;
1000 u32 phy_uid_mask;
1001 int (*run)(struct phy_device *phydev);
1002 };
1003
1004 const char *phy_speed_to_str(int speed);
1005 const char *phy_duplex_to_str(unsigned int duplex);
1006 const char *phy_rate_matching_to_str(int rate_matching);
1007
1008 int phy_interface_num_ports(phy_interface_t interface);
1009
1010 /* A structure for mapping a particular speed and duplex
1011 * combination to a particular SUPPORTED and ADVERTISED value
1012 */
1013 struct phy_setting {
1014 u32 speed;
1015 u8 duplex;
1016 u8 bit;
1017 };
1018
1019 const struct phy_setting *
1020 phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
1021 bool exact);
1022 size_t phy_speeds(unsigned int *speeds, size_t size,
1023 unsigned long *mask);
1024 void of_set_phy_supported(struct phy_device *phydev);
1025 void of_set_phy_eee_broken(struct phy_device *phydev);
1026 int phy_speed_down_core(struct phy_device *phydev);
1027
1028 /**
1029 * phy_is_started - Convenience function to check whether PHY is started
1030 * @phydev: The phy_device struct
1031 */
phy_is_started(struct phy_device * phydev)1032 static inline bool phy_is_started(struct phy_device *phydev)
1033 {
1034 return phydev->state >= PHY_UP;
1035 }
1036
1037 void phy_resolve_aneg_pause(struct phy_device *phydev);
1038 void phy_resolve_aneg_linkmode(struct phy_device *phydev);
1039 void phy_check_downshift(struct phy_device *phydev);
1040
1041 /**
1042 * phy_read - Convenience function for reading a given PHY register
1043 * @phydev: the phy_device struct
1044 * @regnum: register number to read
1045 *
1046 * NOTE: MUST NOT be called from interrupt context,
1047 * because the bus read/write functions may wait for an interrupt
1048 * to conclude the operation.
1049 */
phy_read(struct phy_device * phydev,u32 regnum)1050 static inline int phy_read(struct phy_device *phydev, u32 regnum)
1051 {
1052 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1053 }
1054
1055 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1056 timeout_us, sleep_before_read) \
1057 ({ \
1058 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
1059 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1060 if (val < 0) \
1061 __ret = val; \
1062 if (__ret) \
1063 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1064 __ret; \
1065 })
1066
1067
1068 /**
1069 * __phy_read - convenience function for reading a given PHY register
1070 * @phydev: the phy_device struct
1071 * @regnum: register number to read
1072 *
1073 * The caller must have taken the MDIO bus lock.
1074 */
__phy_read(struct phy_device * phydev,u32 regnum)1075 static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1076 {
1077 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1078 }
1079
1080 /**
1081 * phy_write - Convenience function for writing a given PHY register
1082 * @phydev: the phy_device struct
1083 * @regnum: register number to write
1084 * @val: value to write to @regnum
1085 *
1086 * NOTE: MUST NOT be called from interrupt context,
1087 * because the bus read/write functions may wait for an interrupt
1088 * to conclude the operation.
1089 */
phy_write(struct phy_device * phydev,u32 regnum,u16 val)1090 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1091 {
1092 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
1093 }
1094
1095 /**
1096 * __phy_write - Convenience function for writing a given PHY register
1097 * @phydev: the phy_device struct
1098 * @regnum: register number to write
1099 * @val: value to write to @regnum
1100 *
1101 * The caller must have taken the MDIO bus lock.
1102 */
__phy_write(struct phy_device * phydev,u32 regnum,u16 val)1103 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1104 {
1105 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1106 val);
1107 }
1108
1109 /**
1110 * __phy_modify_changed() - Convenience function for modifying a PHY register
1111 * @phydev: a pointer to a &struct phy_device
1112 * @regnum: register number
1113 * @mask: bit mask of bits to clear
1114 * @set: bit mask of bits to set
1115 *
1116 * Unlocked helper function which allows a PHY register to be modified as
1117 * new register value = (old register value & ~mask) | set
1118 *
1119 * Returns negative errno, 0 if there was no change, and 1 in case of change
1120 */
__phy_modify_changed(struct phy_device * phydev,u32 regnum,u16 mask,u16 set)1121 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1122 u16 mask, u16 set)
1123 {
1124 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1125 regnum, mask, set);
1126 }
1127
1128 /*
1129 * phy_read_mmd - Convenience function for reading a register
1130 * from an MMD on a given PHY.
1131 */
1132 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1133
1134 /**
1135 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1136 * condition is met or a timeout occurs
1137 *
1138 * @phydev: The phy_device struct
1139 * @devaddr: The MMD to read from
1140 * @regnum: The register on the MMD to read
1141 * @val: Variable to read the register into
1142 * @cond: Break condition (usually involving @val)
1143 * @sleep_us: Maximum time to sleep between reads in us (0
1144 * tight-loops). Should be less than ~20ms since usleep_range
1145 * is used (see Documentation/timers/timers-howto.rst).
1146 * @timeout_us: Timeout in us, 0 means never timeout
1147 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1148 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1149 * case, the last read value at @args is stored in @val. Must not
1150 * be called from atomic context if sleep_us or timeout_us are used.
1151 */
1152 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1153 sleep_us, timeout_us, sleep_before_read) \
1154 ({ \
1155 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
1156 sleep_us, timeout_us, sleep_before_read, \
1157 phydev, devaddr, regnum); \
1158 if (val < 0) \
1159 __ret = val; \
1160 if (__ret) \
1161 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1162 __ret; \
1163 })
1164
1165 /*
1166 * __phy_read_mmd - Convenience function for reading a register
1167 * from an MMD on a given PHY.
1168 */
1169 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1170
1171 /*
1172 * phy_write_mmd - Convenience function for writing a register
1173 * on an MMD on a given PHY.
1174 */
1175 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1176
1177 /*
1178 * __phy_write_mmd - Convenience function for writing a register
1179 * on an MMD on a given PHY.
1180 */
1181 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1182
1183 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1184 u16 set);
1185 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1186 u16 set);
1187 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1188 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1189
1190 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1191 u16 mask, u16 set);
1192 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1193 u16 mask, u16 set);
1194 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1195 u16 mask, u16 set);
1196 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1197 u16 mask, u16 set);
1198
1199 /**
1200 * __phy_set_bits - Convenience function for setting bits in a PHY register
1201 * @phydev: the phy_device struct
1202 * @regnum: register number to write
1203 * @val: bits to set
1204 *
1205 * The caller must have taken the MDIO bus lock.
1206 */
__phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1207 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1208 {
1209 return __phy_modify(phydev, regnum, 0, val);
1210 }
1211
1212 /**
1213 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1214 * @phydev: the phy_device struct
1215 * @regnum: register number to write
1216 * @val: bits to clear
1217 *
1218 * The caller must have taken the MDIO bus lock.
1219 */
__phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1220 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1221 u16 val)
1222 {
1223 return __phy_modify(phydev, regnum, val, 0);
1224 }
1225
1226 /**
1227 * phy_set_bits - Convenience function for setting bits in a PHY register
1228 * @phydev: the phy_device struct
1229 * @regnum: register number to write
1230 * @val: bits to set
1231 */
phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1232 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1233 {
1234 return phy_modify(phydev, regnum, 0, val);
1235 }
1236
1237 /**
1238 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1239 * @phydev: the phy_device struct
1240 * @regnum: register number to write
1241 * @val: bits to clear
1242 */
phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1243 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1244 {
1245 return phy_modify(phydev, regnum, val, 0);
1246 }
1247
1248 /**
1249 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1250 * on MMD
1251 * @phydev: the phy_device struct
1252 * @devad: the MMD containing register to modify
1253 * @regnum: register number to modify
1254 * @val: bits to set
1255 *
1256 * The caller must have taken the MDIO bus lock.
1257 */
__phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1258 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1259 u32 regnum, u16 val)
1260 {
1261 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1262 }
1263
1264 /**
1265 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1266 * on MMD
1267 * @phydev: the phy_device struct
1268 * @devad: the MMD containing register to modify
1269 * @regnum: register number to modify
1270 * @val: bits to clear
1271 *
1272 * The caller must have taken the MDIO bus lock.
1273 */
__phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1274 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1275 u32 regnum, u16 val)
1276 {
1277 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1278 }
1279
1280 /**
1281 * phy_set_bits_mmd - Convenience function for setting bits in a register
1282 * on MMD
1283 * @phydev: the phy_device struct
1284 * @devad: the MMD containing register to modify
1285 * @regnum: register number to modify
1286 * @val: bits to set
1287 */
phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1288 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1289 u32 regnum, u16 val)
1290 {
1291 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1292 }
1293
1294 /**
1295 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1296 * on MMD
1297 * @phydev: the phy_device struct
1298 * @devad: the MMD containing register to modify
1299 * @regnum: register number to modify
1300 * @val: bits to clear
1301 */
phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1302 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1303 u32 regnum, u16 val)
1304 {
1305 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1306 }
1307
1308 /**
1309 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1310 * @phydev: the phy_device struct
1311 *
1312 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1313 * PHY_MAC_INTERRUPT
1314 */
phy_interrupt_is_valid(struct phy_device * phydev)1315 static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1316 {
1317 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1318 }
1319
1320 /**
1321 * phy_polling_mode - Convenience function for testing whether polling is
1322 * used to detect PHY status changes
1323 * @phydev: the phy_device struct
1324 */
phy_polling_mode(struct phy_device * phydev)1325 static inline bool phy_polling_mode(struct phy_device *phydev)
1326 {
1327 if (phydev->state == PHY_CABLETEST)
1328 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1329 return true;
1330
1331 return phydev->irq == PHY_POLL;
1332 }
1333
1334 /**
1335 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1336 * @phydev: the phy_device struct
1337 */
phy_has_hwtstamp(struct phy_device * phydev)1338 static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1339 {
1340 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1341 }
1342
1343 /**
1344 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1345 * @phydev: the phy_device struct
1346 */
phy_has_rxtstamp(struct phy_device * phydev)1347 static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1348 {
1349 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1350 }
1351
1352 /**
1353 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1354 * PTP hardware clock capabilities.
1355 * @phydev: the phy_device struct
1356 */
phy_has_tsinfo(struct phy_device * phydev)1357 static inline bool phy_has_tsinfo(struct phy_device *phydev)
1358 {
1359 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1360 }
1361
1362 /**
1363 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1364 * @phydev: the phy_device struct
1365 */
phy_has_txtstamp(struct phy_device * phydev)1366 static inline bool phy_has_txtstamp(struct phy_device *phydev)
1367 {
1368 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1369 }
1370
phy_hwtstamp(struct phy_device * phydev,struct ifreq * ifr)1371 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
1372 {
1373 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
1374 }
1375
phy_rxtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1376 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1377 int type)
1378 {
1379 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1380 }
1381
phy_ts_info(struct phy_device * phydev,struct ethtool_ts_info * tsinfo)1382 static inline int phy_ts_info(struct phy_device *phydev,
1383 struct ethtool_ts_info *tsinfo)
1384 {
1385 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1386 }
1387
phy_txtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1388 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1389 int type)
1390 {
1391 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1392 }
1393
1394 /**
1395 * phy_is_internal - Convenience function for testing if a PHY is internal
1396 * @phydev: the phy_device struct
1397 */
phy_is_internal(struct phy_device * phydev)1398 static inline bool phy_is_internal(struct phy_device *phydev)
1399 {
1400 return phydev->is_internal;
1401 }
1402
1403 /**
1404 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1405 * @phydev: the phy_device struct
1406 */
phy_on_sfp(struct phy_device * phydev)1407 static inline bool phy_on_sfp(struct phy_device *phydev)
1408 {
1409 return phydev->is_on_sfp_module;
1410 }
1411
1412 /**
1413 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1414 * PHY interface mode is RGMII (all variants)
1415 * @mode: the &phy_interface_t enum
1416 */
phy_interface_mode_is_rgmii(phy_interface_t mode)1417 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1418 {
1419 return mode >= PHY_INTERFACE_MODE_RGMII &&
1420 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1421 };
1422
1423 /**
1424 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1425 * negotiation
1426 * @mode: one of &enum phy_interface_t
1427 *
1428 * Returns true if the PHY interface mode uses the 16-bit negotiation
1429 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1430 */
phy_interface_mode_is_8023z(phy_interface_t mode)1431 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1432 {
1433 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1434 mode == PHY_INTERFACE_MODE_2500BASEX;
1435 }
1436
1437 /**
1438 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1439 * is RGMII (all variants)
1440 * @phydev: the phy_device struct
1441 */
phy_interface_is_rgmii(struct phy_device * phydev)1442 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1443 {
1444 return phy_interface_mode_is_rgmii(phydev->interface);
1445 };
1446
1447 /**
1448 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1449 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1450 * @phydev: the phy_device struct
1451 */
phy_is_pseudo_fixed_link(struct phy_device * phydev)1452 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1453 {
1454 return phydev->is_pseudo_fixed_link;
1455 }
1456
1457 int phy_save_page(struct phy_device *phydev);
1458 int phy_select_page(struct phy_device *phydev, int page);
1459 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1460 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1461 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1462 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1463 u16 mask, u16 set);
1464 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1465 u16 mask, u16 set);
1466
1467 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1468 bool is_c45,
1469 struct phy_c45_device_ids *c45_ids);
1470 #if IS_ENABLED(CONFIG_PHYLIB)
1471 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1472 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1473 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1474 struct phy_device *device_phy_find_device(struct device *dev);
1475 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode);
1476 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1477 int phy_device_register(struct phy_device *phy);
1478 void phy_device_free(struct phy_device *phydev);
1479 #else
fwnode_get_phy_id(struct fwnode_handle * fwnode,u32 * phy_id)1480 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
1481 {
1482 return 0;
1483 }
1484 static inline
fwnode_mdio_find_device(struct fwnode_handle * fwnode)1485 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
1486 {
1487 return 0;
1488 }
1489
1490 static inline
fwnode_phy_find_device(struct fwnode_handle * phy_fwnode)1491 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
1492 {
1493 return NULL;
1494 }
1495
device_phy_find_device(struct device * dev)1496 static inline struct phy_device *device_phy_find_device(struct device *dev)
1497 {
1498 return NULL;
1499 }
1500
1501 static inline
fwnode_get_phy_node(struct fwnode_handle * fwnode)1502 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
1503 {
1504 return NULL;
1505 }
1506
1507 static inline
get_phy_device(struct mii_bus * bus,int addr,bool is_c45)1508 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1509 {
1510 return NULL;
1511 }
1512
phy_device_register(struct phy_device * phy)1513 static inline int phy_device_register(struct phy_device *phy)
1514 {
1515 return 0;
1516 }
1517
phy_device_free(struct phy_device * phydev)1518 static inline void phy_device_free(struct phy_device *phydev) { }
1519 #endif /* CONFIG_PHYLIB */
1520 void phy_device_remove(struct phy_device *phydev);
1521 int phy_get_c45_ids(struct phy_device *phydev);
1522 int phy_init_hw(struct phy_device *phydev);
1523 int phy_suspend(struct phy_device *phydev);
1524 int phy_resume(struct phy_device *phydev);
1525 int __phy_resume(struct phy_device *phydev);
1526 int phy_loopback(struct phy_device *phydev, bool enable);
1527 void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1528 void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1529 int phy_sfp_probe(struct phy_device *phydev,
1530 const struct sfp_upstream_ops *ops);
1531 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1532 phy_interface_t interface);
1533 struct phy_device *phy_find_first(struct mii_bus *bus);
1534 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1535 u32 flags, phy_interface_t interface);
1536 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1537 void (*handler)(struct net_device *),
1538 phy_interface_t interface);
1539 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1540 void (*handler)(struct net_device *),
1541 phy_interface_t interface);
1542 void phy_disconnect(struct phy_device *phydev);
1543 void phy_detach(struct phy_device *phydev);
1544 void phy_start(struct phy_device *phydev);
1545 void phy_stop(struct phy_device *phydev);
1546 int phy_config_aneg(struct phy_device *phydev);
1547 int phy_start_aneg(struct phy_device *phydev);
1548 int phy_aneg_done(struct phy_device *phydev);
1549 int phy_speed_down(struct phy_device *phydev, bool sync);
1550 int phy_speed_up(struct phy_device *phydev);
1551
1552 int phy_restart_aneg(struct phy_device *phydev);
1553 int phy_reset_after_clk_enable(struct phy_device *phydev);
1554
1555 #if IS_ENABLED(CONFIG_PHYLIB)
1556 int phy_start_cable_test(struct phy_device *phydev,
1557 struct netlink_ext_ack *extack);
1558 int phy_start_cable_test_tdr(struct phy_device *phydev,
1559 struct netlink_ext_ack *extack,
1560 const struct phy_tdr_config *config);
1561 #else
1562 static inline
phy_start_cable_test(struct phy_device * phydev,struct netlink_ext_ack * extack)1563 int phy_start_cable_test(struct phy_device *phydev,
1564 struct netlink_ext_ack *extack)
1565 {
1566 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1567 return -EOPNOTSUPP;
1568 }
1569 static inline
phy_start_cable_test_tdr(struct phy_device * phydev,struct netlink_ext_ack * extack,const struct phy_tdr_config * config)1570 int phy_start_cable_test_tdr(struct phy_device *phydev,
1571 struct netlink_ext_ack *extack,
1572 const struct phy_tdr_config *config)
1573 {
1574 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1575 return -EOPNOTSUPP;
1576 }
1577 #endif
1578
1579 int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
1580 int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
1581 u16 cm);
1582
phy_device_reset(struct phy_device * phydev,int value)1583 static inline void phy_device_reset(struct phy_device *phydev, int value)
1584 {
1585 mdio_device_reset(&phydev->mdio, value);
1586 }
1587
1588 #define phydev_err(_phydev, format, args...) \
1589 dev_err(&_phydev->mdio.dev, format, ##args)
1590
1591 #define phydev_err_probe(_phydev, err, format, args...) \
1592 dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1593
1594 #define phydev_info(_phydev, format, args...) \
1595 dev_info(&_phydev->mdio.dev, format, ##args)
1596
1597 #define phydev_warn(_phydev, format, args...) \
1598 dev_warn(&_phydev->mdio.dev, format, ##args)
1599
1600 #define phydev_dbg(_phydev, format, args...) \
1601 dev_dbg(&_phydev->mdio.dev, format, ##args)
1602
phydev_name(const struct phy_device * phydev)1603 static inline const char *phydev_name(const struct phy_device *phydev)
1604 {
1605 return dev_name(&phydev->mdio.dev);
1606 }
1607
phy_lock_mdio_bus(struct phy_device * phydev)1608 static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1609 {
1610 mutex_lock(&phydev->mdio.bus->mdio_lock);
1611 }
1612
phy_unlock_mdio_bus(struct phy_device * phydev)1613 static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1614 {
1615 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1616 }
1617
1618 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1619 __printf(2, 3);
1620 char *phy_attached_info_irq(struct phy_device *phydev)
1621 __malloc;
1622 void phy_attached_info(struct phy_device *phydev);
1623
1624 /* Clause 22 PHY */
1625 int genphy_read_abilities(struct phy_device *phydev);
1626 int genphy_setup_forced(struct phy_device *phydev);
1627 int genphy_restart_aneg(struct phy_device *phydev);
1628 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1629 int genphy_config_eee_advert(struct phy_device *phydev);
1630 int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1631 int genphy_aneg_done(struct phy_device *phydev);
1632 int genphy_update_link(struct phy_device *phydev);
1633 int genphy_read_lpa(struct phy_device *phydev);
1634 int genphy_read_status_fixed(struct phy_device *phydev);
1635 int genphy_read_status(struct phy_device *phydev);
1636 int genphy_read_master_slave(struct phy_device *phydev);
1637 int genphy_suspend(struct phy_device *phydev);
1638 int genphy_resume(struct phy_device *phydev);
1639 int genphy_loopback(struct phy_device *phydev, bool enable);
1640 int genphy_soft_reset(struct phy_device *phydev);
1641 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1642
genphy_config_aneg(struct phy_device * phydev)1643 static inline int genphy_config_aneg(struct phy_device *phydev)
1644 {
1645 return __genphy_config_aneg(phydev, false);
1646 }
1647
genphy_no_config_intr(struct phy_device * phydev)1648 static inline int genphy_no_config_intr(struct phy_device *phydev)
1649 {
1650 return 0;
1651 }
1652 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1653 u16 regnum);
1654 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1655 u16 regnum, u16 val);
1656
1657 /* Clause 37 */
1658 int genphy_c37_config_aneg(struct phy_device *phydev);
1659 int genphy_c37_read_status(struct phy_device *phydev);
1660
1661 /* Clause 45 PHY */
1662 int genphy_c45_restart_aneg(struct phy_device *phydev);
1663 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1664 int genphy_c45_aneg_done(struct phy_device *phydev);
1665 int genphy_c45_read_link(struct phy_device *phydev);
1666 int genphy_c45_read_lpa(struct phy_device *phydev);
1667 int genphy_c45_read_pma(struct phy_device *phydev);
1668 int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1669 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1670 int genphy_c45_an_config_aneg(struct phy_device *phydev);
1671 int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1672 int genphy_c45_read_mdix(struct phy_device *phydev);
1673 int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1674 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1675 int genphy_c45_read_status(struct phy_device *phydev);
1676 int genphy_c45_baset1_read_status(struct phy_device *phydev);
1677 int genphy_c45_config_aneg(struct phy_device *phydev);
1678 int genphy_c45_loopback(struct phy_device *phydev, bool enable);
1679 int genphy_c45_pma_resume(struct phy_device *phydev);
1680 int genphy_c45_pma_suspend(struct phy_device *phydev);
1681 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
1682
1683 /* Generic C45 PHY driver */
1684 extern struct phy_driver genphy_c45_driver;
1685
1686 /* The gen10g_* functions are the old Clause 45 stub */
1687 int gen10g_config_aneg(struct phy_device *phydev);
1688
phy_read_status(struct phy_device * phydev)1689 static inline int phy_read_status(struct phy_device *phydev)
1690 {
1691 if (!phydev->drv)
1692 return -EIO;
1693
1694 if (phydev->drv->read_status)
1695 return phydev->drv->read_status(phydev);
1696 else
1697 return genphy_read_status(phydev);
1698 }
1699
1700 void phy_driver_unregister(struct phy_driver *drv);
1701 void phy_drivers_unregister(struct phy_driver *drv, int n);
1702 int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1703 int phy_drivers_register(struct phy_driver *new_driver, int n,
1704 struct module *owner);
1705 void phy_error(struct phy_device *phydev);
1706 void phy_state_machine(struct work_struct *work);
1707 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1708 void phy_trigger_machine(struct phy_device *phydev);
1709 void phy_mac_interrupt(struct phy_device *phydev);
1710 void phy_start_machine(struct phy_device *phydev);
1711 void phy_stop_machine(struct phy_device *phydev);
1712 void phy_ethtool_ksettings_get(struct phy_device *phydev,
1713 struct ethtool_link_ksettings *cmd);
1714 int phy_ethtool_ksettings_set(struct phy_device *phydev,
1715 const struct ethtool_link_ksettings *cmd);
1716 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1717 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1718 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1719 int phy_disable_interrupts(struct phy_device *phydev);
1720 void phy_request_interrupt(struct phy_device *phydev);
1721 void phy_free_interrupt(struct phy_device *phydev);
1722 void phy_print_status(struct phy_device *phydev);
1723 int phy_get_rate_matching(struct phy_device *phydev,
1724 phy_interface_t iface);
1725 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1726 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1727 void phy_advertise_supported(struct phy_device *phydev);
1728 void phy_support_sym_pause(struct phy_device *phydev);
1729 void phy_support_asym_pause(struct phy_device *phydev);
1730 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1731 bool autoneg);
1732 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1733 bool phy_validate_pause(struct phy_device *phydev,
1734 struct ethtool_pauseparam *pp);
1735 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
1736
1737 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1738 const int *delay_values, int size, bool is_rx);
1739
1740 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1741 bool *tx_pause, bool *rx_pause);
1742
1743 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1744 int (*run)(struct phy_device *));
1745 int phy_register_fixup_for_id(const char *bus_id,
1746 int (*run)(struct phy_device *));
1747 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1748 int (*run)(struct phy_device *));
1749
1750 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1751 int phy_unregister_fixup_for_id(const char *bus_id);
1752 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1753
1754 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1755 int phy_get_eee_err(struct phy_device *phydev);
1756 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1757 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1758 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1759 void phy_ethtool_get_wol(struct phy_device *phydev,
1760 struct ethtool_wolinfo *wol);
1761 int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1762 struct ethtool_link_ksettings *cmd);
1763 int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1764 const struct ethtool_link_ksettings *cmd);
1765 int phy_ethtool_nway_reset(struct net_device *ndev);
1766 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
1767 void phy_package_leave(struct phy_device *phydev);
1768 int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1769 int addr, size_t priv_size);
1770
1771 #if IS_ENABLED(CONFIG_PHYLIB)
1772 int __init mdio_bus_init(void);
1773 void mdio_bus_exit(void);
1774 #endif
1775
1776 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
1777 int phy_ethtool_get_sset_count(struct phy_device *phydev);
1778 int phy_ethtool_get_stats(struct phy_device *phydev,
1779 struct ethtool_stats *stats, u64 *data);
1780
phy_package_read(struct phy_device * phydev,u32 regnum)1781 static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
1782 {
1783 struct phy_package_shared *shared = phydev->shared;
1784
1785 if (!shared)
1786 return -EIO;
1787
1788 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1789 }
1790
__phy_package_read(struct phy_device * phydev,u32 regnum)1791 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
1792 {
1793 struct phy_package_shared *shared = phydev->shared;
1794
1795 if (!shared)
1796 return -EIO;
1797
1798 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1799 }
1800
phy_package_write(struct phy_device * phydev,u32 regnum,u16 val)1801 static inline int phy_package_write(struct phy_device *phydev,
1802 u32 regnum, u16 val)
1803 {
1804 struct phy_package_shared *shared = phydev->shared;
1805
1806 if (!shared)
1807 return -EIO;
1808
1809 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1810 }
1811
__phy_package_write(struct phy_device * phydev,u32 regnum,u16 val)1812 static inline int __phy_package_write(struct phy_device *phydev,
1813 u32 regnum, u16 val)
1814 {
1815 struct phy_package_shared *shared = phydev->shared;
1816
1817 if (!shared)
1818 return -EIO;
1819
1820 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1821 }
1822
__phy_package_set_once(struct phy_device * phydev,unsigned int b)1823 static inline bool __phy_package_set_once(struct phy_device *phydev,
1824 unsigned int b)
1825 {
1826 struct phy_package_shared *shared = phydev->shared;
1827
1828 if (!shared)
1829 return false;
1830
1831 return !test_and_set_bit(b, &shared->flags);
1832 }
1833
phy_package_init_once(struct phy_device * phydev)1834 static inline bool phy_package_init_once(struct phy_device *phydev)
1835 {
1836 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
1837 }
1838
phy_package_probe_once(struct phy_device * phydev)1839 static inline bool phy_package_probe_once(struct phy_device *phydev)
1840 {
1841 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
1842 }
1843
1844 extern struct bus_type mdio_bus_type;
1845
1846 struct mdio_board_info {
1847 const char *bus_id;
1848 char modalias[MDIO_NAME_SIZE];
1849 int mdio_addr;
1850 const void *platform_data;
1851 };
1852
1853 #if IS_ENABLED(CONFIG_MDIO_DEVICE)
1854 int mdiobus_register_board_info(const struct mdio_board_info *info,
1855 unsigned int n);
1856 #else
mdiobus_register_board_info(const struct mdio_board_info * i,unsigned int n)1857 static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1858 unsigned int n)
1859 {
1860 return 0;
1861 }
1862 #endif
1863
1864
1865 /**
1866 * phy_module_driver() - Helper macro for registering PHY drivers
1867 * @__phy_drivers: array of PHY drivers to register
1868 * @__count: Numbers of members in array
1869 *
1870 * Helper macro for PHY drivers which do not do anything special in module
1871 * init/exit. Each module may only use this macro once, and calling it
1872 * replaces module_init() and module_exit().
1873 */
1874 #define phy_module_driver(__phy_drivers, __count) \
1875 static int __init phy_module_init(void) \
1876 { \
1877 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1878 } \
1879 module_init(phy_module_init); \
1880 static void __exit phy_module_exit(void) \
1881 { \
1882 phy_drivers_unregister(__phy_drivers, __count); \
1883 } \
1884 module_exit(phy_module_exit)
1885
1886 #define module_phy_driver(__phy_drivers) \
1887 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1888
1889 bool phy_driver_is_genphy(struct phy_device *phydev);
1890 bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1891
1892 #endif /* __PHY_H */
1893