1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * phylink models the MAC to optional PHY connection, supporting
4 * technologies such as SFP cages where the PHY is hot-pluggable.
5 *
6 * Copyright (C) 2015 Russell King
7 */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22
23 #include "sfp.h"
24 #include "swphy.h"
25
26 #define SUPPORTED_INTERFACES \
27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
29 #define ADVERTISED_INTERFACES \
30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
32
33 enum {
34 PHYLINK_DISABLE_STOPPED,
35 PHYLINK_DISABLE_LINK,
36 PHYLINK_DISABLE_MAC_WOL,
37 };
38
39 /**
40 * struct phylink - internal data type for phylink
41 */
42 struct phylink {
43 /* private: */
44 struct net_device *netdev;
45 const struct phylink_mac_ops *mac_ops;
46 struct phylink_config *config;
47 struct phylink_pcs *pcs;
48 struct device *dev;
49 unsigned int old_link_state:1;
50
51 unsigned long phylink_disable_state; /* bitmask of disables */
52 struct phy_device *phydev;
53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
54 u8 cfg_link_an_mode; /* MLO_AN_xxx */
55 u8 cur_link_an_mode;
56 u8 link_port; /* The current non-phy ethtool port */
57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
58
59 /* The link configuration settings */
60 struct phylink_link_state link_config;
61
62 /* The current settings */
63 phy_interface_t cur_interface;
64
65 struct gpio_desc *link_gpio;
66 unsigned int link_irq;
67 struct timer_list link_poll;
68 void (*get_fixed_state)(struct net_device *dev,
69 struct phylink_link_state *s);
70
71 struct mutex state_mutex;
72 struct phylink_link_state phy_state;
73 struct work_struct resolve;
74
75 bool mac_link_dropped;
76 bool using_mac_select_pcs;
77
78 struct sfp_bus *sfp_bus;
79 bool sfp_may_have_phy;
80 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
82 u8 sfp_port;
83 };
84
85 #define phylink_printk(level, pl, fmt, ...) \
86 do { \
87 if ((pl)->config->type == PHYLINK_NETDEV) \
88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
89 else if ((pl)->config->type == PHYLINK_DEV) \
90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
91 } while (0)
92
93 #define phylink_err(pl, fmt, ...) \
94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
95 #define phylink_warn(pl, fmt, ...) \
96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
97 #define phylink_info(pl, fmt, ...) \
98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
99 #if defined(CONFIG_DYNAMIC_DEBUG)
100 #define phylink_dbg(pl, fmt, ...) \
101 do { \
102 if ((pl)->config->type == PHYLINK_NETDEV) \
103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
104 else if ((pl)->config->type == PHYLINK_DEV) \
105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \
106 } while (0)
107 #elif defined(DEBUG)
108 #define phylink_dbg(pl, fmt, ...) \
109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
110 #else
111 #define phylink_dbg(pl, fmt, ...) \
112 ({ \
113 if (0) \
114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
115 })
116 #endif
117
118 /**
119 * phylink_set_port_modes() - set the port type modes in the ethtool mask
120 * @mask: ethtool link mode mask
121 *
122 * Sets all the port type modes in the ethtool mask. MAC drivers should
123 * use this in their 'validate' callback.
124 */
phylink_set_port_modes(unsigned long * mask)125 void phylink_set_port_modes(unsigned long *mask)
126 {
127 phylink_set(mask, TP);
128 phylink_set(mask, AUI);
129 phylink_set(mask, MII);
130 phylink_set(mask, FIBRE);
131 phylink_set(mask, BNC);
132 phylink_set(mask, Backplane);
133 }
134 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
135
phylink_is_empty_linkmode(const unsigned long * linkmode)136 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
137 {
138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
139
140 phylink_set_port_modes(tmp);
141 phylink_set(tmp, Autoneg);
142 phylink_set(tmp, Pause);
143 phylink_set(tmp, Asym_Pause);
144
145 return linkmode_subset(linkmode, tmp);
146 }
147
phylink_an_mode_str(unsigned int mode)148 static const char *phylink_an_mode_str(unsigned int mode)
149 {
150 static const char *modestr[] = {
151 [MLO_AN_PHY] = "phy",
152 [MLO_AN_FIXED] = "fixed",
153 [MLO_AN_INBAND] = "inband",
154 };
155
156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
157 }
158
159 /**
160 * phylink_interface_max_speed() - get the maximum speed of a phy interface
161 * @interface: phy interface mode defined by &typedef phy_interface_t
162 *
163 * Determine the maximum speed of a phy interface. This is intended to help
164 * determine the correct speed to pass to the MAC when the phy is performing
165 * rate matching.
166 *
167 * Return: The maximum speed of @interface
168 */
phylink_interface_max_speed(phy_interface_t interface)169 static int phylink_interface_max_speed(phy_interface_t interface)
170 {
171 switch (interface) {
172 case PHY_INTERFACE_MODE_100BASEX:
173 case PHY_INTERFACE_MODE_REVRMII:
174 case PHY_INTERFACE_MODE_RMII:
175 case PHY_INTERFACE_MODE_SMII:
176 case PHY_INTERFACE_MODE_REVMII:
177 case PHY_INTERFACE_MODE_MII:
178 return SPEED_100;
179
180 case PHY_INTERFACE_MODE_TBI:
181 case PHY_INTERFACE_MODE_MOCA:
182 case PHY_INTERFACE_MODE_RTBI:
183 case PHY_INTERFACE_MODE_1000BASEX:
184 case PHY_INTERFACE_MODE_1000BASEKX:
185 case PHY_INTERFACE_MODE_TRGMII:
186 case PHY_INTERFACE_MODE_RGMII_TXID:
187 case PHY_INTERFACE_MODE_RGMII_RXID:
188 case PHY_INTERFACE_MODE_RGMII_ID:
189 case PHY_INTERFACE_MODE_RGMII:
190 case PHY_INTERFACE_MODE_QSGMII:
191 case PHY_INTERFACE_MODE_QUSGMII:
192 case PHY_INTERFACE_MODE_SGMII:
193 case PHY_INTERFACE_MODE_GMII:
194 return SPEED_1000;
195
196 case PHY_INTERFACE_MODE_2500BASEX:
197 return SPEED_2500;
198
199 case PHY_INTERFACE_MODE_5GBASER:
200 return SPEED_5000;
201
202 case PHY_INTERFACE_MODE_XGMII:
203 case PHY_INTERFACE_MODE_RXAUI:
204 case PHY_INTERFACE_MODE_XAUI:
205 case PHY_INTERFACE_MODE_10GBASER:
206 case PHY_INTERFACE_MODE_10GKR:
207 case PHY_INTERFACE_MODE_USXGMII:
208 return SPEED_10000;
209
210 case PHY_INTERFACE_MODE_25GBASER:
211 return SPEED_25000;
212
213 case PHY_INTERFACE_MODE_XLGMII:
214 return SPEED_40000;
215
216 case PHY_INTERFACE_MODE_INTERNAL:
217 case PHY_INTERFACE_MODE_NA:
218 case PHY_INTERFACE_MODE_MAX:
219 /* No idea! Garbage in, unknown out */
220 return SPEED_UNKNOWN;
221 }
222
223 /* If we get here, someone forgot to add an interface mode above */
224 WARN_ON_ONCE(1);
225 return SPEED_UNKNOWN;
226 }
227
228 /**
229 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
230 * @linkmodes: ethtool linkmode mask (must be already initialised)
231 * @caps: bitmask of MAC capabilities
232 *
233 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
234 * supported by the @caps. @linkmodes must have been initialised previously.
235 */
phylink_caps_to_linkmodes(unsigned long * linkmodes,unsigned long caps)236 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps)
237 {
238 if (caps & MAC_SYM_PAUSE)
239 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
240
241 if (caps & MAC_ASYM_PAUSE)
242 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
243
244 if (caps & MAC_10HD)
245 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
246
247 if (caps & MAC_10FD) {
248 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
249 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
250 }
251
252 if (caps & MAC_100HD) {
253 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
254 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
255 }
256
257 if (caps & MAC_100FD) {
258 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
259 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
260 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
261 }
262
263 if (caps & MAC_1000HD)
264 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
265
266 if (caps & MAC_1000FD) {
267 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
268 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
269 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
270 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
271 }
272
273 if (caps & MAC_2500FD) {
274 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
275 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
276 }
277
278 if (caps & MAC_5000FD)
279 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
280
281 if (caps & MAC_10000FD) {
282 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
283 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
284 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
285 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
286 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
287 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
288 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
289 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
290 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
291 }
292
293 if (caps & MAC_25000FD) {
294 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
295 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
296 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
297 }
298
299 if (caps & MAC_40000FD) {
300 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
301 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
302 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
303 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
304 }
305
306 if (caps & MAC_50000FD) {
307 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
308 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
309 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
310 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
311 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
312 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
313 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
314 linkmodes);
315 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
316 }
317
318 if (caps & MAC_56000FD) {
319 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
320 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
321 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
322 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
323 }
324
325 if (caps & MAC_100000FD) {
326 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
327 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
328 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
329 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
330 linkmodes);
331 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
332 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
333 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
334 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
335 linkmodes);
336 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
337 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
338 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
339 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
340 linkmodes);
341 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
342 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
343 }
344
345 if (caps & MAC_200000FD) {
346 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
347 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
348 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
349 linkmodes);
350 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
351 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
352 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
353 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
354 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
355 linkmodes);
356 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
357 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
358 }
359
360 if (caps & MAC_400000FD) {
361 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
362 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
363 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
364 linkmodes);
365 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
366 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
367 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
368 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
369 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
370 linkmodes);
371 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
372 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
373 }
374 }
375 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes);
376
377 static struct {
378 unsigned long mask;
379 int speed;
380 unsigned int duplex;
381 } phylink_caps_params[] = {
382 { MAC_400000FD, SPEED_400000, DUPLEX_FULL },
383 { MAC_200000FD, SPEED_200000, DUPLEX_FULL },
384 { MAC_100000FD, SPEED_100000, DUPLEX_FULL },
385 { MAC_56000FD, SPEED_56000, DUPLEX_FULL },
386 { MAC_50000FD, SPEED_50000, DUPLEX_FULL },
387 { MAC_40000FD, SPEED_40000, DUPLEX_FULL },
388 { MAC_25000FD, SPEED_25000, DUPLEX_FULL },
389 { MAC_20000FD, SPEED_20000, DUPLEX_FULL },
390 { MAC_10000FD, SPEED_10000, DUPLEX_FULL },
391 { MAC_5000FD, SPEED_5000, DUPLEX_FULL },
392 { MAC_2500FD, SPEED_2500, DUPLEX_FULL },
393 { MAC_1000FD, SPEED_1000, DUPLEX_FULL },
394 { MAC_1000HD, SPEED_1000, DUPLEX_HALF },
395 { MAC_100FD, SPEED_100, DUPLEX_FULL },
396 { MAC_100HD, SPEED_100, DUPLEX_HALF },
397 { MAC_10FD, SPEED_10, DUPLEX_FULL },
398 { MAC_10HD, SPEED_10, DUPLEX_HALF },
399 };
400
401 /**
402 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
403 * @speed: the speed to search for
404 * @duplex: the duplex to search for
405 *
406 * Find the mac capability for a given speed and duplex.
407 *
408 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
409 * there were no matches.
410 */
phylink_cap_from_speed_duplex(int speed,unsigned int duplex)411 static unsigned long phylink_cap_from_speed_duplex(int speed,
412 unsigned int duplex)
413 {
414 int i;
415
416 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
417 if (speed == phylink_caps_params[i].speed &&
418 duplex == phylink_caps_params[i].duplex)
419 return phylink_caps_params[i].mask;
420 }
421
422 return 0;
423 }
424
425 /**
426 * phylink_get_capabilities() - get capabilities for a given MAC
427 * @interface: phy interface mode defined by &typedef phy_interface_t
428 * @mac_capabilities: bitmask of MAC capabilities
429 * @rate_matching: type of rate matching being performed
430 *
431 * Get the MAC capabilities that are supported by the @interface mode and
432 * @mac_capabilities.
433 */
phylink_get_capabilities(phy_interface_t interface,unsigned long mac_capabilities,int rate_matching)434 unsigned long phylink_get_capabilities(phy_interface_t interface,
435 unsigned long mac_capabilities,
436 int rate_matching)
437 {
438 int max_speed = phylink_interface_max_speed(interface);
439 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
440 unsigned long matched_caps = 0;
441
442 switch (interface) {
443 case PHY_INTERFACE_MODE_USXGMII:
444 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
445 fallthrough;
446
447 case PHY_INTERFACE_MODE_RGMII_TXID:
448 case PHY_INTERFACE_MODE_RGMII_RXID:
449 case PHY_INTERFACE_MODE_RGMII_ID:
450 case PHY_INTERFACE_MODE_RGMII:
451 case PHY_INTERFACE_MODE_QSGMII:
452 case PHY_INTERFACE_MODE_QUSGMII:
453 case PHY_INTERFACE_MODE_SGMII:
454 case PHY_INTERFACE_MODE_GMII:
455 caps |= MAC_1000HD | MAC_1000FD;
456 fallthrough;
457
458 case PHY_INTERFACE_MODE_REVRMII:
459 case PHY_INTERFACE_MODE_RMII:
460 case PHY_INTERFACE_MODE_SMII:
461 case PHY_INTERFACE_MODE_REVMII:
462 case PHY_INTERFACE_MODE_MII:
463 caps |= MAC_10HD | MAC_10FD;
464 fallthrough;
465
466 case PHY_INTERFACE_MODE_100BASEX:
467 caps |= MAC_100HD | MAC_100FD;
468 break;
469
470 case PHY_INTERFACE_MODE_TBI:
471 case PHY_INTERFACE_MODE_MOCA:
472 case PHY_INTERFACE_MODE_RTBI:
473 case PHY_INTERFACE_MODE_1000BASEX:
474 caps |= MAC_1000HD;
475 fallthrough;
476 case PHY_INTERFACE_MODE_1000BASEKX:
477 case PHY_INTERFACE_MODE_TRGMII:
478 caps |= MAC_1000FD;
479 break;
480
481 case PHY_INTERFACE_MODE_2500BASEX:
482 caps |= MAC_2500FD;
483 break;
484
485 case PHY_INTERFACE_MODE_5GBASER:
486 caps |= MAC_5000FD;
487 break;
488
489 case PHY_INTERFACE_MODE_XGMII:
490 case PHY_INTERFACE_MODE_RXAUI:
491 case PHY_INTERFACE_MODE_XAUI:
492 case PHY_INTERFACE_MODE_10GBASER:
493 case PHY_INTERFACE_MODE_10GKR:
494 caps |= MAC_10000FD;
495 break;
496
497 case PHY_INTERFACE_MODE_25GBASER:
498 caps |= MAC_25000FD;
499 break;
500
501 case PHY_INTERFACE_MODE_XLGMII:
502 caps |= MAC_40000FD;
503 break;
504
505 case PHY_INTERFACE_MODE_INTERNAL:
506 caps |= ~0;
507 break;
508
509 case PHY_INTERFACE_MODE_NA:
510 case PHY_INTERFACE_MODE_MAX:
511 break;
512 }
513
514 switch (rate_matching) {
515 case RATE_MATCH_OPEN_LOOP:
516 /* TODO */
517 fallthrough;
518 case RATE_MATCH_NONE:
519 matched_caps = 0;
520 break;
521 case RATE_MATCH_PAUSE: {
522 /* The MAC must support asymmetric pause towards the local
523 * device for this. We could allow just symmetric pause, but
524 * then we might have to renegotiate if the link partner
525 * doesn't support pause. This is because there's no way to
526 * accept pause frames without transmitting them if we only
527 * support symmetric pause.
528 */
529 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
530 !(mac_capabilities & MAC_ASYM_PAUSE))
531 break;
532
533 /* We can't adapt if the MAC doesn't support the interface's
534 * max speed at full duplex.
535 */
536 if (mac_capabilities &
537 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
538 /* Although a duplex-matching phy might exist, we
539 * conservatively remove these modes because the MAC
540 * will not be aware of the half-duplex nature of the
541 * link.
542 */
543 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
544 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
545 }
546 break;
547 }
548 case RATE_MATCH_CRS:
549 /* The MAC must support half duplex at the interface's max
550 * speed.
551 */
552 if (mac_capabilities &
553 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
554 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
555 matched_caps &= mac_capabilities;
556 }
557 break;
558 }
559
560 return (caps & mac_capabilities) | matched_caps;
561 }
562 EXPORT_SYMBOL_GPL(phylink_get_capabilities);
563
564 /**
565 * phylink_generic_validate() - generic validate() callback implementation
566 * @config: a pointer to a &struct phylink_config.
567 * @supported: ethtool bitmask for supported link modes.
568 * @state: a pointer to a &struct phylink_link_state.
569 *
570 * Generic implementation of the validate() callback that MAC drivers can
571 * use when they pass the range of supported interfaces and MAC capabilities.
572 * This makes use of phylink_get_linkmodes().
573 */
phylink_generic_validate(struct phylink_config * config,unsigned long * supported,struct phylink_link_state * state)574 void phylink_generic_validate(struct phylink_config *config,
575 unsigned long *supported,
576 struct phylink_link_state *state)
577 {
578 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
579 unsigned long caps;
580
581 phylink_set_port_modes(mask);
582 phylink_set(mask, Autoneg);
583 caps = phylink_get_capabilities(state->interface,
584 config->mac_capabilities,
585 state->rate_matching);
586 phylink_caps_to_linkmodes(mask, caps);
587
588 linkmode_and(supported, supported, mask);
589 linkmode_and(state->advertising, state->advertising, mask);
590 }
591 EXPORT_SYMBOL_GPL(phylink_generic_validate);
592
phylink_validate_mac_and_pcs(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)593 static int phylink_validate_mac_and_pcs(struct phylink *pl,
594 unsigned long *supported,
595 struct phylink_link_state *state)
596 {
597 struct phylink_pcs *pcs;
598 int ret;
599
600 /* Get the PCS for this interface mode */
601 if (pl->using_mac_select_pcs) {
602 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
603 if (IS_ERR(pcs))
604 return PTR_ERR(pcs);
605 } else {
606 pcs = pl->pcs;
607 }
608
609 if (pcs) {
610 /* The PCS, if present, must be setup before phylink_create()
611 * has been called. If the ops is not initialised, print an
612 * error and backtrace rather than oopsing the kernel.
613 */
614 if (!pcs->ops) {
615 phylink_err(pl, "interface %s: uninitialised PCS\n",
616 phy_modes(state->interface));
617 dump_stack();
618 return -EINVAL;
619 }
620
621 /* Validate the link parameters with the PCS */
622 if (pcs->ops->pcs_validate) {
623 ret = pcs->ops->pcs_validate(pcs, supported, state);
624 if (ret < 0 || phylink_is_empty_linkmode(supported))
625 return -EINVAL;
626
627 /* Ensure the advertising mask is a subset of the
628 * supported mask.
629 */
630 linkmode_and(state->advertising, state->advertising,
631 supported);
632 }
633 }
634
635 /* Then validate the link parameters with the MAC */
636 pl->mac_ops->validate(pl->config, supported, state);
637
638 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
639 }
640
phylink_validate_mask(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state,const unsigned long * interfaces)641 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported,
642 struct phylink_link_state *state,
643 const unsigned long *interfaces)
644 {
645 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
646 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
647 __ETHTOOL_DECLARE_LINK_MODE_MASK(s);
648 struct phylink_link_state t;
649 int intf;
650
651 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
652 if (test_bit(intf, interfaces)) {
653 linkmode_copy(s, supported);
654
655 t = *state;
656 t.interface = intf;
657 if (!phylink_validate_mac_and_pcs(pl, s, &t)) {
658 linkmode_or(all_s, all_s, s);
659 linkmode_or(all_adv, all_adv, t.advertising);
660 }
661 }
662 }
663
664 linkmode_copy(supported, all_s);
665 linkmode_copy(state->advertising, all_adv);
666
667 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
668 }
669
phylink_validate(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)670 static int phylink_validate(struct phylink *pl, unsigned long *supported,
671 struct phylink_link_state *state)
672 {
673 const unsigned long *interfaces = pl->config->supported_interfaces;
674
675 if (!phy_interface_empty(interfaces)) {
676 if (state->interface == PHY_INTERFACE_MODE_NA)
677 return phylink_validate_mask(pl, supported, state,
678 interfaces);
679
680 if (!test_bit(state->interface, interfaces))
681 return -EINVAL;
682 }
683
684 return phylink_validate_mac_and_pcs(pl, supported, state);
685 }
686
phylink_parse_fixedlink(struct phylink * pl,struct fwnode_handle * fwnode)687 static int phylink_parse_fixedlink(struct phylink *pl,
688 struct fwnode_handle *fwnode)
689 {
690 struct fwnode_handle *fixed_node;
691 const struct phy_setting *s;
692 struct gpio_desc *desc;
693 u32 speed;
694 int ret;
695
696 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
697 if (fixed_node) {
698 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
699
700 pl->link_config.speed = speed;
701 pl->link_config.duplex = DUPLEX_HALF;
702
703 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
704 pl->link_config.duplex = DUPLEX_FULL;
705
706 /* We treat the "pause" and "asym-pause" terminology as
707 * defining the link partner's ability.
708 */
709 if (fwnode_property_read_bool(fixed_node, "pause"))
710 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
711 pl->link_config.lp_advertising);
712 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
713 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
714 pl->link_config.lp_advertising);
715
716 if (ret == 0) {
717 desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
718 GPIOD_IN, "?");
719
720 if (!IS_ERR(desc))
721 pl->link_gpio = desc;
722 else if (desc == ERR_PTR(-EPROBE_DEFER))
723 ret = -EPROBE_DEFER;
724 }
725 fwnode_handle_put(fixed_node);
726
727 if (ret)
728 return ret;
729 } else {
730 u32 prop[5];
731
732 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
733 NULL, 0);
734 if (ret != ARRAY_SIZE(prop)) {
735 phylink_err(pl, "broken fixed-link?\n");
736 return -EINVAL;
737 }
738
739 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
740 prop, ARRAY_SIZE(prop));
741 if (!ret) {
742 pl->link_config.duplex = prop[1] ?
743 DUPLEX_FULL : DUPLEX_HALF;
744 pl->link_config.speed = prop[2];
745 if (prop[3])
746 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
747 pl->link_config.lp_advertising);
748 if (prop[4])
749 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
750 pl->link_config.lp_advertising);
751 }
752 }
753
754 if (pl->link_config.speed > SPEED_1000 &&
755 pl->link_config.duplex != DUPLEX_FULL)
756 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
757 pl->link_config.speed);
758
759 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
760 linkmode_copy(pl->link_config.advertising, pl->supported);
761 phylink_validate(pl, pl->supported, &pl->link_config);
762
763 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
764 pl->supported, true);
765 linkmode_zero(pl->supported);
766 phylink_set(pl->supported, MII);
767 phylink_set(pl->supported, Pause);
768 phylink_set(pl->supported, Asym_Pause);
769 phylink_set(pl->supported, Autoneg);
770 if (s) {
771 __set_bit(s->bit, pl->supported);
772 __set_bit(s->bit, pl->link_config.lp_advertising);
773 } else {
774 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
775 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
776 pl->link_config.speed);
777 }
778
779 linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
780 pl->supported);
781
782 pl->link_config.link = 1;
783 pl->link_config.an_complete = 1;
784
785 return 0;
786 }
787
phylink_parse_mode(struct phylink * pl,struct fwnode_handle * fwnode)788 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
789 {
790 struct fwnode_handle *dn;
791 const char *managed;
792
793 dn = fwnode_get_named_child_node(fwnode, "fixed-link");
794 if (dn || fwnode_property_present(fwnode, "fixed-link"))
795 pl->cfg_link_an_mode = MLO_AN_FIXED;
796 fwnode_handle_put(dn);
797
798 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
799 strcmp(managed, "in-band-status") == 0) ||
800 pl->config->ovr_an_inband) {
801 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
802 phylink_err(pl,
803 "can't use both fixed-link and in-band-status\n");
804 return -EINVAL;
805 }
806
807 linkmode_zero(pl->supported);
808 phylink_set(pl->supported, MII);
809 phylink_set(pl->supported, Autoneg);
810 phylink_set(pl->supported, Asym_Pause);
811 phylink_set(pl->supported, Pause);
812 pl->link_config.an_enabled = true;
813 pl->cfg_link_an_mode = MLO_AN_INBAND;
814
815 switch (pl->link_config.interface) {
816 case PHY_INTERFACE_MODE_SGMII:
817 case PHY_INTERFACE_MODE_QSGMII:
818 case PHY_INTERFACE_MODE_QUSGMII:
819 case PHY_INTERFACE_MODE_RGMII:
820 case PHY_INTERFACE_MODE_RGMII_ID:
821 case PHY_INTERFACE_MODE_RGMII_RXID:
822 case PHY_INTERFACE_MODE_RGMII_TXID:
823 case PHY_INTERFACE_MODE_RTBI:
824 phylink_set(pl->supported, 10baseT_Half);
825 phylink_set(pl->supported, 10baseT_Full);
826 phylink_set(pl->supported, 100baseT_Half);
827 phylink_set(pl->supported, 100baseT_Full);
828 phylink_set(pl->supported, 1000baseT_Half);
829 phylink_set(pl->supported, 1000baseT_Full);
830 break;
831
832 case PHY_INTERFACE_MODE_1000BASEX:
833 phylink_set(pl->supported, 1000baseX_Full);
834 break;
835
836 case PHY_INTERFACE_MODE_2500BASEX:
837 phylink_set(pl->supported, 2500baseX_Full);
838 break;
839
840 case PHY_INTERFACE_MODE_5GBASER:
841 phylink_set(pl->supported, 5000baseT_Full);
842 break;
843
844 case PHY_INTERFACE_MODE_25GBASER:
845 phylink_set(pl->supported, 25000baseCR_Full);
846 phylink_set(pl->supported, 25000baseKR_Full);
847 phylink_set(pl->supported, 25000baseSR_Full);
848 fallthrough;
849 case PHY_INTERFACE_MODE_USXGMII:
850 case PHY_INTERFACE_MODE_10GKR:
851 case PHY_INTERFACE_MODE_10GBASER:
852 phylink_set(pl->supported, 10baseT_Half);
853 phylink_set(pl->supported, 10baseT_Full);
854 phylink_set(pl->supported, 100baseT_Half);
855 phylink_set(pl->supported, 100baseT_Full);
856 phylink_set(pl->supported, 1000baseT_Half);
857 phylink_set(pl->supported, 1000baseT_Full);
858 phylink_set(pl->supported, 1000baseX_Full);
859 phylink_set(pl->supported, 1000baseKX_Full);
860 phylink_set(pl->supported, 2500baseT_Full);
861 phylink_set(pl->supported, 2500baseX_Full);
862 phylink_set(pl->supported, 5000baseT_Full);
863 phylink_set(pl->supported, 10000baseT_Full);
864 phylink_set(pl->supported, 10000baseKR_Full);
865 phylink_set(pl->supported, 10000baseKX4_Full);
866 phylink_set(pl->supported, 10000baseCR_Full);
867 phylink_set(pl->supported, 10000baseSR_Full);
868 phylink_set(pl->supported, 10000baseLR_Full);
869 phylink_set(pl->supported, 10000baseLRM_Full);
870 phylink_set(pl->supported, 10000baseER_Full);
871 break;
872
873 case PHY_INTERFACE_MODE_XLGMII:
874 phylink_set(pl->supported, 25000baseCR_Full);
875 phylink_set(pl->supported, 25000baseKR_Full);
876 phylink_set(pl->supported, 25000baseSR_Full);
877 phylink_set(pl->supported, 40000baseKR4_Full);
878 phylink_set(pl->supported, 40000baseCR4_Full);
879 phylink_set(pl->supported, 40000baseSR4_Full);
880 phylink_set(pl->supported, 40000baseLR4_Full);
881 phylink_set(pl->supported, 50000baseCR2_Full);
882 phylink_set(pl->supported, 50000baseKR2_Full);
883 phylink_set(pl->supported, 50000baseSR2_Full);
884 phylink_set(pl->supported, 50000baseKR_Full);
885 phylink_set(pl->supported, 50000baseSR_Full);
886 phylink_set(pl->supported, 50000baseCR_Full);
887 phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
888 phylink_set(pl->supported, 50000baseDR_Full);
889 phylink_set(pl->supported, 100000baseKR4_Full);
890 phylink_set(pl->supported, 100000baseSR4_Full);
891 phylink_set(pl->supported, 100000baseCR4_Full);
892 phylink_set(pl->supported, 100000baseLR4_ER4_Full);
893 phylink_set(pl->supported, 100000baseKR2_Full);
894 phylink_set(pl->supported, 100000baseSR2_Full);
895 phylink_set(pl->supported, 100000baseCR2_Full);
896 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
897 phylink_set(pl->supported, 100000baseDR2_Full);
898 break;
899
900 default:
901 phylink_err(pl,
902 "incorrect link mode %s for in-band status\n",
903 phy_modes(pl->link_config.interface));
904 return -EINVAL;
905 }
906
907 linkmode_copy(pl->link_config.advertising, pl->supported);
908
909 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
910 phylink_err(pl,
911 "failed to validate link configuration for in-band status\n");
912 return -EINVAL;
913 }
914
915 /* Check if MAC/PCS also supports Autoneg. */
916 pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg);
917 }
918
919 return 0;
920 }
921
phylink_apply_manual_flow(struct phylink * pl,struct phylink_link_state * state)922 static void phylink_apply_manual_flow(struct phylink *pl,
923 struct phylink_link_state *state)
924 {
925 /* If autoneg is disabled, pause AN is also disabled */
926 if (!state->an_enabled)
927 state->pause &= ~MLO_PAUSE_AN;
928
929 /* Manual configuration of pause modes */
930 if (!(pl->link_config.pause & MLO_PAUSE_AN))
931 state->pause = pl->link_config.pause;
932 }
933
phylink_resolve_flow(struct phylink_link_state * state)934 static void phylink_resolve_flow(struct phylink_link_state *state)
935 {
936 bool tx_pause, rx_pause;
937
938 state->pause = MLO_PAUSE_NONE;
939 if (state->duplex == DUPLEX_FULL) {
940 linkmode_resolve_pause(state->advertising,
941 state->lp_advertising,
942 &tx_pause, &rx_pause);
943 if (tx_pause)
944 state->pause |= MLO_PAUSE_TX;
945 if (rx_pause)
946 state->pause |= MLO_PAUSE_RX;
947 }
948 }
949
phylink_pcs_poll_stop(struct phylink * pl)950 static void phylink_pcs_poll_stop(struct phylink *pl)
951 {
952 if (pl->cfg_link_an_mode == MLO_AN_INBAND)
953 del_timer(&pl->link_poll);
954 }
955
phylink_pcs_poll_start(struct phylink * pl)956 static void phylink_pcs_poll_start(struct phylink *pl)
957 {
958 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
959 mod_timer(&pl->link_poll, jiffies + HZ);
960 }
961
phylink_mac_config(struct phylink * pl,const struct phylink_link_state * state)962 static void phylink_mac_config(struct phylink *pl,
963 const struct phylink_link_state *state)
964 {
965 phylink_dbg(pl,
966 "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n",
967 __func__, phylink_an_mode_str(pl->cur_link_an_mode),
968 phy_modes(state->interface),
969 phy_speed_to_str(state->speed),
970 phy_duplex_to_str(state->duplex),
971 phy_rate_matching_to_str(state->rate_matching),
972 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising,
973 state->pause, state->link, state->an_enabled);
974
975 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state);
976 }
977
phylink_mac_pcs_an_restart(struct phylink * pl)978 static void phylink_mac_pcs_an_restart(struct phylink *pl)
979 {
980 if (pl->link_config.an_enabled &&
981 phy_interface_mode_is_8023z(pl->link_config.interface) &&
982 phylink_autoneg_inband(pl->cur_link_an_mode)) {
983 if (pl->pcs)
984 pl->pcs->ops->pcs_an_restart(pl->pcs);
985 else if (pl->config->legacy_pre_march2020)
986 pl->mac_ops->mac_an_restart(pl->config);
987 }
988 }
989
phylink_major_config(struct phylink * pl,bool restart,const struct phylink_link_state * state)990 static void phylink_major_config(struct phylink *pl, bool restart,
991 const struct phylink_link_state *state)
992 {
993 struct phylink_pcs *pcs = NULL;
994 bool pcs_changed = false;
995 int err;
996
997 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
998
999 if (pl->using_mac_select_pcs) {
1000 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1001 if (IS_ERR(pcs)) {
1002 phylink_err(pl,
1003 "mac_select_pcs unexpectedly failed: %pe\n",
1004 pcs);
1005 return;
1006 }
1007
1008 pcs_changed = pcs && pl->pcs != pcs;
1009 }
1010
1011 phylink_pcs_poll_stop(pl);
1012
1013 if (pl->mac_ops->mac_prepare) {
1014 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1015 state->interface);
1016 if (err < 0) {
1017 phylink_err(pl, "mac_prepare failed: %pe\n",
1018 ERR_PTR(err));
1019 return;
1020 }
1021 }
1022
1023 /* If we have a new PCS, switch to the new PCS after preparing the MAC
1024 * for the change.
1025 */
1026 if (pcs_changed)
1027 pl->pcs = pcs;
1028
1029 phylink_mac_config(pl, state);
1030
1031 if (pl->pcs) {
1032 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
1033 state->interface,
1034 state->advertising,
1035 !!(pl->link_config.pause &
1036 MLO_PAUSE_AN));
1037 if (err < 0)
1038 phylink_err(pl, "pcs_config failed: %pe\n",
1039 ERR_PTR(err));
1040 if (err > 0)
1041 restart = true;
1042 }
1043 if (restart)
1044 phylink_mac_pcs_an_restart(pl);
1045
1046 if (pl->mac_ops->mac_finish) {
1047 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1048 state->interface);
1049 if (err < 0)
1050 phylink_err(pl, "mac_finish failed: %pe\n",
1051 ERR_PTR(err));
1052 }
1053
1054 phylink_pcs_poll_start(pl);
1055 }
1056
1057 /*
1058 * Reconfigure for a change of inband advertisement.
1059 * If we have a separate PCS, we only need to call its pcs_config() method,
1060 * and then restart AN if it indicates something changed. Otherwise, we do
1061 * the full MAC reconfiguration.
1062 */
phylink_change_inband_advert(struct phylink * pl)1063 static int phylink_change_inband_advert(struct phylink *pl)
1064 {
1065 int ret;
1066
1067 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1068 return 0;
1069
1070 if (!pl->pcs && pl->config->legacy_pre_march2020) {
1071 /* Legacy method */
1072 phylink_mac_config(pl, &pl->link_config);
1073 phylink_mac_pcs_an_restart(pl);
1074 return 0;
1075 }
1076
1077 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1078 phylink_an_mode_str(pl->cur_link_an_mode),
1079 phy_modes(pl->link_config.interface),
1080 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1081 pl->link_config.pause);
1082
1083 /* Modern PCS-based method; update the advert at the PCS, and
1084 * restart negotiation if the pcs_config() helper indicates that
1085 * the programmed advertisement has changed.
1086 */
1087 ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
1088 pl->link_config.interface,
1089 pl->link_config.advertising,
1090 !!(pl->link_config.pause &
1091 MLO_PAUSE_AN));
1092 if (ret < 0)
1093 return ret;
1094
1095 if (ret > 0)
1096 phylink_mac_pcs_an_restart(pl);
1097
1098 return 0;
1099 }
1100
phylink_mac_pcs_get_state(struct phylink * pl,struct phylink_link_state * state)1101 static void phylink_mac_pcs_get_state(struct phylink *pl,
1102 struct phylink_link_state *state)
1103 {
1104 linkmode_copy(state->advertising, pl->link_config.advertising);
1105 linkmode_zero(state->lp_advertising);
1106 state->interface = pl->link_config.interface;
1107 state->an_enabled = pl->link_config.an_enabled;
1108 state->rate_matching = pl->link_config.rate_matching;
1109 if (state->an_enabled) {
1110 state->speed = SPEED_UNKNOWN;
1111 state->duplex = DUPLEX_UNKNOWN;
1112 state->pause = MLO_PAUSE_NONE;
1113 } else {
1114 state->speed = pl->link_config.speed;
1115 state->duplex = pl->link_config.duplex;
1116 state->pause = pl->link_config.pause;
1117 }
1118 state->an_complete = 0;
1119 state->link = 1;
1120
1121 if (pl->pcs)
1122 pl->pcs->ops->pcs_get_state(pl->pcs, state);
1123 else if (pl->mac_ops->mac_pcs_get_state &&
1124 pl->config->legacy_pre_march2020)
1125 pl->mac_ops->mac_pcs_get_state(pl->config, state);
1126 else
1127 state->link = 0;
1128 }
1129
1130 /* The fixed state is... fixed except for the link state,
1131 * which may be determined by a GPIO or a callback.
1132 */
phylink_get_fixed_state(struct phylink * pl,struct phylink_link_state * state)1133 static void phylink_get_fixed_state(struct phylink *pl,
1134 struct phylink_link_state *state)
1135 {
1136 *state = pl->link_config;
1137 if (pl->config->get_fixed_state)
1138 pl->config->get_fixed_state(pl->config, state);
1139 else if (pl->link_gpio)
1140 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1141
1142 phylink_resolve_flow(state);
1143 }
1144
phylink_mac_initial_config(struct phylink * pl,bool force_restart)1145 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1146 {
1147 struct phylink_link_state link_state;
1148
1149 switch (pl->cur_link_an_mode) {
1150 case MLO_AN_PHY:
1151 link_state = pl->phy_state;
1152 break;
1153
1154 case MLO_AN_FIXED:
1155 phylink_get_fixed_state(pl, &link_state);
1156 break;
1157
1158 case MLO_AN_INBAND:
1159 link_state = pl->link_config;
1160 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1161 link_state.pause = MLO_PAUSE_NONE;
1162 break;
1163
1164 default: /* can't happen */
1165 return;
1166 }
1167
1168 link_state.link = false;
1169
1170 phylink_apply_manual_flow(pl, &link_state);
1171 phylink_major_config(pl, force_restart, &link_state);
1172 }
1173
phylink_pause_to_str(int pause)1174 static const char *phylink_pause_to_str(int pause)
1175 {
1176 switch (pause & MLO_PAUSE_TXRX_MASK) {
1177 case MLO_PAUSE_TX | MLO_PAUSE_RX:
1178 return "rx/tx";
1179 case MLO_PAUSE_TX:
1180 return "tx";
1181 case MLO_PAUSE_RX:
1182 return "rx";
1183 default:
1184 return "off";
1185 }
1186 }
1187
phylink_link_up(struct phylink * pl,struct phylink_link_state link_state)1188 static void phylink_link_up(struct phylink *pl,
1189 struct phylink_link_state link_state)
1190 {
1191 struct net_device *ndev = pl->netdev;
1192 int speed, duplex;
1193 bool rx_pause;
1194
1195 speed = link_state.speed;
1196 duplex = link_state.duplex;
1197 rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1198
1199 switch (link_state.rate_matching) {
1200 case RATE_MATCH_PAUSE:
1201 /* The PHY is doing rate matchion from the media rate (in
1202 * the link_state) to the interface speed, and will send
1203 * pause frames to the MAC to limit its transmission speed.
1204 */
1205 speed = phylink_interface_max_speed(link_state.interface);
1206 duplex = DUPLEX_FULL;
1207 rx_pause = true;
1208 break;
1209
1210 case RATE_MATCH_CRS:
1211 /* The PHY is doing rate matchion from the media rate (in
1212 * the link_state) to the interface speed, and will cause
1213 * collisions to the MAC to limit its transmission speed.
1214 */
1215 speed = phylink_interface_max_speed(link_state.interface);
1216 duplex = DUPLEX_HALF;
1217 break;
1218 }
1219
1220 pl->cur_interface = link_state.interface;
1221
1222 if (pl->pcs && pl->pcs->ops->pcs_link_up)
1223 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode,
1224 pl->cur_interface, speed, duplex);
1225
1226 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1227 pl->cur_interface, speed, duplex,
1228 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1229
1230 if (ndev)
1231 netif_carrier_on(ndev);
1232
1233 phylink_info(pl,
1234 "Link is Up - %s/%s - flow control %s\n",
1235 phy_speed_to_str(link_state.speed),
1236 phy_duplex_to_str(link_state.duplex),
1237 phylink_pause_to_str(link_state.pause));
1238 }
1239
phylink_link_down(struct phylink * pl)1240 static void phylink_link_down(struct phylink *pl)
1241 {
1242 struct net_device *ndev = pl->netdev;
1243
1244 if (ndev)
1245 netif_carrier_off(ndev);
1246 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1247 pl->cur_interface);
1248 phylink_info(pl, "Link is Down\n");
1249 }
1250
phylink_resolve(struct work_struct * w)1251 static void phylink_resolve(struct work_struct *w)
1252 {
1253 struct phylink *pl = container_of(w, struct phylink, resolve);
1254 struct phylink_link_state link_state;
1255 struct net_device *ndev = pl->netdev;
1256 bool mac_config = false;
1257 bool retrigger = false;
1258 bool cur_link_state;
1259
1260 mutex_lock(&pl->state_mutex);
1261 if (pl->netdev)
1262 cur_link_state = netif_carrier_ok(ndev);
1263 else
1264 cur_link_state = pl->old_link_state;
1265
1266 if (pl->phylink_disable_state) {
1267 pl->mac_link_dropped = false;
1268 link_state.link = false;
1269 } else if (pl->mac_link_dropped) {
1270 link_state.link = false;
1271 retrigger = true;
1272 } else {
1273 switch (pl->cur_link_an_mode) {
1274 case MLO_AN_PHY:
1275 link_state = pl->phy_state;
1276 phylink_apply_manual_flow(pl, &link_state);
1277 mac_config = link_state.link;
1278 break;
1279
1280 case MLO_AN_FIXED:
1281 phylink_get_fixed_state(pl, &link_state);
1282 mac_config = link_state.link;
1283 break;
1284
1285 case MLO_AN_INBAND:
1286 phylink_mac_pcs_get_state(pl, &link_state);
1287
1288 /* The PCS may have a latching link-fail indicator.
1289 * If the link was up, bring the link down and
1290 * re-trigger the resolve. Otherwise, re-read the
1291 * PCS state to get the current status of the link.
1292 */
1293 if (!link_state.link) {
1294 if (cur_link_state)
1295 retrigger = true;
1296 else
1297 phylink_mac_pcs_get_state(pl,
1298 &link_state);
1299 }
1300
1301 /* If we have a phy, the "up" state is the union of
1302 * both the PHY and the MAC
1303 */
1304 if (pl->phydev)
1305 link_state.link &= pl->phy_state.link;
1306
1307 /* Only update if the PHY link is up */
1308 if (pl->phydev && pl->phy_state.link) {
1309 /* If the interface has changed, force a
1310 * link down event if the link isn't already
1311 * down, and re-resolve.
1312 */
1313 if (link_state.interface !=
1314 pl->phy_state.interface) {
1315 retrigger = true;
1316 link_state.link = false;
1317 }
1318 link_state.interface = pl->phy_state.interface;
1319
1320 /* If we are doing rate matching, then the
1321 * link speed/duplex comes from the PHY
1322 */
1323 if (pl->phy_state.rate_matching) {
1324 link_state.rate_matching =
1325 pl->phy_state.rate_matching;
1326 link_state.speed = pl->phy_state.speed;
1327 link_state.duplex =
1328 pl->phy_state.duplex;
1329 }
1330
1331 /* If we have a PHY, we need to update with
1332 * the PHY flow control bits.
1333 */
1334 link_state.pause = pl->phy_state.pause;
1335 mac_config = true;
1336 }
1337 phylink_apply_manual_flow(pl, &link_state);
1338 break;
1339 }
1340 }
1341
1342 if (mac_config) {
1343 if (link_state.interface != pl->link_config.interface) {
1344 /* The interface has changed, force the link down and
1345 * then reconfigure.
1346 */
1347 if (cur_link_state) {
1348 phylink_link_down(pl);
1349 cur_link_state = false;
1350 }
1351 phylink_major_config(pl, false, &link_state);
1352 pl->link_config.interface = link_state.interface;
1353 } else if (!pl->pcs && pl->config->legacy_pre_march2020) {
1354 /* The interface remains unchanged, only the speed,
1355 * duplex or pause settings have changed. Call the
1356 * old mac_config() method to configure the MAC/PCS
1357 * only if we do not have a legacy MAC driver.
1358 */
1359 phylink_mac_config(pl, &link_state);
1360 }
1361 }
1362
1363 if (link_state.link != cur_link_state) {
1364 pl->old_link_state = link_state.link;
1365 if (!link_state.link)
1366 phylink_link_down(pl);
1367 else
1368 phylink_link_up(pl, link_state);
1369 }
1370 if (!link_state.link && retrigger) {
1371 pl->mac_link_dropped = false;
1372 queue_work(system_power_efficient_wq, &pl->resolve);
1373 }
1374 mutex_unlock(&pl->state_mutex);
1375 }
1376
phylink_run_resolve(struct phylink * pl)1377 static void phylink_run_resolve(struct phylink *pl)
1378 {
1379 if (!pl->phylink_disable_state)
1380 queue_work(system_power_efficient_wq, &pl->resolve);
1381 }
1382
phylink_run_resolve_and_disable(struct phylink * pl,int bit)1383 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1384 {
1385 unsigned long state = pl->phylink_disable_state;
1386
1387 set_bit(bit, &pl->phylink_disable_state);
1388 if (state == 0) {
1389 queue_work(system_power_efficient_wq, &pl->resolve);
1390 flush_work(&pl->resolve);
1391 }
1392 }
1393
phylink_enable_and_run_resolve(struct phylink * pl,int bit)1394 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1395 {
1396 clear_bit(bit, &pl->phylink_disable_state);
1397 phylink_run_resolve(pl);
1398 }
1399
phylink_fixed_poll(struct timer_list * t)1400 static void phylink_fixed_poll(struct timer_list *t)
1401 {
1402 struct phylink *pl = container_of(t, struct phylink, link_poll);
1403
1404 mod_timer(t, jiffies + HZ);
1405
1406 phylink_run_resolve(pl);
1407 }
1408
1409 static const struct sfp_upstream_ops sfp_phylink_ops;
1410
phylink_register_sfp(struct phylink * pl,struct fwnode_handle * fwnode)1411 static int phylink_register_sfp(struct phylink *pl,
1412 struct fwnode_handle *fwnode)
1413 {
1414 struct sfp_bus *bus;
1415 int ret;
1416
1417 if (!fwnode)
1418 return 0;
1419
1420 bus = sfp_bus_find_fwnode(fwnode);
1421 if (IS_ERR(bus)) {
1422 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1423 return PTR_ERR(bus);
1424 }
1425
1426 pl->sfp_bus = bus;
1427
1428 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1429 sfp_bus_put(bus);
1430
1431 return ret;
1432 }
1433
1434 /**
1435 * phylink_create() - create a phylink instance
1436 * @config: a pointer to the target &struct phylink_config
1437 * @fwnode: a pointer to a &struct fwnode_handle describing the network
1438 * interface
1439 * @iface: the desired link mode defined by &typedef phy_interface_t
1440 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1441 *
1442 * Create a new phylink instance, and parse the link parameters found in @np.
1443 * This will parse in-band modes, fixed-link or SFP configuration.
1444 *
1445 * Note: the rtnl lock must not be held when calling this function.
1446 *
1447 * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1448 * must use IS_ERR() to check for errors from this function.
1449 */
phylink_create(struct phylink_config * config,struct fwnode_handle * fwnode,phy_interface_t iface,const struct phylink_mac_ops * mac_ops)1450 struct phylink *phylink_create(struct phylink_config *config,
1451 struct fwnode_handle *fwnode,
1452 phy_interface_t iface,
1453 const struct phylink_mac_ops *mac_ops)
1454 {
1455 bool using_mac_select_pcs = false;
1456 struct phylink *pl;
1457 int ret;
1458
1459 if (mac_ops->mac_select_pcs &&
1460 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1461 ERR_PTR(-EOPNOTSUPP))
1462 using_mac_select_pcs = true;
1463
1464 /* Validate the supplied configuration */
1465 if (using_mac_select_pcs &&
1466 phy_interface_empty(config->supported_interfaces)) {
1467 dev_err(config->dev,
1468 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n");
1469 return ERR_PTR(-EINVAL);
1470 }
1471
1472 pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1473 if (!pl)
1474 return ERR_PTR(-ENOMEM);
1475
1476 mutex_init(&pl->state_mutex);
1477 INIT_WORK(&pl->resolve, phylink_resolve);
1478
1479 pl->config = config;
1480 if (config->type == PHYLINK_NETDEV) {
1481 pl->netdev = to_net_dev(config->dev);
1482 netif_carrier_off(pl->netdev);
1483 } else if (config->type == PHYLINK_DEV) {
1484 pl->dev = config->dev;
1485 } else {
1486 kfree(pl);
1487 return ERR_PTR(-EINVAL);
1488 }
1489
1490 pl->using_mac_select_pcs = using_mac_select_pcs;
1491 pl->phy_state.interface = iface;
1492 pl->link_interface = iface;
1493 if (iface == PHY_INTERFACE_MODE_MOCA)
1494 pl->link_port = PORT_BNC;
1495 else
1496 pl->link_port = PORT_MII;
1497 pl->link_config.interface = iface;
1498 pl->link_config.pause = MLO_PAUSE_AN;
1499 pl->link_config.speed = SPEED_UNKNOWN;
1500 pl->link_config.duplex = DUPLEX_UNKNOWN;
1501 pl->link_config.an_enabled = true;
1502 pl->mac_ops = mac_ops;
1503 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1504 timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1505
1506 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1507 linkmode_copy(pl->link_config.advertising, pl->supported);
1508 phylink_validate(pl, pl->supported, &pl->link_config);
1509
1510 ret = phylink_parse_mode(pl, fwnode);
1511 if (ret < 0) {
1512 kfree(pl);
1513 return ERR_PTR(ret);
1514 }
1515
1516 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1517 ret = phylink_parse_fixedlink(pl, fwnode);
1518 if (ret < 0) {
1519 kfree(pl);
1520 return ERR_PTR(ret);
1521 }
1522 }
1523
1524 pl->cur_link_an_mode = pl->cfg_link_an_mode;
1525
1526 ret = phylink_register_sfp(pl, fwnode);
1527 if (ret < 0) {
1528 kfree(pl);
1529 return ERR_PTR(ret);
1530 }
1531
1532 return pl;
1533 }
1534 EXPORT_SYMBOL_GPL(phylink_create);
1535
1536 /**
1537 * phylink_destroy() - cleanup and destroy the phylink instance
1538 * @pl: a pointer to a &struct phylink returned from phylink_create()
1539 *
1540 * Destroy a phylink instance. Any PHY that has been attached must have been
1541 * cleaned up via phylink_disconnect_phy() prior to calling this function.
1542 *
1543 * Note: the rtnl lock must not be held when calling this function.
1544 */
phylink_destroy(struct phylink * pl)1545 void phylink_destroy(struct phylink *pl)
1546 {
1547 sfp_bus_del_upstream(pl->sfp_bus);
1548 if (pl->link_gpio)
1549 gpiod_put(pl->link_gpio);
1550
1551 cancel_work_sync(&pl->resolve);
1552 kfree(pl);
1553 }
1554 EXPORT_SYMBOL_GPL(phylink_destroy);
1555
1556 /**
1557 * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1558 * @pl: a pointer to a &struct phylink returned from phylink_create()
1559 *
1560 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1561 * no PHY is needed.
1562 *
1563 * Returns true if phylink will be expecting a PHY.
1564 */
phylink_expects_phy(struct phylink * pl)1565 bool phylink_expects_phy(struct phylink *pl)
1566 {
1567 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1568 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1569 phy_interface_mode_is_8023z(pl->link_config.interface)))
1570 return false;
1571 return true;
1572 }
1573 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1574
phylink_phy_change(struct phy_device * phydev,bool up)1575 static void phylink_phy_change(struct phy_device *phydev, bool up)
1576 {
1577 struct phylink *pl = phydev->phylink;
1578 bool tx_pause, rx_pause;
1579
1580 phy_get_pause(phydev, &tx_pause, &rx_pause);
1581
1582 mutex_lock(&pl->state_mutex);
1583 pl->phy_state.speed = phydev->speed;
1584 pl->phy_state.duplex = phydev->duplex;
1585 pl->phy_state.rate_matching = phydev->rate_matching;
1586 pl->phy_state.pause = MLO_PAUSE_NONE;
1587 if (tx_pause)
1588 pl->phy_state.pause |= MLO_PAUSE_TX;
1589 if (rx_pause)
1590 pl->phy_state.pause |= MLO_PAUSE_RX;
1591 pl->phy_state.interface = phydev->interface;
1592 pl->phy_state.link = up;
1593 mutex_unlock(&pl->state_mutex);
1594
1595 phylink_run_resolve(pl);
1596
1597 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1598 phy_modes(phydev->interface),
1599 phy_speed_to_str(phydev->speed),
1600 phy_duplex_to_str(phydev->duplex),
1601 phy_rate_matching_to_str(phydev->rate_matching),
1602 phylink_pause_to_str(pl->phy_state.pause));
1603 }
1604
phylink_bringup_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1605 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1606 phy_interface_t interface)
1607 {
1608 struct phylink_link_state config;
1609 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1610 char *irq_str;
1611 int ret;
1612
1613 /*
1614 * This is the new way of dealing with flow control for PHYs,
1615 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1616 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1617 * using our validate call to the MAC, we rely upon the MAC
1618 * clearing the bits from both supported and advertising fields.
1619 */
1620 phy_support_asym_pause(phy);
1621
1622 memset(&config, 0, sizeof(config));
1623 linkmode_copy(supported, phy->supported);
1624 linkmode_copy(config.advertising, phy->advertising);
1625
1626 /* Check whether we would use rate matching for the proposed interface
1627 * mode.
1628 */
1629 config.rate_matching = phy_get_rate_matching(phy, interface);
1630
1631 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1632 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1633 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1634 * their Serdes is either unnecessary or not reasonable.
1635 *
1636 * For these which switch interface modes, we really need to know which
1637 * interface modes the PHY supports to properly work out which ethtool
1638 * linkmodes can be supported. For now, as a work-around, we validate
1639 * against all interface modes, which may lead to more ethtool link
1640 * modes being advertised than are actually supported.
1641 */
1642 if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
1643 interface != PHY_INTERFACE_MODE_RXAUI &&
1644 interface != PHY_INTERFACE_MODE_XAUI &&
1645 interface != PHY_INTERFACE_MODE_USXGMII)
1646 config.interface = PHY_INTERFACE_MODE_NA;
1647 else
1648 config.interface = interface;
1649
1650 ret = phylink_validate(pl, supported, &config);
1651 if (ret) {
1652 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1653 phy_modes(config.interface),
1654 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1655 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1656 ERR_PTR(ret));
1657 return ret;
1658 }
1659
1660 phy->phylink = pl;
1661 phy->phy_link_change = phylink_phy_change;
1662
1663 irq_str = phy_attached_info_irq(phy);
1664 phylink_info(pl,
1665 "PHY [%s] driver [%s] (irq=%s)\n",
1666 dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1667 kfree(irq_str);
1668
1669 mutex_lock(&phy->lock);
1670 mutex_lock(&pl->state_mutex);
1671 pl->phydev = phy;
1672 pl->phy_state.interface = interface;
1673 pl->phy_state.pause = MLO_PAUSE_NONE;
1674 pl->phy_state.speed = SPEED_UNKNOWN;
1675 pl->phy_state.duplex = DUPLEX_UNKNOWN;
1676 pl->phy_state.rate_matching = RATE_MATCH_NONE;
1677 linkmode_copy(pl->supported, supported);
1678 linkmode_copy(pl->link_config.advertising, config.advertising);
1679
1680 /* Restrict the phy advertisement according to the MAC support. */
1681 linkmode_copy(phy->advertising, config.advertising);
1682 mutex_unlock(&pl->state_mutex);
1683 mutex_unlock(&phy->lock);
1684
1685 phylink_dbg(pl,
1686 "phy: %s setting supported %*pb advertising %*pb\n",
1687 phy_modes(interface),
1688 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1689 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1690
1691 if (phy_interrupt_is_valid(phy))
1692 phy_request_interrupt(phy);
1693
1694 if (pl->config->mac_managed_pm)
1695 phy->mac_managed_pm = true;
1696
1697 return 0;
1698 }
1699
phylink_attach_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1700 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1701 phy_interface_t interface)
1702 {
1703 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1704 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1705 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
1706 return -EINVAL;
1707
1708 if (pl->phydev)
1709 return -EBUSY;
1710
1711 return phy_attach_direct(pl->netdev, phy, 0, interface);
1712 }
1713
1714 /**
1715 * phylink_connect_phy() - connect a PHY to the phylink instance
1716 * @pl: a pointer to a &struct phylink returned from phylink_create()
1717 * @phy: a pointer to a &struct phy_device.
1718 *
1719 * Connect @phy to the phylink instance specified by @pl by calling
1720 * phy_attach_direct(). Configure the @phy according to the MAC driver's
1721 * capabilities, start the PHYLIB state machine and enable any interrupts
1722 * that the PHY supports.
1723 *
1724 * This updates the phylink's ethtool supported and advertising link mode
1725 * masks.
1726 *
1727 * Returns 0 on success or a negative errno.
1728 */
phylink_connect_phy(struct phylink * pl,struct phy_device * phy)1729 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1730 {
1731 int ret;
1732
1733 /* Use PHY device/driver interface */
1734 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1735 pl->link_interface = phy->interface;
1736 pl->link_config.interface = pl->link_interface;
1737 }
1738
1739 ret = phylink_attach_phy(pl, phy, pl->link_interface);
1740 if (ret < 0)
1741 return ret;
1742
1743 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1744 if (ret)
1745 phy_detach(phy);
1746
1747 return ret;
1748 }
1749 EXPORT_SYMBOL_GPL(phylink_connect_phy);
1750
1751 /**
1752 * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1753 * @pl: a pointer to a &struct phylink returned from phylink_create()
1754 * @dn: a pointer to a &struct device_node.
1755 * @flags: PHY-specific flags to communicate to the PHY device driver
1756 *
1757 * Connect the phy specified in the device node @dn to the phylink instance
1758 * specified by @pl. Actions specified in phylink_connect_phy() will be
1759 * performed.
1760 *
1761 * Returns 0 on success or a negative errno.
1762 */
phylink_of_phy_connect(struct phylink * pl,struct device_node * dn,u32 flags)1763 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1764 u32 flags)
1765 {
1766 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
1767 }
1768 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1769
1770 /**
1771 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
1772 * @pl: a pointer to a &struct phylink returned from phylink_create()
1773 * @fwnode: a pointer to a &struct fwnode_handle.
1774 * @flags: PHY-specific flags to communicate to the PHY device driver
1775 *
1776 * Connect the phy specified @fwnode to the phylink instance specified
1777 * by @pl.
1778 *
1779 * Returns 0 on success or a negative errno.
1780 */
phylink_fwnode_phy_connect(struct phylink * pl,struct fwnode_handle * fwnode,u32 flags)1781 int phylink_fwnode_phy_connect(struct phylink *pl,
1782 struct fwnode_handle *fwnode,
1783 u32 flags)
1784 {
1785 struct fwnode_handle *phy_fwnode;
1786 struct phy_device *phy_dev;
1787 int ret;
1788
1789 /* Fixed links and 802.3z are handled without needing a PHY */
1790 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1791 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1792 phy_interface_mode_is_8023z(pl->link_interface)))
1793 return 0;
1794
1795 phy_fwnode = fwnode_get_phy_node(fwnode);
1796 if (IS_ERR(phy_fwnode)) {
1797 if (pl->cfg_link_an_mode == MLO_AN_PHY)
1798 return -ENODEV;
1799 return 0;
1800 }
1801
1802 phy_dev = fwnode_phy_find_device(phy_fwnode);
1803 /* We're done with the phy_node handle */
1804 fwnode_handle_put(phy_fwnode);
1805 if (!phy_dev)
1806 return -ENODEV;
1807
1808 /* Use PHY device/driver interface */
1809 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1810 pl->link_interface = phy_dev->interface;
1811 pl->link_config.interface = pl->link_interface;
1812 }
1813
1814 ret = phy_attach_direct(pl->netdev, phy_dev, flags,
1815 pl->link_interface);
1816 phy_device_free(phy_dev);
1817 if (ret)
1818 return ret;
1819
1820 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
1821 if (ret)
1822 phy_detach(phy_dev);
1823
1824 return ret;
1825 }
1826 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
1827
1828 /**
1829 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
1830 * instance.
1831 * @pl: a pointer to a &struct phylink returned from phylink_create()
1832 *
1833 * Disconnect any current PHY from the phylink instance described by @pl.
1834 */
phylink_disconnect_phy(struct phylink * pl)1835 void phylink_disconnect_phy(struct phylink *pl)
1836 {
1837 struct phy_device *phy;
1838
1839 ASSERT_RTNL();
1840
1841 phy = pl->phydev;
1842 if (phy) {
1843 mutex_lock(&phy->lock);
1844 mutex_lock(&pl->state_mutex);
1845 pl->phydev = NULL;
1846 mutex_unlock(&pl->state_mutex);
1847 mutex_unlock(&phy->lock);
1848 flush_work(&pl->resolve);
1849
1850 phy_disconnect(phy);
1851 }
1852 }
1853 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
1854
1855 /**
1856 * phylink_mac_change() - notify phylink of a change in MAC state
1857 * @pl: a pointer to a &struct phylink returned from phylink_create()
1858 * @up: indicates whether the link is currently up.
1859 *
1860 * The MAC driver should call this driver when the state of its link
1861 * changes (eg, link failure, new negotiation results, etc.)
1862 */
phylink_mac_change(struct phylink * pl,bool up)1863 void phylink_mac_change(struct phylink *pl, bool up)
1864 {
1865 if (!up)
1866 pl->mac_link_dropped = true;
1867 phylink_run_resolve(pl);
1868 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down");
1869 }
1870 EXPORT_SYMBOL_GPL(phylink_mac_change);
1871
phylink_link_handler(int irq,void * data)1872 static irqreturn_t phylink_link_handler(int irq, void *data)
1873 {
1874 struct phylink *pl = data;
1875
1876 phylink_run_resolve(pl);
1877
1878 return IRQ_HANDLED;
1879 }
1880
1881 /**
1882 * phylink_start() - start a phylink instance
1883 * @pl: a pointer to a &struct phylink returned from phylink_create()
1884 *
1885 * Start the phylink instance specified by @pl, configuring the MAC for the
1886 * desired link mode(s) and negotiation style. This should be called from the
1887 * network device driver's &struct net_device_ops ndo_open() method.
1888 */
phylink_start(struct phylink * pl)1889 void phylink_start(struct phylink *pl)
1890 {
1891 bool poll = false;
1892
1893 ASSERT_RTNL();
1894
1895 phylink_info(pl, "configuring for %s/%s link mode\n",
1896 phylink_an_mode_str(pl->cur_link_an_mode),
1897 phy_modes(pl->link_config.interface));
1898
1899 /* Always set the carrier off */
1900 if (pl->netdev)
1901 netif_carrier_off(pl->netdev);
1902
1903 /* Apply the link configuration to the MAC when starting. This allows
1904 * a fixed-link to start with the correct parameters, and also
1905 * ensures that we set the appropriate advertisement for Serdes links.
1906 *
1907 * Restart autonegotiation if using 802.3z to ensure that the link
1908 * parameters are properly negotiated. This is necessary for DSA
1909 * switches using 802.3z negotiation to ensure they see our modes.
1910 */
1911 phylink_mac_initial_config(pl, true);
1912
1913 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
1914
1915 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
1916 int irq = gpiod_to_irq(pl->link_gpio);
1917
1918 if (irq > 0) {
1919 if (!request_irq(irq, phylink_link_handler,
1920 IRQF_TRIGGER_RISING |
1921 IRQF_TRIGGER_FALLING,
1922 "netdev link", pl))
1923 pl->link_irq = irq;
1924 else
1925 irq = 0;
1926 }
1927 if (irq <= 0)
1928 poll = true;
1929 }
1930
1931 switch (pl->cfg_link_an_mode) {
1932 case MLO_AN_FIXED:
1933 poll |= pl->config->poll_fixed_state;
1934 break;
1935 case MLO_AN_INBAND:
1936 if (pl->pcs)
1937 poll |= pl->pcs->poll;
1938 break;
1939 }
1940 if (poll)
1941 mod_timer(&pl->link_poll, jiffies + HZ);
1942 if (pl->phydev)
1943 phy_start(pl->phydev);
1944 if (pl->sfp_bus)
1945 sfp_upstream_start(pl->sfp_bus);
1946 }
1947 EXPORT_SYMBOL_GPL(phylink_start);
1948
1949 /**
1950 * phylink_stop() - stop a phylink instance
1951 * @pl: a pointer to a &struct phylink returned from phylink_create()
1952 *
1953 * Stop the phylink instance specified by @pl. This should be called from the
1954 * network device driver's &struct net_device_ops ndo_stop() method. The
1955 * network device's carrier state should not be changed prior to calling this
1956 * function.
1957 *
1958 * This will synchronously bring down the link if the link is not already
1959 * down (in other words, it will trigger a mac_link_down() method call.)
1960 */
phylink_stop(struct phylink * pl)1961 void phylink_stop(struct phylink *pl)
1962 {
1963 ASSERT_RTNL();
1964
1965 if (pl->sfp_bus)
1966 sfp_upstream_stop(pl->sfp_bus);
1967 if (pl->phydev)
1968 phy_stop(pl->phydev);
1969 del_timer_sync(&pl->link_poll);
1970 if (pl->link_irq) {
1971 free_irq(pl->link_irq, pl);
1972 pl->link_irq = 0;
1973 }
1974
1975 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
1976 }
1977 EXPORT_SYMBOL_GPL(phylink_stop);
1978
1979 /**
1980 * phylink_suspend() - handle a network device suspend event
1981 * @pl: a pointer to a &struct phylink returned from phylink_create()
1982 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
1983 *
1984 * Handle a network device suspend event. There are several cases:
1985 *
1986 * - If Wake-on-Lan is not active, we can bring down the link between
1987 * the MAC and PHY by calling phylink_stop().
1988 * - If Wake-on-Lan is active, and being handled only by the PHY, we
1989 * can also bring down the link between the MAC and PHY.
1990 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
1991 * still needs to receive packets, so we can not bring the link down.
1992 */
phylink_suspend(struct phylink * pl,bool mac_wol)1993 void phylink_suspend(struct phylink *pl, bool mac_wol)
1994 {
1995 ASSERT_RTNL();
1996
1997 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
1998 /* Wake-on-Lan enabled, MAC handling */
1999 mutex_lock(&pl->state_mutex);
2000
2001 /* Stop the resolver bringing the link up */
2002 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2003
2004 /* Disable the carrier, to prevent transmit timeouts,
2005 * but one would hope all packets have been sent. This
2006 * also means phylink_resolve() will do nothing.
2007 */
2008 if (pl->netdev)
2009 netif_carrier_off(pl->netdev);
2010 else
2011 pl->old_link_state = false;
2012
2013 /* We do not call mac_link_down() here as we want the
2014 * link to remain up to receive the WoL packets.
2015 */
2016 mutex_unlock(&pl->state_mutex);
2017 } else {
2018 phylink_stop(pl);
2019 }
2020 }
2021 EXPORT_SYMBOL_GPL(phylink_suspend);
2022
2023 /**
2024 * phylink_resume() - handle a network device resume event
2025 * @pl: a pointer to a &struct phylink returned from phylink_create()
2026 *
2027 * Undo the effects of phylink_suspend(), returning the link to an
2028 * operational state.
2029 */
phylink_resume(struct phylink * pl)2030 void phylink_resume(struct phylink *pl)
2031 {
2032 ASSERT_RTNL();
2033
2034 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2035 /* Wake-on-Lan enabled, MAC handling */
2036
2037 /* Call mac_link_down() so we keep the overall state balanced.
2038 * Do this under the state_mutex lock for consistency. This
2039 * will cause a "Link Down" message to be printed during
2040 * resume, which is harmless - the true link state will be
2041 * printed when we run a resolve.
2042 */
2043 mutex_lock(&pl->state_mutex);
2044 phylink_link_down(pl);
2045 mutex_unlock(&pl->state_mutex);
2046
2047 /* Re-apply the link parameters so that all the settings get
2048 * restored to the MAC.
2049 */
2050 phylink_mac_initial_config(pl, true);
2051
2052 /* Re-enable and re-resolve the link parameters */
2053 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2054 } else {
2055 phylink_start(pl);
2056 }
2057 }
2058 EXPORT_SYMBOL_GPL(phylink_resume);
2059
2060 /**
2061 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2062 * @pl: a pointer to a &struct phylink returned from phylink_create()
2063 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2064 *
2065 * Read the wake on lan parameters from the PHY attached to the phylink
2066 * instance specified by @pl. If no PHY is currently attached, report no
2067 * support for wake on lan.
2068 */
phylink_ethtool_get_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2069 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2070 {
2071 ASSERT_RTNL();
2072
2073 wol->supported = 0;
2074 wol->wolopts = 0;
2075
2076 if (pl->phydev)
2077 phy_ethtool_get_wol(pl->phydev, wol);
2078 }
2079 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2080
2081 /**
2082 * phylink_ethtool_set_wol() - set wake on lan parameters
2083 * @pl: a pointer to a &struct phylink returned from phylink_create()
2084 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2085 *
2086 * Set the wake on lan parameters for the PHY attached to the phylink
2087 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2088 * error.
2089 *
2090 * Returns zero on success or negative errno code.
2091 */
phylink_ethtool_set_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2092 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2093 {
2094 int ret = -EOPNOTSUPP;
2095
2096 ASSERT_RTNL();
2097
2098 if (pl->phydev)
2099 ret = phy_ethtool_set_wol(pl->phydev, wol);
2100
2101 return ret;
2102 }
2103 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2104
phylink_merge_link_mode(unsigned long * dst,const unsigned long * b)2105 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2106 {
2107 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2108
2109 linkmode_zero(mask);
2110 phylink_set_port_modes(mask);
2111
2112 linkmode_and(dst, dst, mask);
2113 linkmode_or(dst, dst, b);
2114 }
2115
phylink_get_ksettings(const struct phylink_link_state * state,struct ethtool_link_ksettings * kset)2116 static void phylink_get_ksettings(const struct phylink_link_state *state,
2117 struct ethtool_link_ksettings *kset)
2118 {
2119 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2120 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2121 if (kset->base.rate_matching == RATE_MATCH_NONE) {
2122 kset->base.speed = state->speed;
2123 kset->base.duplex = state->duplex;
2124 }
2125 kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE :
2126 AUTONEG_DISABLE;
2127 }
2128
2129 /**
2130 * phylink_ethtool_ksettings_get() - get the current link settings
2131 * @pl: a pointer to a &struct phylink returned from phylink_create()
2132 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2133 *
2134 * Read the current link settings for the phylink instance specified by @pl.
2135 * This will be the link settings read from the MAC, PHY or fixed link
2136 * settings depending on the current negotiation mode.
2137 */
phylink_ethtool_ksettings_get(struct phylink * pl,struct ethtool_link_ksettings * kset)2138 int phylink_ethtool_ksettings_get(struct phylink *pl,
2139 struct ethtool_link_ksettings *kset)
2140 {
2141 struct phylink_link_state link_state;
2142
2143 ASSERT_RTNL();
2144
2145 if (pl->phydev)
2146 phy_ethtool_ksettings_get(pl->phydev, kset);
2147 else
2148 kset->base.port = pl->link_port;
2149
2150 linkmode_copy(kset->link_modes.supported, pl->supported);
2151
2152 switch (pl->cur_link_an_mode) {
2153 case MLO_AN_FIXED:
2154 /* We are using fixed settings. Report these as the
2155 * current link settings - and note that these also
2156 * represent the supported speeds/duplex/pause modes.
2157 */
2158 phylink_get_fixed_state(pl, &link_state);
2159 phylink_get_ksettings(&link_state, kset);
2160 break;
2161
2162 case MLO_AN_INBAND:
2163 /* If there is a phy attached, then use the reported
2164 * settings from the phy with no modification.
2165 */
2166 if (pl->phydev)
2167 break;
2168
2169 phylink_mac_pcs_get_state(pl, &link_state);
2170
2171 /* The MAC is reporting the link results from its own PCS
2172 * layer via in-band status. Report these as the current
2173 * link settings.
2174 */
2175 phylink_get_ksettings(&link_state, kset);
2176 break;
2177 }
2178
2179 return 0;
2180 }
2181 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2182
2183 /**
2184 * phylink_ethtool_ksettings_set() - set the link settings
2185 * @pl: a pointer to a &struct phylink returned from phylink_create()
2186 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2187 */
phylink_ethtool_ksettings_set(struct phylink * pl,const struct ethtool_link_ksettings * kset)2188 int phylink_ethtool_ksettings_set(struct phylink *pl,
2189 const struct ethtool_link_ksettings *kset)
2190 {
2191 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2192 struct phylink_link_state config;
2193 const struct phy_setting *s;
2194
2195 ASSERT_RTNL();
2196
2197 if (pl->phydev) {
2198 /* We can rely on phylib for this update; we also do not need
2199 * to update the pl->link_config settings:
2200 * - the configuration returned via ksettings_get() will come
2201 * from phylib whenever a PHY is present.
2202 * - link_config.interface will be updated by the PHY calling
2203 * back via phylink_phy_change() and a subsequent resolve.
2204 * - initial link configuration for PHY mode comes from the
2205 * last phy state updated via phylink_phy_change().
2206 * - other configuration changes (e.g. pause modes) are
2207 * performed directly via phylib.
2208 * - if in in-band mode with a PHY, the link configuration
2209 * is passed on the link from the PHY, and all of
2210 * link_config.{speed,duplex,an_enabled,pause} are not used.
2211 * - the only possible use would be link_config.advertising
2212 * pause modes when in 1000base-X mode with a PHY, but in
2213 * the presence of a PHY, this should not be changed as that
2214 * should be determined from the media side advertisement.
2215 */
2216 return phy_ethtool_ksettings_set(pl->phydev, kset);
2217 }
2218
2219 config = pl->link_config;
2220
2221 /* Mask out unsupported advertisements */
2222 linkmode_and(config.advertising, kset->link_modes.advertising,
2223 pl->supported);
2224
2225 /* FIXME: should we reject autoneg if phy/mac does not support it? */
2226 switch (kset->base.autoneg) {
2227 case AUTONEG_DISABLE:
2228 /* Autonegotiation disabled, select a suitable speed and
2229 * duplex.
2230 */
2231 s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2232 pl->supported, false);
2233 if (!s)
2234 return -EINVAL;
2235
2236 /* If we have a fixed link, refuse to change link parameters.
2237 * If the link parameters match, accept them but do nothing.
2238 */
2239 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2240 if (s->speed != pl->link_config.speed ||
2241 s->duplex != pl->link_config.duplex)
2242 return -EINVAL;
2243 return 0;
2244 }
2245
2246 config.speed = s->speed;
2247 config.duplex = s->duplex;
2248 break;
2249
2250 case AUTONEG_ENABLE:
2251 /* If we have a fixed link, allow autonegotiation (since that
2252 * is our default case) but do not allow the advertisement to
2253 * be changed. If the advertisement matches, simply return.
2254 */
2255 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2256 if (!linkmode_equal(config.advertising,
2257 pl->link_config.advertising))
2258 return -EINVAL;
2259 return 0;
2260 }
2261
2262 config.speed = SPEED_UNKNOWN;
2263 config.duplex = DUPLEX_UNKNOWN;
2264 break;
2265
2266 default:
2267 return -EINVAL;
2268 }
2269
2270 /* We have ruled out the case with a PHY attached, and the
2271 * fixed-link cases. All that is left are in-band links.
2272 */
2273 config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE;
2274 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2275 config.an_enabled);
2276
2277 /* If this link is with an SFP, ensure that changes to advertised modes
2278 * also cause the associated interface to be selected such that the
2279 * link can be configured correctly.
2280 */
2281 if (pl->sfp_bus) {
2282 config.interface = sfp_select_interface(pl->sfp_bus,
2283 config.advertising);
2284 if (config.interface == PHY_INTERFACE_MODE_NA) {
2285 phylink_err(pl,
2286 "selection of interface failed, advertisement %*pb\n",
2287 __ETHTOOL_LINK_MODE_MASK_NBITS,
2288 config.advertising);
2289 return -EINVAL;
2290 }
2291
2292 /* Revalidate with the selected interface */
2293 linkmode_copy(support, pl->supported);
2294 if (phylink_validate(pl, support, &config)) {
2295 phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2296 phylink_an_mode_str(pl->cur_link_an_mode),
2297 phy_modes(config.interface),
2298 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2299 return -EINVAL;
2300 }
2301 } else {
2302 /* Validate without changing the current supported mask. */
2303 linkmode_copy(support, pl->supported);
2304 if (phylink_validate(pl, support, &config))
2305 return -EINVAL;
2306 }
2307
2308 /* If autonegotiation is enabled, we must have an advertisement */
2309 if (config.an_enabled && phylink_is_empty_linkmode(config.advertising))
2310 return -EINVAL;
2311
2312 mutex_lock(&pl->state_mutex);
2313 pl->link_config.speed = config.speed;
2314 pl->link_config.duplex = config.duplex;
2315 pl->link_config.an_enabled = config.an_enabled;
2316
2317 if (pl->link_config.interface != config.interface) {
2318 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2319 /* We need to force the link down, then change the interface */
2320 if (pl->old_link_state) {
2321 phylink_link_down(pl);
2322 pl->old_link_state = false;
2323 }
2324 if (!test_bit(PHYLINK_DISABLE_STOPPED,
2325 &pl->phylink_disable_state))
2326 phylink_major_config(pl, false, &config);
2327 pl->link_config.interface = config.interface;
2328 linkmode_copy(pl->link_config.advertising, config.advertising);
2329 } else if (!linkmode_equal(pl->link_config.advertising,
2330 config.advertising)) {
2331 linkmode_copy(pl->link_config.advertising, config.advertising);
2332 phylink_change_inband_advert(pl);
2333 }
2334 mutex_unlock(&pl->state_mutex);
2335
2336 return 0;
2337 }
2338 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2339
2340 /**
2341 * phylink_ethtool_nway_reset() - restart negotiation
2342 * @pl: a pointer to a &struct phylink returned from phylink_create()
2343 *
2344 * Restart negotiation for the phylink instance specified by @pl. This will
2345 * cause any attached phy to restart negotiation with the link partner, and
2346 * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2347 * negotiation.
2348 *
2349 * Returns zero on success, or negative error code.
2350 */
phylink_ethtool_nway_reset(struct phylink * pl)2351 int phylink_ethtool_nway_reset(struct phylink *pl)
2352 {
2353 int ret = 0;
2354
2355 ASSERT_RTNL();
2356
2357 if (pl->phydev)
2358 ret = phy_restart_aneg(pl->phydev);
2359 phylink_mac_pcs_an_restart(pl);
2360
2361 return ret;
2362 }
2363 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2364
2365 /**
2366 * phylink_ethtool_get_pauseparam() - get the current pause parameters
2367 * @pl: a pointer to a &struct phylink returned from phylink_create()
2368 * @pause: a pointer to a &struct ethtool_pauseparam
2369 */
phylink_ethtool_get_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2370 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2371 struct ethtool_pauseparam *pause)
2372 {
2373 ASSERT_RTNL();
2374
2375 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2376 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2377 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2378 }
2379 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2380
2381 /**
2382 * phylink_ethtool_set_pauseparam() - set the current pause parameters
2383 * @pl: a pointer to a &struct phylink returned from phylink_create()
2384 * @pause: a pointer to a &struct ethtool_pauseparam
2385 */
phylink_ethtool_set_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2386 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2387 struct ethtool_pauseparam *pause)
2388 {
2389 struct phylink_link_state *config = &pl->link_config;
2390 bool manual_changed;
2391 int pause_state;
2392
2393 ASSERT_RTNL();
2394
2395 if (pl->cur_link_an_mode == MLO_AN_FIXED)
2396 return -EOPNOTSUPP;
2397
2398 if (!phylink_test(pl->supported, Pause) &&
2399 !phylink_test(pl->supported, Asym_Pause))
2400 return -EOPNOTSUPP;
2401
2402 if (!phylink_test(pl->supported, Asym_Pause) &&
2403 pause->rx_pause != pause->tx_pause)
2404 return -EINVAL;
2405
2406 pause_state = 0;
2407 if (pause->autoneg)
2408 pause_state |= MLO_PAUSE_AN;
2409 if (pause->rx_pause)
2410 pause_state |= MLO_PAUSE_RX;
2411 if (pause->tx_pause)
2412 pause_state |= MLO_PAUSE_TX;
2413
2414 mutex_lock(&pl->state_mutex);
2415 /*
2416 * See the comments for linkmode_set_pause(), wrt the deficiencies
2417 * with the current implementation. A solution to this issue would
2418 * be:
2419 * ethtool Local device
2420 * rx tx Pause AsymDir
2421 * 0 0 0 0
2422 * 1 0 1 1
2423 * 0 1 0 1
2424 * 1 1 1 1
2425 * and then use the ethtool rx/tx enablement status to mask the
2426 * rx/tx pause resolution.
2427 */
2428 linkmode_set_pause(config->advertising, pause->tx_pause,
2429 pause->rx_pause);
2430
2431 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2432 (!(pause_state & MLO_PAUSE_AN) &&
2433 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2434
2435 config->pause = pause_state;
2436
2437 /* Update our in-band advertisement, triggering a renegotiation if
2438 * the advertisement changed.
2439 */
2440 if (!pl->phydev)
2441 phylink_change_inband_advert(pl);
2442
2443 mutex_unlock(&pl->state_mutex);
2444
2445 /* If we have a PHY, a change of the pause frame advertisement will
2446 * cause phylib to renegotiate (if AN is enabled) which will in turn
2447 * call our phylink_phy_change() and trigger a resolve. Note that
2448 * we can't hold our state mutex while calling phy_set_asym_pause().
2449 */
2450 if (pl->phydev)
2451 phy_set_asym_pause(pl->phydev, pause->rx_pause,
2452 pause->tx_pause);
2453
2454 /* If the manual pause settings changed, make sure we trigger a
2455 * resolve to update their state; we can not guarantee that the
2456 * link will cycle.
2457 */
2458 if (manual_changed) {
2459 pl->mac_link_dropped = true;
2460 phylink_run_resolve(pl);
2461 }
2462
2463 return 0;
2464 }
2465 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2466
2467 /**
2468 * phylink_get_eee_err() - read the energy efficient ethernet error
2469 * counter
2470 * @pl: a pointer to a &struct phylink returned from phylink_create().
2471 *
2472 * Read the Energy Efficient Ethernet error counter from the PHY associated
2473 * with the phylink instance specified by @pl.
2474 *
2475 * Returns positive error counter value, or negative error code.
2476 */
phylink_get_eee_err(struct phylink * pl)2477 int phylink_get_eee_err(struct phylink *pl)
2478 {
2479 int ret = 0;
2480
2481 ASSERT_RTNL();
2482
2483 if (pl->phydev)
2484 ret = phy_get_eee_err(pl->phydev);
2485
2486 return ret;
2487 }
2488 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2489
2490 /**
2491 * phylink_init_eee() - init and check the EEE features
2492 * @pl: a pointer to a &struct phylink returned from phylink_create()
2493 * @clk_stop_enable: allow PHY to stop receive clock
2494 *
2495 * Must be called either with RTNL held or within mac_link_up()
2496 */
phylink_init_eee(struct phylink * pl,bool clk_stop_enable)2497 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2498 {
2499 int ret = -EOPNOTSUPP;
2500
2501 if (pl->phydev)
2502 ret = phy_init_eee(pl->phydev, clk_stop_enable);
2503
2504 return ret;
2505 }
2506 EXPORT_SYMBOL_GPL(phylink_init_eee);
2507
2508 /**
2509 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2510 * @pl: a pointer to a &struct phylink returned from phylink_create()
2511 * @eee: a pointer to a &struct ethtool_eee for the read parameters
2512 */
phylink_ethtool_get_eee(struct phylink * pl,struct ethtool_eee * eee)2513 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
2514 {
2515 int ret = -EOPNOTSUPP;
2516
2517 ASSERT_RTNL();
2518
2519 if (pl->phydev)
2520 ret = phy_ethtool_get_eee(pl->phydev, eee);
2521
2522 return ret;
2523 }
2524 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2525
2526 /**
2527 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2528 * @pl: a pointer to a &struct phylink returned from phylink_create()
2529 * @eee: a pointer to a &struct ethtool_eee for the desired parameters
2530 */
phylink_ethtool_set_eee(struct phylink * pl,struct ethtool_eee * eee)2531 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
2532 {
2533 int ret = -EOPNOTSUPP;
2534
2535 ASSERT_RTNL();
2536
2537 if (pl->phydev)
2538 ret = phy_ethtool_set_eee(pl->phydev, eee);
2539
2540 return ret;
2541 }
2542 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2543
2544 /* This emulates MII registers for a fixed-mode phy operating as per the
2545 * passed in state. "aneg" defines if we report negotiation is possible.
2546 *
2547 * FIXME: should deal with negotiation state too.
2548 */
phylink_mii_emul_read(unsigned int reg,struct phylink_link_state * state)2549 static int phylink_mii_emul_read(unsigned int reg,
2550 struct phylink_link_state *state)
2551 {
2552 struct fixed_phy_status fs;
2553 unsigned long *lpa = state->lp_advertising;
2554 int val;
2555
2556 fs.link = state->link;
2557 fs.speed = state->speed;
2558 fs.duplex = state->duplex;
2559 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2560 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2561
2562 val = swphy_read_reg(reg, &fs);
2563 if (reg == MII_BMSR) {
2564 if (!state->an_complete)
2565 val &= ~BMSR_ANEGCOMPLETE;
2566 }
2567 return val;
2568 }
2569
phylink_phy_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2570 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2571 unsigned int reg)
2572 {
2573 struct phy_device *phydev = pl->phydev;
2574 int prtad, devad;
2575
2576 if (mdio_phy_id_is_c45(phy_id)) {
2577 prtad = mdio_phy_id_prtad(phy_id);
2578 devad = mdio_phy_id_devad(phy_id);
2579 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2580 reg);
2581 }
2582
2583 if (phydev->is_c45) {
2584 switch (reg) {
2585 case MII_BMCR:
2586 case MII_BMSR:
2587 case MII_PHYSID1:
2588 case MII_PHYSID2:
2589 devad = __ffs(phydev->c45_ids.mmds_present);
2590 break;
2591 case MII_ADVERTISE:
2592 case MII_LPA:
2593 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2594 return -EINVAL;
2595 devad = MDIO_MMD_AN;
2596 if (reg == MII_ADVERTISE)
2597 reg = MDIO_AN_ADVERTISE;
2598 else
2599 reg = MDIO_AN_LPA;
2600 break;
2601 default:
2602 return -EINVAL;
2603 }
2604 prtad = phy_id;
2605 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2606 reg);
2607 }
2608
2609 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2610 }
2611
phylink_phy_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)2612 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2613 unsigned int reg, unsigned int val)
2614 {
2615 struct phy_device *phydev = pl->phydev;
2616 int prtad, devad;
2617
2618 if (mdio_phy_id_is_c45(phy_id)) {
2619 prtad = mdio_phy_id_prtad(phy_id);
2620 devad = mdio_phy_id_devad(phy_id);
2621 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2622 reg, val);
2623 }
2624
2625 if (phydev->is_c45) {
2626 switch (reg) {
2627 case MII_BMCR:
2628 case MII_BMSR:
2629 case MII_PHYSID1:
2630 case MII_PHYSID2:
2631 devad = __ffs(phydev->c45_ids.mmds_present);
2632 break;
2633 case MII_ADVERTISE:
2634 case MII_LPA:
2635 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2636 return -EINVAL;
2637 devad = MDIO_MMD_AN;
2638 if (reg == MII_ADVERTISE)
2639 reg = MDIO_AN_ADVERTISE;
2640 else
2641 reg = MDIO_AN_LPA;
2642 break;
2643 default:
2644 return -EINVAL;
2645 }
2646 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2647 reg, val);
2648 }
2649
2650 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2651 }
2652
phylink_mii_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2653 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2654 unsigned int reg)
2655 {
2656 struct phylink_link_state state;
2657 int val = 0xffff;
2658
2659 switch (pl->cur_link_an_mode) {
2660 case MLO_AN_FIXED:
2661 if (phy_id == 0) {
2662 phylink_get_fixed_state(pl, &state);
2663 val = phylink_mii_emul_read(reg, &state);
2664 }
2665 break;
2666
2667 case MLO_AN_PHY:
2668 return -EOPNOTSUPP;
2669
2670 case MLO_AN_INBAND:
2671 if (phy_id == 0) {
2672 phylink_mac_pcs_get_state(pl, &state);
2673 val = phylink_mii_emul_read(reg, &state);
2674 }
2675 break;
2676 }
2677
2678 return val & 0xffff;
2679 }
2680
phylink_mii_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)2681 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
2682 unsigned int reg, unsigned int val)
2683 {
2684 switch (pl->cur_link_an_mode) {
2685 case MLO_AN_FIXED:
2686 break;
2687
2688 case MLO_AN_PHY:
2689 return -EOPNOTSUPP;
2690
2691 case MLO_AN_INBAND:
2692 break;
2693 }
2694
2695 return 0;
2696 }
2697
2698 /**
2699 * phylink_mii_ioctl() - generic mii ioctl interface
2700 * @pl: a pointer to a &struct phylink returned from phylink_create()
2701 * @ifr: a pointer to a &struct ifreq for socket ioctls
2702 * @cmd: ioctl cmd to execute
2703 *
2704 * Perform the specified MII ioctl on the PHY attached to the phylink instance
2705 * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
2706 *
2707 * Returns: zero on success or negative error code.
2708 *
2709 * %SIOCGMIIPHY:
2710 * read register from the current PHY.
2711 * %SIOCGMIIREG:
2712 * read register from the specified PHY.
2713 * %SIOCSMIIREG:
2714 * set a register on the specified PHY.
2715 */
phylink_mii_ioctl(struct phylink * pl,struct ifreq * ifr,int cmd)2716 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
2717 {
2718 struct mii_ioctl_data *mii = if_mii(ifr);
2719 int ret;
2720
2721 ASSERT_RTNL();
2722
2723 if (pl->phydev) {
2724 /* PHYs only exist for MLO_AN_PHY and SGMII */
2725 switch (cmd) {
2726 case SIOCGMIIPHY:
2727 mii->phy_id = pl->phydev->mdio.addr;
2728 fallthrough;
2729
2730 case SIOCGMIIREG:
2731 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
2732 if (ret >= 0) {
2733 mii->val_out = ret;
2734 ret = 0;
2735 }
2736 break;
2737
2738 case SIOCSMIIREG:
2739 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
2740 mii->val_in);
2741 break;
2742
2743 default:
2744 ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
2745 break;
2746 }
2747 } else {
2748 switch (cmd) {
2749 case SIOCGMIIPHY:
2750 mii->phy_id = 0;
2751 fallthrough;
2752
2753 case SIOCGMIIREG:
2754 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
2755 if (ret >= 0) {
2756 mii->val_out = ret;
2757 ret = 0;
2758 }
2759 break;
2760
2761 case SIOCSMIIREG:
2762 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
2763 mii->val_in);
2764 break;
2765
2766 default:
2767 ret = -EOPNOTSUPP;
2768 break;
2769 }
2770 }
2771
2772 return ret;
2773 }
2774 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
2775
2776 /**
2777 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
2778 * link partners
2779 * @pl: a pointer to a &struct phylink returned from phylink_create()
2780 * @sync: perform action synchronously
2781 *
2782 * If we have a PHY that is not part of a SFP module, then set the speed
2783 * as described in the phy_speed_down() function. Please see this function
2784 * for a description of the @sync parameter.
2785 *
2786 * Returns zero if there is no PHY, otherwise as per phy_speed_down().
2787 */
phylink_speed_down(struct phylink * pl,bool sync)2788 int phylink_speed_down(struct phylink *pl, bool sync)
2789 {
2790 int ret = 0;
2791
2792 ASSERT_RTNL();
2793
2794 if (!pl->sfp_bus && pl->phydev)
2795 ret = phy_speed_down(pl->phydev, sync);
2796
2797 return ret;
2798 }
2799 EXPORT_SYMBOL_GPL(phylink_speed_down);
2800
2801 /**
2802 * phylink_speed_up() - restore the advertised speeds prior to the call to
2803 * phylink_speed_down()
2804 * @pl: a pointer to a &struct phylink returned from phylink_create()
2805 *
2806 * If we have a PHY that is not part of a SFP module, then restore the
2807 * PHY speeds as per phy_speed_up().
2808 *
2809 * Returns zero if there is no PHY, otherwise as per phy_speed_up().
2810 */
phylink_speed_up(struct phylink * pl)2811 int phylink_speed_up(struct phylink *pl)
2812 {
2813 int ret = 0;
2814
2815 ASSERT_RTNL();
2816
2817 if (!pl->sfp_bus && pl->phydev)
2818 ret = phy_speed_up(pl->phydev);
2819
2820 return ret;
2821 }
2822 EXPORT_SYMBOL_GPL(phylink_speed_up);
2823
phylink_sfp_attach(void * upstream,struct sfp_bus * bus)2824 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
2825 {
2826 struct phylink *pl = upstream;
2827
2828 pl->netdev->sfp_bus = bus;
2829 }
2830
phylink_sfp_detach(void * upstream,struct sfp_bus * bus)2831 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
2832 {
2833 struct phylink *pl = upstream;
2834
2835 pl->netdev->sfp_bus = NULL;
2836 }
2837
2838 static const phy_interface_t phylink_sfp_interface_preference[] = {
2839 PHY_INTERFACE_MODE_25GBASER,
2840 PHY_INTERFACE_MODE_USXGMII,
2841 PHY_INTERFACE_MODE_10GBASER,
2842 PHY_INTERFACE_MODE_5GBASER,
2843 PHY_INTERFACE_MODE_2500BASEX,
2844 PHY_INTERFACE_MODE_SGMII,
2845 PHY_INTERFACE_MODE_1000BASEX,
2846 PHY_INTERFACE_MODE_100BASEX,
2847 };
2848
2849 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
2850
phylink_choose_sfp_interface(struct phylink * pl,const unsigned long * intf)2851 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
2852 const unsigned long *intf)
2853 {
2854 phy_interface_t interface;
2855 size_t i;
2856
2857 interface = PHY_INTERFACE_MODE_NA;
2858 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
2859 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
2860 interface = phylink_sfp_interface_preference[i];
2861 break;
2862 }
2863
2864 return interface;
2865 }
2866
phylink_sfp_set_config(struct phylink * pl,u8 mode,unsigned long * supported,struct phylink_link_state * state)2867 static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
2868 unsigned long *supported,
2869 struct phylink_link_state *state)
2870 {
2871 bool changed = false;
2872
2873 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
2874 phylink_an_mode_str(mode), phy_modes(state->interface),
2875 __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
2876
2877 if (!linkmode_equal(pl->supported, supported)) {
2878 linkmode_copy(pl->supported, supported);
2879 changed = true;
2880 }
2881
2882 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
2883 linkmode_copy(pl->link_config.advertising, state->advertising);
2884 changed = true;
2885 }
2886
2887 if (pl->cur_link_an_mode != mode ||
2888 pl->link_config.interface != state->interface) {
2889 pl->cur_link_an_mode = mode;
2890 pl->link_config.interface = state->interface;
2891
2892 changed = true;
2893
2894 phylink_info(pl, "switched to %s/%s link mode\n",
2895 phylink_an_mode_str(mode),
2896 phy_modes(state->interface));
2897 }
2898
2899 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
2900 &pl->phylink_disable_state))
2901 phylink_mac_initial_config(pl, false);
2902 }
2903
phylink_sfp_config_phy(struct phylink * pl,u8 mode,struct phy_device * phy)2904 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
2905 struct phy_device *phy)
2906 {
2907 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
2908 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2909 struct phylink_link_state config;
2910 phy_interface_t iface;
2911 int ret;
2912
2913 linkmode_copy(support, phy->supported);
2914
2915 memset(&config, 0, sizeof(config));
2916 linkmode_copy(config.advertising, phy->advertising);
2917 config.interface = PHY_INTERFACE_MODE_NA;
2918 config.speed = SPEED_UNKNOWN;
2919 config.duplex = DUPLEX_UNKNOWN;
2920 config.pause = MLO_PAUSE_AN;
2921 config.an_enabled = pl->link_config.an_enabled;
2922
2923 /* Ignore errors if we're expecting a PHY to attach later */
2924 ret = phylink_validate(pl, support, &config);
2925 if (ret) {
2926 phylink_err(pl, "validation with support %*pb failed: %pe\n",
2927 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
2928 ERR_PTR(ret));
2929 return ret;
2930 }
2931
2932 iface = sfp_select_interface(pl->sfp_bus, config.advertising);
2933 if (iface == PHY_INTERFACE_MODE_NA) {
2934 phylink_err(pl,
2935 "selection of interface failed, advertisement %*pb\n",
2936 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
2937 return -EINVAL;
2938 }
2939
2940 config.interface = iface;
2941 linkmode_copy(support1, support);
2942 ret = phylink_validate(pl, support1, &config);
2943 if (ret) {
2944 phylink_err(pl,
2945 "validation of %s/%s with support %*pb failed: %pe\n",
2946 phylink_an_mode_str(mode),
2947 phy_modes(config.interface),
2948 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
2949 ERR_PTR(ret));
2950 return ret;
2951 }
2952
2953 pl->link_port = pl->sfp_port;
2954
2955 phylink_sfp_set_config(pl, mode, support, &config);
2956
2957 return 0;
2958 }
2959
phylink_sfp_config_optical(struct phylink * pl)2960 static int phylink_sfp_config_optical(struct phylink *pl)
2961 {
2962 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2963 DECLARE_PHY_INTERFACE_MASK(interfaces);
2964 struct phylink_link_state config;
2965 phy_interface_t interface;
2966 int ret;
2967
2968 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
2969 (int)PHY_INTERFACE_MODE_MAX,
2970 pl->config->supported_interfaces,
2971 (int)PHY_INTERFACE_MODE_MAX,
2972 pl->sfp_interfaces);
2973
2974 /* Find the union of the supported interfaces by the PCS/MAC and
2975 * the SFP module.
2976 */
2977 phy_interface_and(interfaces, pl->config->supported_interfaces,
2978 pl->sfp_interfaces);
2979 if (phy_interface_empty(interfaces)) {
2980 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
2981 return -EINVAL;
2982 }
2983
2984 memset(&config, 0, sizeof(config));
2985 linkmode_copy(support, pl->sfp_support);
2986 linkmode_copy(config.advertising, pl->sfp_support);
2987 config.speed = SPEED_UNKNOWN;
2988 config.duplex = DUPLEX_UNKNOWN;
2989 config.pause = MLO_PAUSE_AN;
2990 config.an_enabled = true;
2991
2992 /* For all the interfaces that are supported, reduce the sfp_support
2993 * mask to only those link modes that can be supported.
2994 */
2995 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces);
2996 if (ret) {
2997 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
2998 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2999 return ret;
3000 }
3001
3002 interface = phylink_choose_sfp_interface(pl, interfaces);
3003 if (interface == PHY_INTERFACE_MODE_NA) {
3004 phylink_err(pl, "failed to select SFP interface\n");
3005 return -EINVAL;
3006 }
3007
3008 phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3009 phy_modes(interface));
3010
3011 config.interface = interface;
3012
3013 /* Ignore errors if we're expecting a PHY to attach later */
3014 ret = phylink_validate(pl, support, &config);
3015 if (ret) {
3016 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3017 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3018 ERR_PTR(ret));
3019 return ret;
3020 }
3021
3022 pl->link_port = pl->sfp_port;
3023
3024 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3025
3026 return 0;
3027 }
3028
phylink_sfp_module_insert(void * upstream,const struct sfp_eeprom_id * id)3029 static int phylink_sfp_module_insert(void *upstream,
3030 const struct sfp_eeprom_id *id)
3031 {
3032 struct phylink *pl = upstream;
3033
3034 ASSERT_RTNL();
3035
3036 linkmode_zero(pl->sfp_support);
3037 phy_interface_zero(pl->sfp_interfaces);
3038 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3039 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3040
3041 /* If this module may have a PHY connecting later, defer until later */
3042 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3043 if (pl->sfp_may_have_phy)
3044 return 0;
3045
3046 return phylink_sfp_config_optical(pl);
3047 }
3048
phylink_sfp_module_start(void * upstream)3049 static int phylink_sfp_module_start(void *upstream)
3050 {
3051 struct phylink *pl = upstream;
3052
3053 /* If this SFP module has a PHY, start the PHY now. */
3054 if (pl->phydev) {
3055 phy_start(pl->phydev);
3056 return 0;
3057 }
3058
3059 /* If the module may have a PHY but we didn't detect one we
3060 * need to configure the MAC here.
3061 */
3062 if (!pl->sfp_may_have_phy)
3063 return 0;
3064
3065 return phylink_sfp_config_optical(pl);
3066 }
3067
phylink_sfp_module_stop(void * upstream)3068 static void phylink_sfp_module_stop(void *upstream)
3069 {
3070 struct phylink *pl = upstream;
3071
3072 /* If this SFP module has a PHY, stop it. */
3073 if (pl->phydev)
3074 phy_stop(pl->phydev);
3075 }
3076
phylink_sfp_link_down(void * upstream)3077 static void phylink_sfp_link_down(void *upstream)
3078 {
3079 struct phylink *pl = upstream;
3080
3081 ASSERT_RTNL();
3082
3083 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3084 }
3085
phylink_sfp_link_up(void * upstream)3086 static void phylink_sfp_link_up(void *upstream)
3087 {
3088 struct phylink *pl = upstream;
3089
3090 ASSERT_RTNL();
3091
3092 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3093 }
3094
3095 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3096 * or 802.3z control word, so inband will not work.
3097 */
phylink_phy_no_inband(struct phy_device * phy)3098 static bool phylink_phy_no_inband(struct phy_device *phy)
3099 {
3100 return phy->is_c45 &&
3101 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150;
3102 }
3103
phylink_sfp_connect_phy(void * upstream,struct phy_device * phy)3104 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3105 {
3106 struct phylink *pl = upstream;
3107 phy_interface_t interface;
3108 u8 mode;
3109 int ret;
3110
3111 /*
3112 * This is the new way of dealing with flow control for PHYs,
3113 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3114 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3115 * using our validate call to the MAC, we rely upon the MAC
3116 * clearing the bits from both supported and advertising fields.
3117 */
3118 phy_support_asym_pause(phy);
3119
3120 if (phylink_phy_no_inband(phy))
3121 mode = MLO_AN_PHY;
3122 else
3123 mode = MLO_AN_INBAND;
3124
3125 /* Set the PHY's host supported interfaces */
3126 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3127 pl->config->supported_interfaces);
3128
3129 /* Do the initial configuration */
3130 ret = phylink_sfp_config_phy(pl, mode, phy);
3131 if (ret < 0)
3132 return ret;
3133
3134 interface = pl->link_config.interface;
3135 ret = phylink_attach_phy(pl, phy, interface);
3136 if (ret < 0)
3137 return ret;
3138
3139 ret = phylink_bringup_phy(pl, phy, interface);
3140 if (ret)
3141 phy_detach(phy);
3142
3143 return ret;
3144 }
3145
phylink_sfp_disconnect_phy(void * upstream)3146 static void phylink_sfp_disconnect_phy(void *upstream)
3147 {
3148 phylink_disconnect_phy(upstream);
3149 }
3150
3151 static const struct sfp_upstream_ops sfp_phylink_ops = {
3152 .attach = phylink_sfp_attach,
3153 .detach = phylink_sfp_detach,
3154 .module_insert = phylink_sfp_module_insert,
3155 .module_start = phylink_sfp_module_start,
3156 .module_stop = phylink_sfp_module_stop,
3157 .link_up = phylink_sfp_link_up,
3158 .link_down = phylink_sfp_link_down,
3159 .connect_phy = phylink_sfp_connect_phy,
3160 .disconnect_phy = phylink_sfp_disconnect_phy,
3161 };
3162
3163 /* Helpers for MAC drivers */
3164
phylink_decode_c37_word(struct phylink_link_state * state,uint16_t config_reg,int speed)3165 static void phylink_decode_c37_word(struct phylink_link_state *state,
3166 uint16_t config_reg, int speed)
3167 {
3168 bool tx_pause, rx_pause;
3169 int fd_bit;
3170
3171 if (speed == SPEED_2500)
3172 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3173 else
3174 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3175
3176 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3177
3178 if (linkmode_test_bit(fd_bit, state->advertising) &&
3179 linkmode_test_bit(fd_bit, state->lp_advertising)) {
3180 state->speed = speed;
3181 state->duplex = DUPLEX_FULL;
3182 } else {
3183 /* negotiation failure */
3184 state->link = false;
3185 }
3186
3187 linkmode_resolve_pause(state->advertising, state->lp_advertising,
3188 &tx_pause, &rx_pause);
3189
3190 if (tx_pause)
3191 state->pause |= MLO_PAUSE_TX;
3192 if (rx_pause)
3193 state->pause |= MLO_PAUSE_RX;
3194 }
3195
phylink_decode_sgmii_word(struct phylink_link_state * state,uint16_t config_reg)3196 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3197 uint16_t config_reg)
3198 {
3199 if (!(config_reg & LPA_SGMII_LINK)) {
3200 state->link = false;
3201 return;
3202 }
3203
3204 switch (config_reg & LPA_SGMII_SPD_MASK) {
3205 case LPA_SGMII_10:
3206 state->speed = SPEED_10;
3207 break;
3208 case LPA_SGMII_100:
3209 state->speed = SPEED_100;
3210 break;
3211 case LPA_SGMII_1000:
3212 state->speed = SPEED_1000;
3213 break;
3214 default:
3215 state->link = false;
3216 return;
3217 }
3218 if (config_reg & LPA_SGMII_FULL_DUPLEX)
3219 state->duplex = DUPLEX_FULL;
3220 else
3221 state->duplex = DUPLEX_HALF;
3222 }
3223
3224 /**
3225 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3226 * @state: a pointer to a struct phylink_link_state.
3227 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3228 *
3229 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3230 * code word. Decode the USXGMII code word and populate the corresponding fields
3231 * (speed, duplex) into the phylink_link_state structure.
3232 */
phylink_decode_usxgmii_word(struct phylink_link_state * state,uint16_t lpa)3233 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3234 uint16_t lpa)
3235 {
3236 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3237 case MDIO_USXGMII_10:
3238 state->speed = SPEED_10;
3239 break;
3240 case MDIO_USXGMII_100:
3241 state->speed = SPEED_100;
3242 break;
3243 case MDIO_USXGMII_1000:
3244 state->speed = SPEED_1000;
3245 break;
3246 case MDIO_USXGMII_2500:
3247 state->speed = SPEED_2500;
3248 break;
3249 case MDIO_USXGMII_5000:
3250 state->speed = SPEED_5000;
3251 break;
3252 case MDIO_USXGMII_10G:
3253 state->speed = SPEED_10000;
3254 break;
3255 default:
3256 state->link = false;
3257 return;
3258 }
3259
3260 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3261 state->duplex = DUPLEX_FULL;
3262 else
3263 state->duplex = DUPLEX_HALF;
3264 }
3265 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3266
3267 /**
3268 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3269 * @state: a pointer to a struct phylink_link_state.
3270 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3271 *
3272 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3273 * code word. Decode the USGMII code word and populate the corresponding fields
3274 * (speed, duplex) into the phylink_link_state structure. The structure for this
3275 * word is the same as the USXGMII word, except it only supports speeds up to
3276 * 1Gbps.
3277 */
phylink_decode_usgmii_word(struct phylink_link_state * state,uint16_t lpa)3278 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3279 uint16_t lpa)
3280 {
3281 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3282 case MDIO_USXGMII_10:
3283 state->speed = SPEED_10;
3284 break;
3285 case MDIO_USXGMII_100:
3286 state->speed = SPEED_100;
3287 break;
3288 case MDIO_USXGMII_1000:
3289 state->speed = SPEED_1000;
3290 break;
3291 default:
3292 state->link = false;
3293 return;
3294 }
3295
3296 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3297 state->duplex = DUPLEX_FULL;
3298 else
3299 state->duplex = DUPLEX_HALF;
3300 }
3301
3302 /**
3303 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3304 * @state: a pointer to a &struct phylink_link_state.
3305 * @bmsr: The value of the %MII_BMSR register
3306 * @lpa: The value of the %MII_LPA register
3307 *
3308 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3309 * clause 37 negotiation and/or SGMII control.
3310 *
3311 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3312 * the phylink @state structure. This is suitable to be used for implementing
3313 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if
3314 * accessing @bmsr and @lpa cannot be done with MDIO directly.
3315 */
phylink_mii_c22_pcs_decode_state(struct phylink_link_state * state,u16 bmsr,u16 lpa)3316 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3317 u16 bmsr, u16 lpa)
3318 {
3319 state->link = !!(bmsr & BMSR_LSTATUS);
3320 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3321 /* If there is no link or autonegotiation is disabled, the LP advertisement
3322 * data is not meaningful, so don't go any further.
3323 */
3324 if (!state->link || !state->an_enabled)
3325 return;
3326
3327 switch (state->interface) {
3328 case PHY_INTERFACE_MODE_1000BASEX:
3329 phylink_decode_c37_word(state, lpa, SPEED_1000);
3330 break;
3331
3332 case PHY_INTERFACE_MODE_2500BASEX:
3333 phylink_decode_c37_word(state, lpa, SPEED_2500);
3334 break;
3335
3336 case PHY_INTERFACE_MODE_SGMII:
3337 case PHY_INTERFACE_MODE_QSGMII:
3338 phylink_decode_sgmii_word(state, lpa);
3339 break;
3340 case PHY_INTERFACE_MODE_QUSGMII:
3341 phylink_decode_usgmii_word(state, lpa);
3342 break;
3343
3344 default:
3345 state->link = false;
3346 break;
3347 }
3348 }
3349 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3350
3351 /**
3352 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3353 * @pcs: a pointer to a &struct mdio_device.
3354 * @state: a pointer to a &struct phylink_link_state.
3355 *
3356 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3357 * clause 37 negotiation and/or SGMII control.
3358 *
3359 * Read the MAC PCS state from the MII device configured in @config and
3360 * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3361 * the phylink @state structure. This is suitable to be directly plugged
3362 * into the mac_pcs_get_state() member of the struct phylink_mac_ops
3363 * structure.
3364 */
phylink_mii_c22_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3365 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3366 struct phylink_link_state *state)
3367 {
3368 int bmsr, lpa;
3369
3370 bmsr = mdiodev_read(pcs, MII_BMSR);
3371 lpa = mdiodev_read(pcs, MII_LPA);
3372 if (bmsr < 0 || lpa < 0) {
3373 state->link = false;
3374 return;
3375 }
3376
3377 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3378 }
3379 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3380
3381 /**
3382 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3383 * advertisement
3384 * @interface: the PHY interface mode being configured
3385 * @advertising: the ethtool advertisement mask
3386 *
3387 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3388 * clause 37 negotiation and/or SGMII control.
3389 *
3390 * Encode the clause 37 PCS advertisement as specified by @interface and
3391 * @advertising.
3392 *
3393 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3394 */
phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,const unsigned long * advertising)3395 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3396 const unsigned long *advertising)
3397 {
3398 u16 adv;
3399
3400 switch (interface) {
3401 case PHY_INTERFACE_MODE_1000BASEX:
3402 case PHY_INTERFACE_MODE_2500BASEX:
3403 adv = ADVERTISE_1000XFULL;
3404 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3405 advertising))
3406 adv |= ADVERTISE_1000XPAUSE;
3407 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3408 advertising))
3409 adv |= ADVERTISE_1000XPSE_ASYM;
3410 return adv;
3411 case PHY_INTERFACE_MODE_SGMII:
3412 case PHY_INTERFACE_MODE_QSGMII:
3413 return 0x0001;
3414 default:
3415 /* Nothing to do for other modes */
3416 return -EINVAL;
3417 }
3418 }
3419 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3420
3421 /**
3422 * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3423 * @pcs: a pointer to a &struct mdio_device.
3424 * @mode: link autonegotiation mode
3425 * @interface: the PHY interface mode being configured
3426 * @advertising: the ethtool advertisement mask
3427 *
3428 * Configure a Clause 22 PCS PHY with the appropriate negotiation
3429 * parameters for the @mode, @interface and @advertising parameters.
3430 * Returns negative error number on failure, zero if the advertisement
3431 * has not changed, or positive if there is a change.
3432 */
phylink_mii_c22_pcs_config(struct mdio_device * pcs,unsigned int mode,phy_interface_t interface,const unsigned long * advertising)3433 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode,
3434 phy_interface_t interface,
3435 const unsigned long *advertising)
3436 {
3437 bool changed = 0;
3438 u16 bmcr;
3439 int ret, adv;
3440
3441 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3442 if (adv >= 0) {
3443 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3444 MII_ADVERTISE, 0xffff, adv);
3445 if (ret < 0)
3446 return ret;
3447 changed = ret;
3448 }
3449
3450 /* Ensure ISOLATE bit is disabled */
3451 if (mode == MLO_AN_INBAND &&
3452 (interface == PHY_INTERFACE_MODE_SGMII ||
3453 interface == PHY_INTERFACE_MODE_QSGMII ||
3454 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising)))
3455 bmcr = BMCR_ANENABLE;
3456 else
3457 bmcr = 0;
3458
3459 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3460 if (ret < 0)
3461 return ret;
3462
3463 return changed;
3464 }
3465 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3466
3467 /**
3468 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3469 * @pcs: a pointer to a &struct mdio_device.
3470 *
3471 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3472 * clause 37 negotiation.
3473 *
3474 * Restart the clause 37 negotiation with the link partner. This is
3475 * suitable to be directly plugged into the mac_pcs_get_state() member
3476 * of the struct phylink_mac_ops structure.
3477 */
phylink_mii_c22_pcs_an_restart(struct mdio_device * pcs)3478 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3479 {
3480 int val = mdiodev_read(pcs, MII_BMCR);
3481
3482 if (val >= 0) {
3483 val |= BMCR_ANRESTART;
3484
3485 mdiodev_write(pcs, MII_BMCR, val);
3486 }
3487 }
3488 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3489
phylink_mii_c45_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3490 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3491 struct phylink_link_state *state)
3492 {
3493 struct mii_bus *bus = pcs->bus;
3494 int addr = pcs->addr;
3495 int stat;
3496
3497 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3498 if (stat < 0) {
3499 state->link = false;
3500 return;
3501 }
3502
3503 state->link = !!(stat & MDIO_STAT1_LSTATUS);
3504 if (!state->link)
3505 return;
3506
3507 switch (state->interface) {
3508 case PHY_INTERFACE_MODE_10GBASER:
3509 state->speed = SPEED_10000;
3510 state->duplex = DUPLEX_FULL;
3511 break;
3512
3513 default:
3514 break;
3515 }
3516 }
3517 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3518
phylink_init(void)3519 static int __init phylink_init(void)
3520 {
3521 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3522 __set_bit(phylink_sfp_interface_preference[i],
3523 phylink_sfp_interfaces);
3524
3525 return 0;
3526 }
3527
3528 module_init(phylink_init);
3529
3530 MODULE_LICENSE("GPL v2");
3531