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Searched defs:pll_ref_div (Results 1 – 6 of 6) sorted by relevance

/drivers/clk/tegra/
Dclk-tegra20.c577 u32 pll_ref_div = osc_ctrl & OSC_CTRL_PLL_REF_DIV_MASK; in tegra20_clk_measure_input_freq() local
609 u32 pll_ref_div = readl_relaxed(clk_base + OSC_CTRL) & in tegra20_get_pll_ref_div() local
860 unsigned int pll_ref_div; in tegra20_osc_clk_init() local
Dclk-tegra-fixed.c32 u32 val, pll_ref_div; in tegra_osc_clk_init() local
/drivers/gpu/drm/radeon/
Dradeon_legacy_crtc.c748 uint32_t pll_ref_div = 0; in radeon_set_pll() local
/drivers/video/fbdev/aty/
Datyfb_base.c1806 u8 pll_ref_div; member
2476 u8 pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); in aty_init() local
Datyfb.h83 u8 pll_ref_div; member
/drivers/video/fbdev/
Dw100fb.h661 u32 pll_ref_div : 4; member