1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
3 */
4
5 #include <linux/devcoredump.h>
6
7 #include "main.h"
8 #include "regd.h"
9 #include "fw.h"
10 #include "ps.h"
11 #include "sec.h"
12 #include "mac.h"
13 #include "coex.h"
14 #include "phy.h"
15 #include "reg.h"
16 #include "efuse.h"
17 #include "tx.h"
18 #include "debug.h"
19 #include "bf.h"
20 #include "sar.h"
21
22 bool rtw_disable_lps_deep_mode;
23 EXPORT_SYMBOL(rtw_disable_lps_deep_mode);
24 bool rtw_bf_support = true;
25 unsigned int rtw_debug_mask;
26 EXPORT_SYMBOL(rtw_debug_mask);
27 /* EDCCA is enabled during normal behavior. For debugging purpose in
28 * a noisy environment, it can be disabled via edcca debugfs. Because
29 * all rtw88 devices will probably be affected if environment is noisy,
30 * rtw_edcca_enabled is just declared by driver instead of by device.
31 * So, turning it off will take effect for all rtw88 devices before
32 * there is a tough reason to maintain rtw_edcca_enabled by device.
33 */
34 bool rtw_edcca_enabled = true;
35
36 module_param_named(disable_lps_deep, rtw_disable_lps_deep_mode, bool, 0644);
37 module_param_named(support_bf, rtw_bf_support, bool, 0644);
38 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
39
40 MODULE_PARM_DESC(disable_lps_deep, "Set Y to disable Deep PS");
41 MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support");
42 MODULE_PARM_DESC(debug_mask, "Debugging mask");
43
44 static struct ieee80211_channel rtw_channeltable_2g[] = {
45 {.center_freq = 2412, .hw_value = 1,},
46 {.center_freq = 2417, .hw_value = 2,},
47 {.center_freq = 2422, .hw_value = 3,},
48 {.center_freq = 2427, .hw_value = 4,},
49 {.center_freq = 2432, .hw_value = 5,},
50 {.center_freq = 2437, .hw_value = 6,},
51 {.center_freq = 2442, .hw_value = 7,},
52 {.center_freq = 2447, .hw_value = 8,},
53 {.center_freq = 2452, .hw_value = 9,},
54 {.center_freq = 2457, .hw_value = 10,},
55 {.center_freq = 2462, .hw_value = 11,},
56 {.center_freq = 2467, .hw_value = 12,},
57 {.center_freq = 2472, .hw_value = 13,},
58 {.center_freq = 2484, .hw_value = 14,},
59 };
60
61 static struct ieee80211_channel rtw_channeltable_5g[] = {
62 {.center_freq = 5180, .hw_value = 36,},
63 {.center_freq = 5200, .hw_value = 40,},
64 {.center_freq = 5220, .hw_value = 44,},
65 {.center_freq = 5240, .hw_value = 48,},
66 {.center_freq = 5260, .hw_value = 52,},
67 {.center_freq = 5280, .hw_value = 56,},
68 {.center_freq = 5300, .hw_value = 60,},
69 {.center_freq = 5320, .hw_value = 64,},
70 {.center_freq = 5500, .hw_value = 100,},
71 {.center_freq = 5520, .hw_value = 104,},
72 {.center_freq = 5540, .hw_value = 108,},
73 {.center_freq = 5560, .hw_value = 112,},
74 {.center_freq = 5580, .hw_value = 116,},
75 {.center_freq = 5600, .hw_value = 120,},
76 {.center_freq = 5620, .hw_value = 124,},
77 {.center_freq = 5640, .hw_value = 128,},
78 {.center_freq = 5660, .hw_value = 132,},
79 {.center_freq = 5680, .hw_value = 136,},
80 {.center_freq = 5700, .hw_value = 140,},
81 {.center_freq = 5720, .hw_value = 144,},
82 {.center_freq = 5745, .hw_value = 149,},
83 {.center_freq = 5765, .hw_value = 153,},
84 {.center_freq = 5785, .hw_value = 157,},
85 {.center_freq = 5805, .hw_value = 161,},
86 {.center_freq = 5825, .hw_value = 165,
87 .flags = IEEE80211_CHAN_NO_HT40MINUS},
88 };
89
90 static struct ieee80211_rate rtw_ratetable[] = {
91 {.bitrate = 10, .hw_value = 0x00,},
92 {.bitrate = 20, .hw_value = 0x01,},
93 {.bitrate = 55, .hw_value = 0x02,},
94 {.bitrate = 110, .hw_value = 0x03,},
95 {.bitrate = 60, .hw_value = 0x04,},
96 {.bitrate = 90, .hw_value = 0x05,},
97 {.bitrate = 120, .hw_value = 0x06,},
98 {.bitrate = 180, .hw_value = 0x07,},
99 {.bitrate = 240, .hw_value = 0x08,},
100 {.bitrate = 360, .hw_value = 0x09,},
101 {.bitrate = 480, .hw_value = 0x0a,},
102 {.bitrate = 540, .hw_value = 0x0b,},
103 };
104
rtw_desc_to_bitrate(u8 desc_rate)105 u16 rtw_desc_to_bitrate(u8 desc_rate)
106 {
107 struct ieee80211_rate rate;
108
109 if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n"))
110 return 0;
111
112 rate = rtw_ratetable[desc_rate];
113
114 return rate.bitrate;
115 }
116
117 static struct ieee80211_supported_band rtw_band_2ghz = {
118 .band = NL80211_BAND_2GHZ,
119
120 .channels = rtw_channeltable_2g,
121 .n_channels = ARRAY_SIZE(rtw_channeltable_2g),
122
123 .bitrates = rtw_ratetable,
124 .n_bitrates = ARRAY_SIZE(rtw_ratetable),
125
126 .ht_cap = {0},
127 .vht_cap = {0},
128 };
129
130 static struct ieee80211_supported_band rtw_band_5ghz = {
131 .band = NL80211_BAND_5GHZ,
132
133 .channels = rtw_channeltable_5g,
134 .n_channels = ARRAY_SIZE(rtw_channeltable_5g),
135
136 /* 5G has no CCK rates */
137 .bitrates = rtw_ratetable + 4,
138 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
139
140 .ht_cap = {0},
141 .vht_cap = {0},
142 };
143
144 struct rtw_watch_dog_iter_data {
145 struct rtw_dev *rtwdev;
146 struct rtw_vif *rtwvif;
147 };
148
rtw_dynamic_csi_rate(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif)149 static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif)
150 {
151 struct rtw_bf_info *bf_info = &rtwdev->bf_info;
152 u8 fix_rate_enable = 0;
153 u8 new_csi_rate_idx;
154
155 if (rtwvif->bfee.role != RTW_BFEE_SU &&
156 rtwvif->bfee.role != RTW_BFEE_MU)
157 return;
158
159 rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi,
160 bf_info->cur_csi_rpt_rate,
161 fix_rate_enable, &new_csi_rate_idx);
162
163 if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate)
164 bf_info->cur_csi_rpt_rate = new_csi_rate_idx;
165 }
166
rtw_vif_watch_dog_iter(void * data,u8 * mac,struct ieee80211_vif * vif)167 static void rtw_vif_watch_dog_iter(void *data, u8 *mac,
168 struct ieee80211_vif *vif)
169 {
170 struct rtw_watch_dog_iter_data *iter_data = data;
171 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
172
173 if (vif->type == NL80211_IFTYPE_STATION)
174 if (vif->cfg.assoc)
175 iter_data->rtwvif = rtwvif;
176
177 rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif);
178
179 rtwvif->stats.tx_unicast = 0;
180 rtwvif->stats.rx_unicast = 0;
181 rtwvif->stats.tx_cnt = 0;
182 rtwvif->stats.rx_cnt = 0;
183 }
184
185 /* process TX/RX statistics periodically for hardware,
186 * the information helps hardware to enhance performance
187 */
rtw_watch_dog_work(struct work_struct * work)188 static void rtw_watch_dog_work(struct work_struct *work)
189 {
190 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
191 watch_dog_work.work);
192 struct rtw_traffic_stats *stats = &rtwdev->stats;
193 struct rtw_watch_dog_iter_data data = {};
194 bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
195 bool ps_active;
196
197 mutex_lock(&rtwdev->mutex);
198
199 if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags))
200 goto unlock;
201
202 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
203 RTW_WATCH_DOG_DELAY_TIME);
204
205 if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100)
206 set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
207 else
208 clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
209
210 rtw_coex_wl_status_check(rtwdev);
211 rtw_coex_query_bt_hid_list(rtwdev);
212
213 if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags))
214 rtw_coex_wl_status_change_notify(rtwdev, 0);
215
216 if (stats->tx_cnt > RTW_LPS_THRESHOLD ||
217 stats->rx_cnt > RTW_LPS_THRESHOLD)
218 ps_active = true;
219 else
220 ps_active = false;
221
222 ewma_tp_add(&stats->tx_ewma_tp,
223 (u32)(stats->tx_unicast >> RTW_TP_SHIFT));
224 ewma_tp_add(&stats->rx_ewma_tp,
225 (u32)(stats->rx_unicast >> RTW_TP_SHIFT));
226 stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
227 stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
228
229 /* reset tx/rx statictics */
230 stats->tx_unicast = 0;
231 stats->rx_unicast = 0;
232 stats->tx_cnt = 0;
233 stats->rx_cnt = 0;
234
235 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
236 goto unlock;
237
238 /* make sure BB/RF is working for dynamic mech */
239 rtw_leave_lps(rtwdev);
240
241 rtw_phy_dynamic_mechanism(rtwdev);
242
243 data.rtwdev = rtwdev;
244 /* use atomic version to avoid taking local->iflist_mtx mutex */
245 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data);
246
247 /* fw supports only one station associated to enter lps, if there are
248 * more than two stations associated to the AP, then we can not enter
249 * lps, because fw does not handle the overlapped beacon interval
250 *
251 * rtw_recalc_lps() iterate vifs and determine if driver can enter
252 * ps by vif->type and vif->cfg.ps, all we need to do here is to
253 * get that vif and check if device is having traffic more than the
254 * threshold.
255 */
256 if (rtwdev->ps_enabled && data.rtwvif && !ps_active &&
257 !rtwdev->beacon_loss)
258 rtw_enter_lps(rtwdev, data.rtwvif->port);
259
260 rtwdev->watch_dog_cnt++;
261
262 unlock:
263 mutex_unlock(&rtwdev->mutex);
264 }
265
rtw_c2h_work(struct work_struct * work)266 static void rtw_c2h_work(struct work_struct *work)
267 {
268 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
269 struct sk_buff *skb, *tmp;
270
271 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
272 skb_unlink(skb, &rtwdev->c2h_queue);
273 rtw_fw_c2h_cmd_handle(rtwdev, skb);
274 dev_kfree_skb_any(skb);
275 }
276 }
277
rtw_ips_work(struct work_struct * work)278 static void rtw_ips_work(struct work_struct *work)
279 {
280 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ips_work);
281
282 mutex_lock(&rtwdev->mutex);
283 if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)
284 rtw_enter_ips(rtwdev);
285 mutex_unlock(&rtwdev->mutex);
286 }
287
rtw_acquire_macid(struct rtw_dev * rtwdev)288 static u8 rtw_acquire_macid(struct rtw_dev *rtwdev)
289 {
290 unsigned long mac_id;
291
292 mac_id = find_first_zero_bit(rtwdev->mac_id_map, RTW_MAX_MAC_ID_NUM);
293 if (mac_id < RTW_MAX_MAC_ID_NUM)
294 set_bit(mac_id, rtwdev->mac_id_map);
295
296 return mac_id;
297 }
298
rtw_sta_rc_work(struct work_struct * work)299 static void rtw_sta_rc_work(struct work_struct *work)
300 {
301 struct rtw_sta_info *si = container_of(work, struct rtw_sta_info,
302 rc_work);
303 struct rtw_dev *rtwdev = si->rtwdev;
304
305 mutex_lock(&rtwdev->mutex);
306 rtw_update_sta_info(rtwdev, si, true);
307 mutex_unlock(&rtwdev->mutex);
308 }
309
rtw_sta_add(struct rtw_dev * rtwdev,struct ieee80211_sta * sta,struct ieee80211_vif * vif)310 int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
311 struct ieee80211_vif *vif)
312 {
313 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
314 int i;
315
316 si->mac_id = rtw_acquire_macid(rtwdev);
317 if (si->mac_id >= RTW_MAX_MAC_ID_NUM)
318 return -ENOSPC;
319
320 si->rtwdev = rtwdev;
321 si->sta = sta;
322 si->vif = vif;
323 si->init_ra_lv = 1;
324 ewma_rssi_init(&si->avg_rssi);
325 for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
326 rtw_txq_init(rtwdev, sta->txq[i]);
327 INIT_WORK(&si->rc_work, rtw_sta_rc_work);
328
329 rtw_update_sta_info(rtwdev, si, true);
330 rtw_fw_media_status_report(rtwdev, si->mac_id, true);
331
332 rtwdev->sta_cnt++;
333 rtwdev->beacon_loss = false;
334 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM joined with macid %d\n",
335 sta->addr, si->mac_id);
336
337 return 0;
338 }
339
rtw_sta_remove(struct rtw_dev * rtwdev,struct ieee80211_sta * sta,bool fw_exist)340 void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
341 bool fw_exist)
342 {
343 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
344 int i;
345
346 cancel_work_sync(&si->rc_work);
347
348 rtw_release_macid(rtwdev, si->mac_id);
349 if (fw_exist)
350 rtw_fw_media_status_report(rtwdev, si->mac_id, false);
351
352 for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
353 rtw_txq_cleanup(rtwdev, sta->txq[i]);
354
355 kfree(si->mask);
356
357 rtwdev->sta_cnt--;
358 rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM with macid %d left\n",
359 sta->addr, si->mac_id);
360 }
361
362 struct rtw_fwcd_hdr {
363 u32 item;
364 u32 size;
365 u32 padding1;
366 u32 padding2;
367 } __packed;
368
rtw_fwcd_prep(struct rtw_dev * rtwdev)369 static int rtw_fwcd_prep(struct rtw_dev *rtwdev)
370 {
371 const struct rtw_chip_info *chip = rtwdev->chip;
372 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
373 const struct rtw_fwcd_segs *segs = chip->fwcd_segs;
374 u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr);
375 u8 i;
376
377 if (segs) {
378 prep_size += segs->num * sizeof(struct rtw_fwcd_hdr);
379
380 for (i = 0; i < segs->num; i++)
381 prep_size += segs->segs[i];
382 }
383
384 desc->data = vmalloc(prep_size);
385 if (!desc->data)
386 return -ENOMEM;
387
388 desc->size = prep_size;
389 desc->next = desc->data;
390
391 return 0;
392 }
393
rtw_fwcd_next(struct rtw_dev * rtwdev,u32 item,u32 size)394 static u8 *rtw_fwcd_next(struct rtw_dev *rtwdev, u32 item, u32 size)
395 {
396 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
397 struct rtw_fwcd_hdr *hdr;
398 u8 *next;
399
400 if (!desc->data) {
401 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared successfully\n");
402 return NULL;
403 }
404
405 next = desc->next + sizeof(struct rtw_fwcd_hdr);
406 if (next - desc->data + size > desc->size) {
407 rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared enough\n");
408 return NULL;
409 }
410
411 hdr = (struct rtw_fwcd_hdr *)(desc->next);
412 hdr->item = item;
413 hdr->size = size;
414 hdr->padding1 = 0x01234567;
415 hdr->padding2 = 0x89abcdef;
416 desc->next = next + size;
417
418 return next;
419 }
420
rtw_fwcd_dump(struct rtw_dev * rtwdev)421 static void rtw_fwcd_dump(struct rtw_dev *rtwdev)
422 {
423 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
424
425 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fwcd\n");
426
427 /* Data will be freed after lifetime of device coredump. After calling
428 * dev_coredump, data is supposed to be handled by the device coredump
429 * framework. Note that a new dump will be discarded if a previous one
430 * hasn't been released yet.
431 */
432 dev_coredumpv(rtwdev->dev, desc->data, desc->size, GFP_KERNEL);
433 }
434
rtw_fwcd_free(struct rtw_dev * rtwdev,bool free_self)435 static void rtw_fwcd_free(struct rtw_dev *rtwdev, bool free_self)
436 {
437 struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
438
439 if (free_self) {
440 rtw_dbg(rtwdev, RTW_DBG_FW, "free fwcd by self\n");
441 vfree(desc->data);
442 }
443
444 desc->data = NULL;
445 desc->next = NULL;
446 }
447
rtw_fw_dump_crash_log(struct rtw_dev * rtwdev)448 static int rtw_fw_dump_crash_log(struct rtw_dev *rtwdev)
449 {
450 u32 size = rtwdev->chip->fw_rxff_size;
451 u32 *buf;
452 u8 seq;
453
454 buf = (u32 *)rtw_fwcd_next(rtwdev, RTW_FWCD_TLV, size);
455 if (!buf)
456 return -ENOMEM;
457
458 if (rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, size, buf)) {
459 rtw_dbg(rtwdev, RTW_DBG_FW, "dump fw fifo fail\n");
460 return -EINVAL;
461 }
462
463 if (GET_FW_DUMP_LEN(buf) == 0) {
464 rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's length is 0\n");
465 return -EINVAL;
466 }
467
468 seq = GET_FW_DUMP_SEQ(buf);
469 if (seq > 0) {
470 rtw_dbg(rtwdev, RTW_DBG_FW,
471 "fw crash dump's seq is wrong: %d\n", seq);
472 return -EINVAL;
473 }
474
475 return 0;
476 }
477
rtw_dump_fw(struct rtw_dev * rtwdev,const u32 ocp_src,u32 size,u32 fwcd_item)478 int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size,
479 u32 fwcd_item)
480 {
481 u32 rxff = rtwdev->chip->fw_rxff_size;
482 u32 dump_size, done_size = 0;
483 u8 *buf;
484 int ret;
485
486 buf = rtw_fwcd_next(rtwdev, fwcd_item, size);
487 if (!buf)
488 return -ENOMEM;
489
490 while (size) {
491 dump_size = size > rxff ? rxff : size;
492
493 ret = rtw_ddma_to_fw_fifo(rtwdev, ocp_src + done_size,
494 dump_size);
495 if (ret) {
496 rtw_err(rtwdev,
497 "ddma fw 0x%x [+0x%x] to fw fifo fail\n",
498 ocp_src, done_size);
499 return ret;
500 }
501
502 ret = rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0,
503 dump_size, (u32 *)(buf + done_size));
504 if (ret) {
505 rtw_err(rtwdev,
506 "dump fw 0x%x [+0x%x] from fw fifo fail\n",
507 ocp_src, done_size);
508 return ret;
509 }
510
511 size -= dump_size;
512 done_size += dump_size;
513 }
514
515 return 0;
516 }
517 EXPORT_SYMBOL(rtw_dump_fw);
518
rtw_dump_reg(struct rtw_dev * rtwdev,const u32 addr,const u32 size)519 int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size)
520 {
521 u8 *buf;
522 u32 i;
523
524 if (addr & 0x3) {
525 WARN(1, "should be 4-byte aligned, addr = 0x%08x\n", addr);
526 return -EINVAL;
527 }
528
529 buf = rtw_fwcd_next(rtwdev, RTW_FWCD_REG, size);
530 if (!buf)
531 return -ENOMEM;
532
533 for (i = 0; i < size; i += 4)
534 *(u32 *)(buf + i) = rtw_read32(rtwdev, addr + i);
535
536 return 0;
537 }
538 EXPORT_SYMBOL(rtw_dump_reg);
539
rtw_vif_assoc_changed(struct rtw_vif * rtwvif,struct ieee80211_bss_conf * conf)540 void rtw_vif_assoc_changed(struct rtw_vif *rtwvif,
541 struct ieee80211_bss_conf *conf)
542 {
543 struct ieee80211_vif *vif = NULL;
544
545 if (conf)
546 vif = container_of(conf, struct ieee80211_vif, bss_conf);
547
548 if (conf && vif->cfg.assoc) {
549 rtwvif->aid = vif->cfg.aid;
550 rtwvif->net_type = RTW_NET_MGD_LINKED;
551 } else {
552 rtwvif->aid = 0;
553 rtwvif->net_type = RTW_NET_NO_LINK;
554 }
555 }
556
rtw_reset_key_iter(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key,void * data)557 static void rtw_reset_key_iter(struct ieee80211_hw *hw,
558 struct ieee80211_vif *vif,
559 struct ieee80211_sta *sta,
560 struct ieee80211_key_conf *key,
561 void *data)
562 {
563 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
564 struct rtw_sec_desc *sec = &rtwdev->sec;
565
566 rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx);
567 }
568
rtw_reset_sta_iter(void * data,struct ieee80211_sta * sta)569 static void rtw_reset_sta_iter(void *data, struct ieee80211_sta *sta)
570 {
571 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
572
573 if (rtwdev->sta_cnt == 0) {
574 rtw_warn(rtwdev, "sta count before reset should not be 0\n");
575 return;
576 }
577 rtw_sta_remove(rtwdev, sta, false);
578 }
579
rtw_reset_vif_iter(void * data,u8 * mac,struct ieee80211_vif * vif)580 static void rtw_reset_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
581 {
582 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
583 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
584
585 rtw_bf_disassoc(rtwdev, vif, NULL);
586 rtw_vif_assoc_changed(rtwvif, NULL);
587 rtw_txq_cleanup(rtwdev, vif->txq);
588 }
589
rtw_fw_recovery(struct rtw_dev * rtwdev)590 void rtw_fw_recovery(struct rtw_dev *rtwdev)
591 {
592 if (!test_bit(RTW_FLAG_RESTARTING, rtwdev->flags))
593 ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work);
594 }
595
__fw_recovery_work(struct rtw_dev * rtwdev)596 static void __fw_recovery_work(struct rtw_dev *rtwdev)
597 {
598 int ret = 0;
599
600 set_bit(RTW_FLAG_RESTARTING, rtwdev->flags);
601 clear_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags);
602
603 ret = rtw_fwcd_prep(rtwdev);
604 if (ret)
605 goto free;
606 ret = rtw_fw_dump_crash_log(rtwdev);
607 if (ret)
608 goto free;
609 ret = rtw_chip_dump_fw_crash(rtwdev);
610 if (ret)
611 goto free;
612
613 rtw_fwcd_dump(rtwdev);
614 free:
615 rtw_fwcd_free(rtwdev, !!ret);
616 rtw_write8(rtwdev, REG_MCU_TST_CFG, 0);
617
618 WARN(1, "firmware crash, start reset and recover\n");
619
620 rcu_read_lock();
621 rtw_iterate_keys_rcu(rtwdev, NULL, rtw_reset_key_iter, rtwdev);
622 rcu_read_unlock();
623 rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev);
624 rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev);
625 rtw_enter_ips(rtwdev);
626 }
627
rtw_fw_recovery_work(struct work_struct * work)628 static void rtw_fw_recovery_work(struct work_struct *work)
629 {
630 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
631 fw_recovery_work);
632
633 mutex_lock(&rtwdev->mutex);
634 __fw_recovery_work(rtwdev);
635 mutex_unlock(&rtwdev->mutex);
636
637 ieee80211_restart_hw(rtwdev->hw);
638 }
639
640 struct rtw_txq_ba_iter_data {
641 };
642
rtw_txq_ba_iter(void * data,struct ieee80211_sta * sta)643 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta)
644 {
645 struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
646 int ret;
647 u8 tid;
648
649 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
650 while (tid != IEEE80211_NUM_TIDS) {
651 clear_bit(tid, si->tid_ba);
652 ret = ieee80211_start_tx_ba_session(sta, tid, 0);
653 if (ret == -EINVAL) {
654 struct ieee80211_txq *txq;
655 struct rtw_txq *rtwtxq;
656
657 txq = sta->txq[tid];
658 rtwtxq = (struct rtw_txq *)txq->drv_priv;
659 set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags);
660 }
661
662 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
663 }
664 }
665
rtw_txq_ba_work(struct work_struct * work)666 static void rtw_txq_ba_work(struct work_struct *work)
667 {
668 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work);
669 struct rtw_txq_ba_iter_data data;
670
671 rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data);
672 }
673
rtw_set_rx_freq_band(struct rtw_rx_pkt_stat * pkt_stat,u8 channel)674 void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel)
675 {
676 if (IS_CH_2G_BAND(channel))
677 pkt_stat->band = NL80211_BAND_2GHZ;
678 else if (IS_CH_5G_BAND(channel))
679 pkt_stat->band = NL80211_BAND_5GHZ;
680 else
681 return;
682
683 pkt_stat->freq = ieee80211_channel_to_frequency(channel, pkt_stat->band);
684 }
685 EXPORT_SYMBOL(rtw_set_rx_freq_band);
686
rtw_set_dtim_period(struct rtw_dev * rtwdev,int dtim_period)687 void rtw_set_dtim_period(struct rtw_dev *rtwdev, int dtim_period)
688 {
689 rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_TIMIE);
690 rtw_write8(rtwdev, REG_DTIM_COUNTER_ROOT, dtim_period - 1);
691 }
692
rtw_update_channel(struct rtw_dev * rtwdev,u8 center_channel,u8 primary_channel,enum rtw_supported_band band,enum rtw_bandwidth bandwidth)693 void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel,
694 u8 primary_channel, enum rtw_supported_band band,
695 enum rtw_bandwidth bandwidth)
696 {
697 enum nl80211_band nl_band = rtw_hw_to_nl80211_band(band);
698 struct rtw_hal *hal = &rtwdev->hal;
699 u8 *cch_by_bw = hal->cch_by_bw;
700 u32 center_freq, primary_freq;
701 enum rtw_sar_bands sar_band;
702 u8 primary_channel_idx;
703
704 center_freq = ieee80211_channel_to_frequency(center_channel, nl_band);
705 primary_freq = ieee80211_channel_to_frequency(primary_channel, nl_band);
706
707 /* assign the center channel used while 20M bw is selected */
708 cch_by_bw[RTW_CHANNEL_WIDTH_20] = primary_channel;
709
710 /* assign the center channel used while current bw is selected */
711 cch_by_bw[bandwidth] = center_channel;
712
713 switch (bandwidth) {
714 case RTW_CHANNEL_WIDTH_20:
715 default:
716 primary_channel_idx = RTW_SC_DONT_CARE;
717 break;
718 case RTW_CHANNEL_WIDTH_40:
719 if (primary_freq > center_freq)
720 primary_channel_idx = RTW_SC_20_UPPER;
721 else
722 primary_channel_idx = RTW_SC_20_LOWER;
723 break;
724 case RTW_CHANNEL_WIDTH_80:
725 if (primary_freq > center_freq) {
726 if (primary_freq - center_freq == 10)
727 primary_channel_idx = RTW_SC_20_UPPER;
728 else
729 primary_channel_idx = RTW_SC_20_UPMOST;
730
731 /* assign the center channel used
732 * while 40M bw is selected
733 */
734 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel + 4;
735 } else {
736 if (center_freq - primary_freq == 10)
737 primary_channel_idx = RTW_SC_20_LOWER;
738 else
739 primary_channel_idx = RTW_SC_20_LOWEST;
740
741 /* assign the center channel used
742 * while 40M bw is selected
743 */
744 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel - 4;
745 }
746 break;
747 }
748
749 switch (center_channel) {
750 case 1 ... 14:
751 sar_band = RTW_SAR_BAND_0;
752 break;
753 case 36 ... 64:
754 sar_band = RTW_SAR_BAND_1;
755 break;
756 case 100 ... 144:
757 sar_band = RTW_SAR_BAND_3;
758 break;
759 case 149 ... 177:
760 sar_band = RTW_SAR_BAND_4;
761 break;
762 default:
763 WARN(1, "unknown ch(%u) to SAR band\n", center_channel);
764 sar_band = RTW_SAR_BAND_0;
765 break;
766 }
767
768 hal->current_primary_channel_index = primary_channel_idx;
769 hal->current_band_width = bandwidth;
770 hal->primary_channel = primary_channel;
771 hal->current_channel = center_channel;
772 hal->current_band_type = band;
773 hal->sar_band = sar_band;
774 }
775
rtw_get_channel_params(struct cfg80211_chan_def * chandef,struct rtw_channel_params * chan_params)776 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
777 struct rtw_channel_params *chan_params)
778 {
779 struct ieee80211_channel *channel = chandef->chan;
780 enum nl80211_chan_width width = chandef->width;
781 u32 primary_freq, center_freq;
782 u8 center_chan;
783 u8 bandwidth = RTW_CHANNEL_WIDTH_20;
784
785 center_chan = channel->hw_value;
786 primary_freq = channel->center_freq;
787 center_freq = chandef->center_freq1;
788
789 switch (width) {
790 case NL80211_CHAN_WIDTH_20_NOHT:
791 case NL80211_CHAN_WIDTH_20:
792 bandwidth = RTW_CHANNEL_WIDTH_20;
793 break;
794 case NL80211_CHAN_WIDTH_40:
795 bandwidth = RTW_CHANNEL_WIDTH_40;
796 if (primary_freq > center_freq)
797 center_chan -= 2;
798 else
799 center_chan += 2;
800 break;
801 case NL80211_CHAN_WIDTH_80:
802 bandwidth = RTW_CHANNEL_WIDTH_80;
803 if (primary_freq > center_freq) {
804 if (primary_freq - center_freq == 10)
805 center_chan -= 2;
806 else
807 center_chan -= 6;
808 } else {
809 if (center_freq - primary_freq == 10)
810 center_chan += 2;
811 else
812 center_chan += 6;
813 }
814 break;
815 default:
816 center_chan = 0;
817 break;
818 }
819
820 chan_params->center_chan = center_chan;
821 chan_params->bandwidth = bandwidth;
822 chan_params->primary_chan = channel->hw_value;
823 }
824
rtw_set_channel(struct rtw_dev * rtwdev)825 void rtw_set_channel(struct rtw_dev *rtwdev)
826 {
827 const struct rtw_chip_info *chip = rtwdev->chip;
828 struct ieee80211_hw *hw = rtwdev->hw;
829 struct rtw_hal *hal = &rtwdev->hal;
830 struct rtw_channel_params ch_param;
831 u8 center_chan, primary_chan, bandwidth, band;
832
833 rtw_get_channel_params(&hw->conf.chandef, &ch_param);
834 if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
835 return;
836
837 center_chan = ch_param.center_chan;
838 primary_chan = ch_param.primary_chan;
839 bandwidth = ch_param.bandwidth;
840 band = ch_param.center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
841
842 rtw_update_channel(rtwdev, center_chan, primary_chan, band, bandwidth);
843
844 chip->ops->set_channel(rtwdev, center_chan, bandwidth,
845 hal->current_primary_channel_index);
846
847 if (hal->current_band_type == RTW_BAND_5G) {
848 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);
849 } else {
850 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
851 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G);
852 else
853 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN);
854 }
855
856 rtw_phy_set_tx_power_level(rtwdev, center_chan);
857
858 /* if the channel isn't set for scanning, we will do RF calibration
859 * in ieee80211_ops::mgd_prepare_tx(). Performing the calibration
860 * during scanning on each channel takes too long.
861 */
862 if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
863 rtwdev->need_rfk = true;
864 }
865
rtw_chip_prepare_tx(struct rtw_dev * rtwdev)866 void rtw_chip_prepare_tx(struct rtw_dev *rtwdev)
867 {
868 const struct rtw_chip_info *chip = rtwdev->chip;
869
870 if (rtwdev->need_rfk) {
871 rtwdev->need_rfk = false;
872 chip->ops->phy_calibration(rtwdev);
873 }
874 }
875
rtw_vif_write_addr(struct rtw_dev * rtwdev,u32 start,u8 * addr)876 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
877 {
878 int i;
879
880 for (i = 0; i < ETH_ALEN; i++)
881 rtw_write8(rtwdev, start + i, addr[i]);
882 }
883
rtw_vif_port_config(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif,u32 config)884 void rtw_vif_port_config(struct rtw_dev *rtwdev,
885 struct rtw_vif *rtwvif,
886 u32 config)
887 {
888 u32 addr, mask;
889
890 if (config & PORT_SET_MAC_ADDR) {
891 addr = rtwvif->conf->mac_addr.addr;
892 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
893 }
894 if (config & PORT_SET_BSSID) {
895 addr = rtwvif->conf->bssid.addr;
896 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
897 }
898 if (config & PORT_SET_NET_TYPE) {
899 addr = rtwvif->conf->net_type.addr;
900 mask = rtwvif->conf->net_type.mask;
901 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
902 }
903 if (config & PORT_SET_AID) {
904 addr = rtwvif->conf->aid.addr;
905 mask = rtwvif->conf->aid.mask;
906 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
907 }
908 if (config & PORT_SET_BCN_CTRL) {
909 addr = rtwvif->conf->bcn_ctrl.addr;
910 mask = rtwvif->conf->bcn_ctrl.mask;
911 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);
912 }
913 }
914
hw_bw_cap_to_bitamp(u8 bw_cap)915 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
916 {
917 u8 bw = 0;
918
919 switch (bw_cap) {
920 case EFUSE_HW_CAP_IGNORE:
921 case EFUSE_HW_CAP_SUPP_BW80:
922 bw |= BIT(RTW_CHANNEL_WIDTH_80);
923 fallthrough;
924 case EFUSE_HW_CAP_SUPP_BW40:
925 bw |= BIT(RTW_CHANNEL_WIDTH_40);
926 fallthrough;
927 default:
928 bw |= BIT(RTW_CHANNEL_WIDTH_20);
929 break;
930 }
931
932 return bw;
933 }
934
rtw_hw_config_rf_ant_num(struct rtw_dev * rtwdev,u8 hw_ant_num)935 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
936 {
937 const struct rtw_chip_info *chip = rtwdev->chip;
938 struct rtw_hal *hal = &rtwdev->hal;
939
940 if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
941 hw_ant_num >= hal->rf_path_num)
942 return;
943
944 switch (hw_ant_num) {
945 case 1:
946 hal->rf_type = RF_1T1R;
947 hal->rf_path_num = 1;
948 if (!chip->fix_rf_phy_num)
949 hal->rf_phy_num = hal->rf_path_num;
950 hal->antenna_tx = BB_PATH_A;
951 hal->antenna_rx = BB_PATH_A;
952 break;
953 default:
954 WARN(1, "invalid hw configuration from efuse\n");
955 break;
956 }
957 }
958
get_vht_ra_mask(struct ieee80211_sta * sta)959 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
960 {
961 u64 ra_mask = 0;
962 u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
963 u8 vht_mcs_cap;
964 int i, nss;
965
966 /* 4SS, every two bits for MCS7/8/9 */
967 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
968 vht_mcs_cap = mcs_map & 0x3;
969 switch (vht_mcs_cap) {
970 case 2: /* MCS9 */
971 ra_mask |= 0x3ffULL << nss;
972 break;
973 case 1: /* MCS8 */
974 ra_mask |= 0x1ffULL << nss;
975 break;
976 case 0: /* MCS7 */
977 ra_mask |= 0x0ffULL << nss;
978 break;
979 default:
980 break;
981 }
982 }
983
984 return ra_mask;
985 }
986
get_rate_id(u8 wireless_set,enum rtw_bandwidth bw_mode,u8 tx_num)987 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
988 {
989 u8 rate_id = 0;
990
991 switch (wireless_set) {
992 case WIRELESS_CCK:
993 rate_id = RTW_RATEID_B_20M;
994 break;
995 case WIRELESS_OFDM:
996 rate_id = RTW_RATEID_G;
997 break;
998 case WIRELESS_CCK | WIRELESS_OFDM:
999 rate_id = RTW_RATEID_BG;
1000 break;
1001 case WIRELESS_OFDM | WIRELESS_HT:
1002 if (tx_num == 1)
1003 rate_id = RTW_RATEID_GN_N1SS;
1004 else if (tx_num == 2)
1005 rate_id = RTW_RATEID_GN_N2SS;
1006 else if (tx_num == 3)
1007 rate_id = RTW_RATEID_ARFR5_N_3SS;
1008 break;
1009 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
1010 if (bw_mode == RTW_CHANNEL_WIDTH_40) {
1011 if (tx_num == 1)
1012 rate_id = RTW_RATEID_BGN_40M_1SS;
1013 else if (tx_num == 2)
1014 rate_id = RTW_RATEID_BGN_40M_2SS;
1015 else if (tx_num == 3)
1016 rate_id = RTW_RATEID_ARFR5_N_3SS;
1017 else if (tx_num == 4)
1018 rate_id = RTW_RATEID_ARFR7_N_4SS;
1019 } else {
1020 if (tx_num == 1)
1021 rate_id = RTW_RATEID_BGN_20M_1SS;
1022 else if (tx_num == 2)
1023 rate_id = RTW_RATEID_BGN_20M_2SS;
1024 else if (tx_num == 3)
1025 rate_id = RTW_RATEID_ARFR5_N_3SS;
1026 else if (tx_num == 4)
1027 rate_id = RTW_RATEID_ARFR7_N_4SS;
1028 }
1029 break;
1030 case WIRELESS_OFDM | WIRELESS_VHT:
1031 if (tx_num == 1)
1032 rate_id = RTW_RATEID_ARFR1_AC_1SS;
1033 else if (tx_num == 2)
1034 rate_id = RTW_RATEID_ARFR0_AC_2SS;
1035 else if (tx_num == 3)
1036 rate_id = RTW_RATEID_ARFR4_AC_3SS;
1037 else if (tx_num == 4)
1038 rate_id = RTW_RATEID_ARFR6_AC_4SS;
1039 break;
1040 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
1041 if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
1042 if (tx_num == 1)
1043 rate_id = RTW_RATEID_ARFR1_AC_1SS;
1044 else if (tx_num == 2)
1045 rate_id = RTW_RATEID_ARFR0_AC_2SS;
1046 else if (tx_num == 3)
1047 rate_id = RTW_RATEID_ARFR4_AC_3SS;
1048 else if (tx_num == 4)
1049 rate_id = RTW_RATEID_ARFR6_AC_4SS;
1050 } else {
1051 if (tx_num == 1)
1052 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
1053 else if (tx_num == 2)
1054 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
1055 else if (tx_num == 3)
1056 rate_id = RTW_RATEID_ARFR4_AC_3SS;
1057 else if (tx_num == 4)
1058 rate_id = RTW_RATEID_ARFR6_AC_4SS;
1059 }
1060 break;
1061 default:
1062 break;
1063 }
1064
1065 return rate_id;
1066 }
1067
1068 #define RA_MASK_CCK_RATES 0x0000f
1069 #define RA_MASK_OFDM_RATES 0x00ff0
1070 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0)
1071 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8)
1072 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16)
1073 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \
1074 RA_MASK_HT_RATES_2SS | \
1075 RA_MASK_HT_RATES_3SS)
1076 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0)
1077 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10)
1078 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20)
1079 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \
1080 RA_MASK_VHT_RATES_2SS | \
1081 RA_MASK_VHT_RATES_3SS)
1082 #define RA_MASK_CCK_IN_BG 0x00005
1083 #define RA_MASK_CCK_IN_HT 0x00005
1084 #define RA_MASK_CCK_IN_VHT 0x00005
1085 #define RA_MASK_OFDM_IN_VHT 0x00010
1086 #define RA_MASK_OFDM_IN_HT_2G 0x00010
1087 #define RA_MASK_OFDM_IN_HT_5G 0x00030
1088
rtw_rate_mask_rssi(struct rtw_sta_info * si,u8 wireless_set)1089 static u64 rtw_rate_mask_rssi(struct rtw_sta_info *si, u8 wireless_set)
1090 {
1091 u8 rssi_level = si->rssi_level;
1092
1093 if (wireless_set == WIRELESS_CCK)
1094 return 0xffffffffffffffffULL;
1095
1096 if (rssi_level == 0)
1097 return 0xffffffffffffffffULL;
1098 else if (rssi_level == 1)
1099 return 0xfffffffffffffff0ULL;
1100 else if (rssi_level == 2)
1101 return 0xffffffffffffefe0ULL;
1102 else if (rssi_level == 3)
1103 return 0xffffffffffffcfc0ULL;
1104 else if (rssi_level == 4)
1105 return 0xffffffffffff8f80ULL;
1106 else
1107 return 0xffffffffffff0f00ULL;
1108 }
1109
rtw_rate_mask_recover(u64 ra_mask,u64 ra_mask_bak)1110 static u64 rtw_rate_mask_recover(u64 ra_mask, u64 ra_mask_bak)
1111 {
1112 if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0)
1113 ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
1114
1115 if (ra_mask == 0)
1116 ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
1117
1118 return ra_mask;
1119 }
1120
rtw_rate_mask_cfg(struct rtw_dev * rtwdev,struct rtw_sta_info * si,u64 ra_mask,bool is_vht_enable)1121 static u64 rtw_rate_mask_cfg(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
1122 u64 ra_mask, bool is_vht_enable)
1123 {
1124 struct rtw_hal *hal = &rtwdev->hal;
1125 const struct cfg80211_bitrate_mask *mask = si->mask;
1126 u64 cfg_mask = GENMASK_ULL(63, 0);
1127 u8 band;
1128
1129 if (!si->use_cfg_mask)
1130 return ra_mask;
1131
1132 band = hal->current_band_type;
1133 if (band == RTW_BAND_2G) {
1134 band = NL80211_BAND_2GHZ;
1135 cfg_mask = mask->control[band].legacy;
1136 } else if (band == RTW_BAND_5G) {
1137 band = NL80211_BAND_5GHZ;
1138 cfg_mask = u64_encode_bits(mask->control[band].legacy,
1139 RA_MASK_OFDM_RATES);
1140 }
1141
1142 if (!is_vht_enable) {
1143 if (ra_mask & RA_MASK_HT_RATES_1SS)
1144 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0],
1145 RA_MASK_HT_RATES_1SS);
1146 if (ra_mask & RA_MASK_HT_RATES_2SS)
1147 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1],
1148 RA_MASK_HT_RATES_2SS);
1149 } else {
1150 if (ra_mask & RA_MASK_VHT_RATES_1SS)
1151 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0],
1152 RA_MASK_VHT_RATES_1SS);
1153 if (ra_mask & RA_MASK_VHT_RATES_2SS)
1154 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1],
1155 RA_MASK_VHT_RATES_2SS);
1156 }
1157
1158 ra_mask &= cfg_mask;
1159
1160 return ra_mask;
1161 }
1162
rtw_update_sta_info(struct rtw_dev * rtwdev,struct rtw_sta_info * si,bool reset_ra_mask)1163 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
1164 bool reset_ra_mask)
1165 {
1166 struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1167 struct ieee80211_sta *sta = si->sta;
1168 struct rtw_efuse *efuse = &rtwdev->efuse;
1169 struct rtw_hal *hal = &rtwdev->hal;
1170 u8 wireless_set;
1171 u8 bw_mode;
1172 u8 rate_id;
1173 u8 rf_type = RF_1T1R;
1174 u8 stbc_en = 0;
1175 u8 ldpc_en = 0;
1176 u8 tx_num = 1;
1177 u64 ra_mask = 0;
1178 u64 ra_mask_bak = 0;
1179 bool is_vht_enable = false;
1180 bool is_support_sgi = false;
1181
1182 if (sta->deflink.vht_cap.vht_supported) {
1183 is_vht_enable = true;
1184 ra_mask |= get_vht_ra_mask(sta);
1185 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
1186 stbc_en = VHT_STBC_EN;
1187 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
1188 ldpc_en = VHT_LDPC_EN;
1189 } else if (sta->deflink.ht_cap.ht_supported) {
1190 ra_mask |= (sta->deflink.ht_cap.mcs.rx_mask[1] << 20) |
1191 (sta->deflink.ht_cap.mcs.rx_mask[0] << 12);
1192 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
1193 stbc_en = HT_STBC_EN;
1194 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
1195 ldpc_en = HT_LDPC_EN;
1196 }
1197
1198 if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss)
1199 ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;
1200
1201 if (hal->current_band_type == RTW_BAND_5G) {
1202 ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4;
1203 ra_mask_bak = ra_mask;
1204 if (sta->deflink.vht_cap.vht_supported) {
1205 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
1206 wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
1207 } else if (sta->deflink.ht_cap.ht_supported) {
1208 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
1209 wireless_set = WIRELESS_OFDM | WIRELESS_HT;
1210 } else {
1211 wireless_set = WIRELESS_OFDM;
1212 }
1213 dm_info->rrsr_val_init = RRSR_INIT_5G;
1214 } else if (hal->current_band_type == RTW_BAND_2G) {
1215 ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ];
1216 ra_mask_bak = ra_mask;
1217 if (sta->deflink.vht_cap.vht_supported) {
1218 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
1219 RA_MASK_OFDM_IN_VHT;
1220 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
1221 WIRELESS_HT | WIRELESS_VHT;
1222 } else if (sta->deflink.ht_cap.ht_supported) {
1223 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
1224 RA_MASK_OFDM_IN_HT_2G;
1225 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
1226 WIRELESS_HT;
1227 } else if (sta->deflink.supp_rates[0] <= 0xf) {
1228 wireless_set = WIRELESS_CCK;
1229 } else {
1230 ra_mask &= RA_MASK_OFDM_RATES | RA_MASK_CCK_IN_BG;
1231 wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
1232 }
1233 dm_info->rrsr_val_init = RRSR_INIT_2G;
1234 } else {
1235 rtw_err(rtwdev, "Unknown band type\n");
1236 ra_mask_bak = ra_mask;
1237 wireless_set = 0;
1238 }
1239
1240 switch (sta->deflink.bandwidth) {
1241 case IEEE80211_STA_RX_BW_80:
1242 bw_mode = RTW_CHANNEL_WIDTH_80;
1243 is_support_sgi = sta->deflink.vht_cap.vht_supported &&
1244 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80);
1245 break;
1246 case IEEE80211_STA_RX_BW_40:
1247 bw_mode = RTW_CHANNEL_WIDTH_40;
1248 is_support_sgi = sta->deflink.ht_cap.ht_supported &&
1249 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40);
1250 break;
1251 default:
1252 bw_mode = RTW_CHANNEL_WIDTH_20;
1253 is_support_sgi = sta->deflink.ht_cap.ht_supported &&
1254 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20);
1255 break;
1256 }
1257
1258 if (sta->deflink.vht_cap.vht_supported && ra_mask & 0xffc00000) {
1259 tx_num = 2;
1260 rf_type = RF_2T2R;
1261 } else if (sta->deflink.ht_cap.ht_supported && ra_mask & 0xfff00000) {
1262 tx_num = 2;
1263 rf_type = RF_2T2R;
1264 }
1265
1266 rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
1267
1268 ra_mask &= rtw_rate_mask_rssi(si, wireless_set);
1269 ra_mask = rtw_rate_mask_recover(ra_mask, ra_mask_bak);
1270 ra_mask = rtw_rate_mask_cfg(rtwdev, si, ra_mask, is_vht_enable);
1271
1272 si->bw_mode = bw_mode;
1273 si->stbc_en = stbc_en;
1274 si->ldpc_en = ldpc_en;
1275 si->rf_type = rf_type;
1276 si->wireless_set = wireless_set;
1277 si->sgi_enable = is_support_sgi;
1278 si->vht_enable = is_vht_enable;
1279 si->ra_mask = ra_mask;
1280 si->rate_id = rate_id;
1281
1282 rtw_fw_send_ra_info(rtwdev, si, reset_ra_mask);
1283 }
1284
rtw_wait_firmware_completion(struct rtw_dev * rtwdev)1285 static int rtw_wait_firmware_completion(struct rtw_dev *rtwdev)
1286 {
1287 const struct rtw_chip_info *chip = rtwdev->chip;
1288 struct rtw_fw_state *fw;
1289
1290 fw = &rtwdev->fw;
1291 wait_for_completion(&fw->completion);
1292 if (!fw->firmware)
1293 return -EINVAL;
1294
1295 if (chip->wow_fw_name) {
1296 fw = &rtwdev->wow_fw;
1297 wait_for_completion(&fw->completion);
1298 if (!fw->firmware)
1299 return -EINVAL;
1300 }
1301
1302 return 0;
1303 }
1304
rtw_update_lps_deep_mode(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1305 static enum rtw_lps_deep_mode rtw_update_lps_deep_mode(struct rtw_dev *rtwdev,
1306 struct rtw_fw_state *fw)
1307 {
1308 const struct rtw_chip_info *chip = rtwdev->chip;
1309
1310 if (rtw_disable_lps_deep_mode || !chip->lps_deep_mode_supported ||
1311 !fw->feature)
1312 return LPS_DEEP_MODE_NONE;
1313
1314 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_PG)) &&
1315 rtw_fw_feature_check(fw, FW_FEATURE_PG))
1316 return LPS_DEEP_MODE_PG;
1317
1318 if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_LCLK)) &&
1319 rtw_fw_feature_check(fw, FW_FEATURE_LCLK))
1320 return LPS_DEEP_MODE_LCLK;
1321
1322 return LPS_DEEP_MODE_NONE;
1323 }
1324
rtw_power_on(struct rtw_dev * rtwdev)1325 static int rtw_power_on(struct rtw_dev *rtwdev)
1326 {
1327 const struct rtw_chip_info *chip = rtwdev->chip;
1328 struct rtw_fw_state *fw = &rtwdev->fw;
1329 bool wifi_only;
1330 int ret;
1331
1332 ret = rtw_hci_setup(rtwdev);
1333 if (ret) {
1334 rtw_err(rtwdev, "failed to setup hci\n");
1335 goto err;
1336 }
1337
1338 /* power on MAC before firmware downloaded */
1339 ret = rtw_mac_power_on(rtwdev);
1340 if (ret) {
1341 rtw_err(rtwdev, "failed to power on mac\n");
1342 goto err;
1343 }
1344
1345 ret = rtw_wait_firmware_completion(rtwdev);
1346 if (ret) {
1347 rtw_err(rtwdev, "failed to wait firmware completion\n");
1348 goto err_off;
1349 }
1350
1351 ret = rtw_download_firmware(rtwdev, fw);
1352 if (ret) {
1353 rtw_err(rtwdev, "failed to download firmware\n");
1354 goto err_off;
1355 }
1356
1357 /* config mac after firmware downloaded */
1358 ret = rtw_mac_init(rtwdev);
1359 if (ret) {
1360 rtw_err(rtwdev, "failed to configure mac\n");
1361 goto err_off;
1362 }
1363
1364 chip->ops->phy_set_param(rtwdev);
1365
1366 ret = rtw_hci_start(rtwdev);
1367 if (ret) {
1368 rtw_err(rtwdev, "failed to start hci\n");
1369 goto err_off;
1370 }
1371
1372 /* send H2C after HCI has started */
1373 rtw_fw_send_general_info(rtwdev);
1374 rtw_fw_send_phydm_info(rtwdev);
1375
1376 wifi_only = !rtwdev->efuse.btcoex;
1377 rtw_coex_power_on_setting(rtwdev);
1378 rtw_coex_init_hw_config(rtwdev, wifi_only);
1379
1380 return 0;
1381
1382 err_off:
1383 rtw_mac_power_off(rtwdev);
1384
1385 err:
1386 return ret;
1387 }
1388
rtw_core_fw_scan_notify(struct rtw_dev * rtwdev,bool start)1389 void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start)
1390 {
1391 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_NOTIFY_SCAN))
1392 return;
1393
1394 if (start) {
1395 rtw_fw_scan_notify(rtwdev, true);
1396 } else {
1397 reinit_completion(&rtwdev->fw_scan_density);
1398 rtw_fw_scan_notify(rtwdev, false);
1399 if (!wait_for_completion_timeout(&rtwdev->fw_scan_density,
1400 SCAN_NOTIFY_TIMEOUT))
1401 rtw_warn(rtwdev, "firmware failed to report density after scan\n");
1402 }
1403 }
1404
rtw_core_scan_start(struct rtw_dev * rtwdev,struct rtw_vif * rtwvif,const u8 * mac_addr,bool hw_scan)1405 void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif,
1406 const u8 *mac_addr, bool hw_scan)
1407 {
1408 u32 config = 0;
1409 int ret = 0;
1410
1411 rtw_leave_lps(rtwdev);
1412
1413 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) {
1414 ret = rtw_leave_ips(rtwdev);
1415 if (ret) {
1416 rtw_err(rtwdev, "failed to leave idle state\n");
1417 return;
1418 }
1419 }
1420
1421 ether_addr_copy(rtwvif->mac_addr, mac_addr);
1422 config |= PORT_SET_MAC_ADDR;
1423 rtw_vif_port_config(rtwdev, rtwvif, config);
1424
1425 rtw_coex_scan_notify(rtwdev, COEX_SCAN_START);
1426 rtw_core_fw_scan_notify(rtwdev, true);
1427
1428 set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
1429 set_bit(RTW_FLAG_SCANNING, rtwdev->flags);
1430 }
1431
rtw_core_scan_complete(struct rtw_dev * rtwdev,struct ieee80211_vif * vif,bool hw_scan)1432 void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
1433 bool hw_scan)
1434 {
1435 struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL;
1436 u32 config = 0;
1437
1438 if (!rtwvif)
1439 return;
1440
1441 clear_bit(RTW_FLAG_SCANNING, rtwdev->flags);
1442 clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
1443
1444 rtw_core_fw_scan_notify(rtwdev, false);
1445
1446 ether_addr_copy(rtwvif->mac_addr, vif->addr);
1447 config |= PORT_SET_MAC_ADDR;
1448 rtw_vif_port_config(rtwdev, rtwvif, config);
1449
1450 rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH);
1451
1452 if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
1453 ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work);
1454 }
1455
rtw_core_start(struct rtw_dev * rtwdev)1456 int rtw_core_start(struct rtw_dev *rtwdev)
1457 {
1458 int ret;
1459
1460 ret = rtw_power_on(rtwdev);
1461 if (ret)
1462 return ret;
1463
1464 rtw_sec_enable_sec_engine(rtwdev);
1465
1466 rtwdev->lps_conf.deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->fw);
1467 rtwdev->lps_conf.wow_deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->wow_fw);
1468
1469 /* rcr reset after powered on */
1470 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
1471
1472 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
1473 RTW_WATCH_DOG_DELAY_TIME);
1474
1475 set_bit(RTW_FLAG_RUNNING, rtwdev->flags);
1476
1477 return 0;
1478 }
1479
rtw_power_off(struct rtw_dev * rtwdev)1480 static void rtw_power_off(struct rtw_dev *rtwdev)
1481 {
1482 rtw_hci_stop(rtwdev);
1483 rtw_coex_power_off_setting(rtwdev);
1484 rtw_mac_power_off(rtwdev);
1485 }
1486
rtw_core_stop(struct rtw_dev * rtwdev)1487 void rtw_core_stop(struct rtw_dev *rtwdev)
1488 {
1489 struct rtw_coex *coex = &rtwdev->coex;
1490
1491 clear_bit(RTW_FLAG_RUNNING, rtwdev->flags);
1492 clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags);
1493
1494 mutex_unlock(&rtwdev->mutex);
1495
1496 cancel_work_sync(&rtwdev->c2h_work);
1497 cancel_work_sync(&rtwdev->update_beacon_work);
1498 cancel_delayed_work_sync(&rtwdev->watch_dog_work);
1499 cancel_delayed_work_sync(&coex->bt_relink_work);
1500 cancel_delayed_work_sync(&coex->bt_reenable_work);
1501 cancel_delayed_work_sync(&coex->defreeze_work);
1502 cancel_delayed_work_sync(&coex->wl_remain_work);
1503 cancel_delayed_work_sync(&coex->bt_remain_work);
1504 cancel_delayed_work_sync(&coex->wl_connecting_work);
1505 cancel_delayed_work_sync(&coex->bt_multi_link_remain_work);
1506 cancel_delayed_work_sync(&coex->wl_ccklock_work);
1507
1508 mutex_lock(&rtwdev->mutex);
1509
1510 rtw_power_off(rtwdev);
1511 }
1512
rtw_init_ht_cap(struct rtw_dev * rtwdev,struct ieee80211_sta_ht_cap * ht_cap)1513 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
1514 struct ieee80211_sta_ht_cap *ht_cap)
1515 {
1516 const struct rtw_chip_info *chip = rtwdev->chip;
1517 struct rtw_efuse *efuse = &rtwdev->efuse;
1518
1519 ht_cap->ht_supported = true;
1520 ht_cap->cap = 0;
1521 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
1522 IEEE80211_HT_CAP_MAX_AMSDU |
1523 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
1524
1525 if (rtw_chip_has_rx_ldpc(rtwdev))
1526 ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
1527 if (rtw_chip_has_tx_stbc(rtwdev))
1528 ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC;
1529
1530 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
1531 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
1532 IEEE80211_HT_CAP_DSSSCCK40 |
1533 IEEE80211_HT_CAP_SGI_40;
1534 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1535 ht_cap->ampdu_density = chip->ampdu_density;
1536 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1537 if (efuse->hw_cap.nss > 1) {
1538 ht_cap->mcs.rx_mask[0] = 0xFF;
1539 ht_cap->mcs.rx_mask[1] = 0xFF;
1540 ht_cap->mcs.rx_mask[4] = 0x01;
1541 ht_cap->mcs.rx_highest = cpu_to_le16(300);
1542 } else {
1543 ht_cap->mcs.rx_mask[0] = 0xFF;
1544 ht_cap->mcs.rx_mask[1] = 0x00;
1545 ht_cap->mcs.rx_mask[4] = 0x01;
1546 ht_cap->mcs.rx_highest = cpu_to_le16(150);
1547 }
1548 }
1549
rtw_init_vht_cap(struct rtw_dev * rtwdev,struct ieee80211_sta_vht_cap * vht_cap)1550 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
1551 struct ieee80211_sta_vht_cap *vht_cap)
1552 {
1553 struct rtw_efuse *efuse = &rtwdev->efuse;
1554 u16 mcs_map;
1555 __le16 highest;
1556
1557 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
1558 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
1559 return;
1560
1561 vht_cap->vht_supported = true;
1562 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
1563 IEEE80211_VHT_CAP_SHORT_GI_80 |
1564 IEEE80211_VHT_CAP_RXSTBC_1 |
1565 IEEE80211_VHT_CAP_HTC_VHT |
1566 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
1567 0;
1568 if (rtwdev->hal.rf_path_num > 1)
1569 vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
1570 vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
1571 IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
1572 vht_cap->cap |= (rtwdev->hal.bfee_sts_cap <<
1573 IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
1574
1575 if (rtw_chip_has_rx_ldpc(rtwdev))
1576 vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
1577
1578 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
1579 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
1580 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
1581 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
1582 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
1583 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
1584 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
1585 if (efuse->hw_cap.nss > 1) {
1586 highest = cpu_to_le16(780);
1587 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
1588 } else {
1589 highest = cpu_to_le16(390);
1590 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
1591 }
1592
1593 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
1594 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
1595 vht_cap->vht_mcs.rx_highest = highest;
1596 vht_cap->vht_mcs.tx_highest = highest;
1597 }
1598
rtw_get_max_scan_ie_len(struct rtw_dev * rtwdev)1599 static u16 rtw_get_max_scan_ie_len(struct rtw_dev *rtwdev)
1600 {
1601 u16 len;
1602
1603 len = rtwdev->chip->max_scan_ie_len;
1604
1605 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD) &&
1606 rtwdev->chip->id == RTW_CHIP_TYPE_8822C)
1607 len = IEEE80211_MAX_DATA_LEN;
1608 else if (rtw_fw_feature_ext_check(&rtwdev->fw, FW_FEATURE_EXT_OLD_PAGE_NUM))
1609 len -= RTW_OLD_PROBE_PG_CNT * TX_PAGE_SIZE;
1610
1611 return len;
1612 }
1613
rtw_set_supported_band(struct ieee80211_hw * hw,const struct rtw_chip_info * chip)1614 static void rtw_set_supported_band(struct ieee80211_hw *hw,
1615 const struct rtw_chip_info *chip)
1616 {
1617 struct rtw_dev *rtwdev = hw->priv;
1618 struct ieee80211_supported_band *sband;
1619
1620 if (chip->band & RTW_BAND_2G) {
1621 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
1622 if (!sband)
1623 goto err_out;
1624 if (chip->ht_supported)
1625 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1626 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
1627 }
1628
1629 if (chip->band & RTW_BAND_5G) {
1630 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
1631 if (!sband)
1632 goto err_out;
1633 if (chip->ht_supported)
1634 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1635 if (chip->vht_supported)
1636 rtw_init_vht_cap(rtwdev, &sband->vht_cap);
1637 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
1638 }
1639
1640 return;
1641
1642 err_out:
1643 rtw_err(rtwdev, "failed to set supported band\n");
1644 }
1645
rtw_unset_supported_band(struct ieee80211_hw * hw,const struct rtw_chip_info * chip)1646 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
1647 const struct rtw_chip_info *chip)
1648 {
1649 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
1650 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
1651 }
1652
rtw_vif_smps_iter(void * data,u8 * mac,struct ieee80211_vif * vif)1653 static void rtw_vif_smps_iter(void *data, u8 *mac,
1654 struct ieee80211_vif *vif)
1655 {
1656 struct rtw_dev *rtwdev = (struct rtw_dev *)data;
1657
1658 if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc)
1659 return;
1660
1661 if (rtwdev->hal.txrx_1ss)
1662 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_STATIC);
1663 else
1664 ieee80211_request_smps(vif, 0, IEEE80211_SMPS_OFF);
1665 }
1666
rtw_set_txrx_1ss(struct rtw_dev * rtwdev,bool txrx_1ss)1667 void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool txrx_1ss)
1668 {
1669 const struct rtw_chip_info *chip = rtwdev->chip;
1670 struct rtw_hal *hal = &rtwdev->hal;
1671
1672 if (!chip->ops->config_txrx_mode || rtwdev->hal.txrx_1ss == txrx_1ss)
1673 return;
1674
1675 rtwdev->hal.txrx_1ss = txrx_1ss;
1676 if (txrx_1ss)
1677 chip->ops->config_txrx_mode(rtwdev, BB_PATH_A, BB_PATH_A, false);
1678 else
1679 chip->ops->config_txrx_mode(rtwdev, hal->antenna_tx,
1680 hal->antenna_rx, false);
1681 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_smps_iter, rtwdev);
1682 }
1683
__update_firmware_feature(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1684 static void __update_firmware_feature(struct rtw_dev *rtwdev,
1685 struct rtw_fw_state *fw)
1686 {
1687 u32 feature;
1688 const struct rtw_fw_hdr *fw_hdr =
1689 (const struct rtw_fw_hdr *)fw->firmware->data;
1690
1691 feature = le32_to_cpu(fw_hdr->feature);
1692 fw->feature = feature & FW_FEATURE_SIG ? feature : 0;
1693
1694 if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C &&
1695 RTW_FW_SUIT_VER_CODE(rtwdev->fw) < RTW_FW_VER_CODE(9, 9, 13))
1696 fw->feature_ext |= FW_FEATURE_EXT_OLD_PAGE_NUM;
1697 }
1698
__update_firmware_info(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1699 static void __update_firmware_info(struct rtw_dev *rtwdev,
1700 struct rtw_fw_state *fw)
1701 {
1702 const struct rtw_fw_hdr *fw_hdr =
1703 (const struct rtw_fw_hdr *)fw->firmware->data;
1704
1705 fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver);
1706 fw->version = le16_to_cpu(fw_hdr->version);
1707 fw->sub_version = fw_hdr->subversion;
1708 fw->sub_index = fw_hdr->subindex;
1709
1710 __update_firmware_feature(rtwdev, fw);
1711 }
1712
__update_firmware_info_legacy(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1713 static void __update_firmware_info_legacy(struct rtw_dev *rtwdev,
1714 struct rtw_fw_state *fw)
1715 {
1716 struct rtw_fw_hdr_legacy *legacy =
1717 (struct rtw_fw_hdr_legacy *)fw->firmware->data;
1718
1719 fw->h2c_version = 0;
1720 fw->version = le16_to_cpu(legacy->version);
1721 fw->sub_version = legacy->subversion1;
1722 fw->sub_index = legacy->subversion2;
1723 }
1724
update_firmware_info(struct rtw_dev * rtwdev,struct rtw_fw_state * fw)1725 static void update_firmware_info(struct rtw_dev *rtwdev,
1726 struct rtw_fw_state *fw)
1727 {
1728 if (rtw_chip_wcpu_11n(rtwdev))
1729 __update_firmware_info_legacy(rtwdev, fw);
1730 else
1731 __update_firmware_info(rtwdev, fw);
1732 }
1733
rtw_load_firmware_cb(const struct firmware * firmware,void * context)1734 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
1735 {
1736 struct rtw_fw_state *fw = context;
1737 struct rtw_dev *rtwdev = fw->rtwdev;
1738
1739 if (!firmware || !firmware->data) {
1740 rtw_err(rtwdev, "failed to request firmware\n");
1741 complete_all(&fw->completion);
1742 return;
1743 }
1744
1745 fw->firmware = firmware;
1746 update_firmware_info(rtwdev, fw);
1747 complete_all(&fw->completion);
1748
1749 rtw_info(rtwdev, "Firmware version %u.%u.%u, H2C version %u\n",
1750 fw->version, fw->sub_version, fw->sub_index, fw->h2c_version);
1751 }
1752
rtw_load_firmware(struct rtw_dev * rtwdev,enum rtw_fw_type type)1753 static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type)
1754 {
1755 const char *fw_name;
1756 struct rtw_fw_state *fw;
1757 int ret;
1758
1759 switch (type) {
1760 case RTW_WOWLAN_FW:
1761 fw = &rtwdev->wow_fw;
1762 fw_name = rtwdev->chip->wow_fw_name;
1763 break;
1764
1765 case RTW_NORMAL_FW:
1766 fw = &rtwdev->fw;
1767 fw_name = rtwdev->chip->fw_name;
1768 break;
1769
1770 default:
1771 rtw_warn(rtwdev, "unsupported firmware type\n");
1772 return -ENOENT;
1773 }
1774
1775 fw->rtwdev = rtwdev;
1776 init_completion(&fw->completion);
1777
1778 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
1779 GFP_KERNEL, fw, rtw_load_firmware_cb);
1780 if (ret) {
1781 rtw_err(rtwdev, "failed to async firmware request\n");
1782 return ret;
1783 }
1784
1785 return 0;
1786 }
1787
rtw_chip_parameter_setup(struct rtw_dev * rtwdev)1788 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
1789 {
1790 const struct rtw_chip_info *chip = rtwdev->chip;
1791 struct rtw_hal *hal = &rtwdev->hal;
1792 struct rtw_efuse *efuse = &rtwdev->efuse;
1793
1794 switch (rtw_hci_type(rtwdev)) {
1795 case RTW_HCI_TYPE_PCIE:
1796 rtwdev->hci.rpwm_addr = 0x03d9;
1797 rtwdev->hci.cpwm_addr = 0x03da;
1798 break;
1799 default:
1800 rtw_err(rtwdev, "unsupported hci type\n");
1801 return -EINVAL;
1802 }
1803
1804 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
1805 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
1806 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
1807 if (hal->chip_version & BIT_RF_TYPE_ID) {
1808 hal->rf_type = RF_2T2R;
1809 hal->rf_path_num = 2;
1810 hal->antenna_tx = BB_PATH_AB;
1811 hal->antenna_rx = BB_PATH_AB;
1812 } else {
1813 hal->rf_type = RF_1T1R;
1814 hal->rf_path_num = 1;
1815 hal->antenna_tx = BB_PATH_A;
1816 hal->antenna_rx = BB_PATH_A;
1817 }
1818 hal->rf_phy_num = chip->fix_rf_phy_num ? chip->fix_rf_phy_num :
1819 hal->rf_path_num;
1820
1821 efuse->physical_size = chip->phy_efuse_size;
1822 efuse->logical_size = chip->log_efuse_size;
1823 efuse->protect_size = chip->ptct_efuse_size;
1824
1825 /* default use ack */
1826 rtwdev->hal.rcr |= BIT_VHT_DACK;
1827
1828 hal->bfee_sts_cap = 3;
1829
1830 return 0;
1831 }
1832
rtw_chip_efuse_enable(struct rtw_dev * rtwdev)1833 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
1834 {
1835 struct rtw_fw_state *fw = &rtwdev->fw;
1836 int ret;
1837
1838 ret = rtw_hci_setup(rtwdev);
1839 if (ret) {
1840 rtw_err(rtwdev, "failed to setup hci\n");
1841 goto err;
1842 }
1843
1844 ret = rtw_mac_power_on(rtwdev);
1845 if (ret) {
1846 rtw_err(rtwdev, "failed to power on mac\n");
1847 goto err;
1848 }
1849
1850 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
1851
1852 wait_for_completion(&fw->completion);
1853 if (!fw->firmware) {
1854 ret = -EINVAL;
1855 rtw_err(rtwdev, "failed to load firmware\n");
1856 goto err;
1857 }
1858
1859 ret = rtw_download_firmware(rtwdev, fw);
1860 if (ret) {
1861 rtw_err(rtwdev, "failed to download firmware\n");
1862 goto err_off;
1863 }
1864
1865 return 0;
1866
1867 err_off:
1868 rtw_mac_power_off(rtwdev);
1869
1870 err:
1871 return ret;
1872 }
1873
rtw_dump_hw_feature(struct rtw_dev * rtwdev)1874 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
1875 {
1876 struct rtw_efuse *efuse = &rtwdev->efuse;
1877 u8 hw_feature[HW_FEATURE_LEN];
1878 u8 id;
1879 u8 bw;
1880 int i;
1881
1882 id = rtw_read8(rtwdev, REG_C2HEVT);
1883 if (id != C2H_HW_FEATURE_REPORT) {
1884 rtw_err(rtwdev, "failed to read hw feature report\n");
1885 return -EBUSY;
1886 }
1887
1888 for (i = 0; i < HW_FEATURE_LEN; i++)
1889 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
1890
1891 rtw_write8(rtwdev, REG_C2HEVT, 0);
1892
1893 bw = GET_EFUSE_HW_CAP_BW(hw_feature);
1894 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
1895 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
1896 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
1897 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
1898 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
1899
1900 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
1901
1902 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||
1903 efuse->hw_cap.nss > rtwdev->hal.rf_path_num)
1904 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
1905
1906 rtw_dbg(rtwdev, RTW_DBG_EFUSE,
1907 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
1908 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
1909 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
1910
1911 return 0;
1912 }
1913
rtw_chip_efuse_disable(struct rtw_dev * rtwdev)1914 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
1915 {
1916 rtw_hci_stop(rtwdev);
1917 rtw_mac_power_off(rtwdev);
1918 }
1919
rtw_chip_efuse_info_setup(struct rtw_dev * rtwdev)1920 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
1921 {
1922 struct rtw_efuse *efuse = &rtwdev->efuse;
1923 int ret;
1924
1925 mutex_lock(&rtwdev->mutex);
1926
1927 /* power on mac to read efuse */
1928 ret = rtw_chip_efuse_enable(rtwdev);
1929 if (ret)
1930 goto out_unlock;
1931
1932 ret = rtw_parse_efuse_map(rtwdev);
1933 if (ret)
1934 goto out_disable;
1935
1936 ret = rtw_dump_hw_feature(rtwdev);
1937 if (ret)
1938 goto out_disable;
1939
1940 ret = rtw_check_supported_rfe(rtwdev);
1941 if (ret)
1942 goto out_disable;
1943
1944 if (efuse->crystal_cap == 0xff)
1945 efuse->crystal_cap = 0;
1946 if (efuse->pa_type_2g == 0xff)
1947 efuse->pa_type_2g = 0;
1948 if (efuse->pa_type_5g == 0xff)
1949 efuse->pa_type_5g = 0;
1950 if (efuse->lna_type_2g == 0xff)
1951 efuse->lna_type_2g = 0;
1952 if (efuse->lna_type_5g == 0xff)
1953 efuse->lna_type_5g = 0;
1954 if (efuse->channel_plan == 0xff)
1955 efuse->channel_plan = 0x7f;
1956 if (efuse->rf_board_option == 0xff)
1957 efuse->rf_board_option = 0;
1958 if (efuse->bt_setting & BIT(0))
1959 efuse->share_ant = true;
1960 if (efuse->regd == 0xff)
1961 efuse->regd = 0;
1962 if (efuse->tx_bb_swing_setting_2g == 0xff)
1963 efuse->tx_bb_swing_setting_2g = 0;
1964 if (efuse->tx_bb_swing_setting_5g == 0xff)
1965 efuse->tx_bb_swing_setting_5g = 0;
1966
1967 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
1968 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
1969 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
1970 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
1971 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
1972
1973 out_disable:
1974 rtw_chip_efuse_disable(rtwdev);
1975
1976 out_unlock:
1977 mutex_unlock(&rtwdev->mutex);
1978 return ret;
1979 }
1980
rtw_chip_board_info_setup(struct rtw_dev * rtwdev)1981 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
1982 {
1983 struct rtw_hal *hal = &rtwdev->hal;
1984 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
1985
1986 if (!rfe_def)
1987 return -ENODEV;
1988
1989 rtw_phy_setup_phy_cond(rtwdev, 0);
1990
1991 rtw_phy_init_tx_power(rtwdev);
1992 if (rfe_def->agc_btg_tbl)
1993 rtw_load_table(rtwdev, rfe_def->agc_btg_tbl);
1994 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
1995 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
1996 rtw_phy_tx_power_by_rate_config(hal);
1997 rtw_phy_tx_power_limit_config(hal);
1998
1999 return 0;
2000 }
2001
rtw_chip_info_setup(struct rtw_dev * rtwdev)2002 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
2003 {
2004 int ret;
2005
2006 ret = rtw_chip_parameter_setup(rtwdev);
2007 if (ret) {
2008 rtw_err(rtwdev, "failed to setup chip parameters\n");
2009 goto err_out;
2010 }
2011
2012 ret = rtw_chip_efuse_info_setup(rtwdev);
2013 if (ret) {
2014 rtw_err(rtwdev, "failed to setup chip efuse info\n");
2015 goto err_out;
2016 }
2017
2018 ret = rtw_chip_board_info_setup(rtwdev);
2019 if (ret) {
2020 rtw_err(rtwdev, "failed to setup chip board info\n");
2021 goto err_out;
2022 }
2023
2024 return 0;
2025
2026 err_out:
2027 return ret;
2028 }
2029 EXPORT_SYMBOL(rtw_chip_info_setup);
2030
rtw_stats_init(struct rtw_dev * rtwdev)2031 static void rtw_stats_init(struct rtw_dev *rtwdev)
2032 {
2033 struct rtw_traffic_stats *stats = &rtwdev->stats;
2034 struct rtw_dm_info *dm_info = &rtwdev->dm_info;
2035 int i;
2036
2037 ewma_tp_init(&stats->tx_ewma_tp);
2038 ewma_tp_init(&stats->rx_ewma_tp);
2039
2040 for (i = 0; i < RTW_EVM_NUM; i++)
2041 ewma_evm_init(&dm_info->ewma_evm[i]);
2042 for (i = 0; i < RTW_SNR_NUM; i++)
2043 ewma_snr_init(&dm_info->ewma_snr[i]);
2044 }
2045
rtw_core_init(struct rtw_dev * rtwdev)2046 int rtw_core_init(struct rtw_dev *rtwdev)
2047 {
2048 const struct rtw_chip_info *chip = rtwdev->chip;
2049 struct rtw_coex *coex = &rtwdev->coex;
2050 int ret;
2051
2052 INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
2053 INIT_LIST_HEAD(&rtwdev->txqs);
2054
2055 timer_setup(&rtwdev->tx_report.purge_timer,
2056 rtw_tx_report_purge_timer, 0);
2057 rtwdev->tx_wq = alloc_workqueue("rtw_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
2058 if (!rtwdev->tx_wq) {
2059 rtw_warn(rtwdev, "alloc_workqueue rtw_tx_wq failed\n");
2060 return -ENOMEM;
2061 }
2062
2063 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
2064 INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work);
2065 INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work);
2066 INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work);
2067 INIT_DELAYED_WORK(&coex->wl_remain_work, rtw_coex_wl_remain_work);
2068 INIT_DELAYED_WORK(&coex->bt_remain_work, rtw_coex_bt_remain_work);
2069 INIT_DELAYED_WORK(&coex->wl_connecting_work, rtw_coex_wl_connecting_work);
2070 INIT_DELAYED_WORK(&coex->bt_multi_link_remain_work,
2071 rtw_coex_bt_multi_link_remain_work);
2072 INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work);
2073 INIT_WORK(&rtwdev->tx_work, rtw_tx_work);
2074 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
2075 INIT_WORK(&rtwdev->ips_work, rtw_ips_work);
2076 INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work);
2077 INIT_WORK(&rtwdev->update_beacon_work, rtw_fw_update_beacon_work);
2078 INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work);
2079 skb_queue_head_init(&rtwdev->c2h_queue);
2080 skb_queue_head_init(&rtwdev->coex.queue);
2081 skb_queue_head_init(&rtwdev->tx_report.queue);
2082
2083 spin_lock_init(&rtwdev->rf_lock);
2084 spin_lock_init(&rtwdev->h2c.lock);
2085 spin_lock_init(&rtwdev->txq_lock);
2086 spin_lock_init(&rtwdev->tx_report.q_lock);
2087
2088 mutex_init(&rtwdev->mutex);
2089 mutex_init(&rtwdev->coex.mutex);
2090 mutex_init(&rtwdev->hal.tx_power_mutex);
2091
2092 init_waitqueue_head(&rtwdev->coex.wait);
2093 init_completion(&rtwdev->lps_leave_check);
2094 init_completion(&rtwdev->fw_scan_density);
2095
2096 rtwdev->sec.total_cam_num = 32;
2097 rtwdev->hal.current_channel = 1;
2098 rtwdev->dm_info.fix_rate = U8_MAX;
2099 set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
2100
2101 rtw_stats_init(rtwdev);
2102
2103 /* default rx filter setting */
2104 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
2105 BIT_PKTCTL_DLEN | BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
2106 BIT_AB | BIT_AM | BIT_APM;
2107
2108 ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW);
2109 if (ret) {
2110 rtw_warn(rtwdev, "no firmware loaded\n");
2111 goto out;
2112 }
2113
2114 if (chip->wow_fw_name) {
2115 ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW);
2116 if (ret) {
2117 rtw_warn(rtwdev, "no wow firmware loaded\n");
2118 wait_for_completion(&rtwdev->fw.completion);
2119 if (rtwdev->fw.firmware)
2120 release_firmware(rtwdev->fw.firmware);
2121 goto out;
2122 }
2123 }
2124
2125 return 0;
2126
2127 out:
2128 destroy_workqueue(rtwdev->tx_wq);
2129 return ret;
2130 }
2131 EXPORT_SYMBOL(rtw_core_init);
2132
rtw_core_deinit(struct rtw_dev * rtwdev)2133 void rtw_core_deinit(struct rtw_dev *rtwdev)
2134 {
2135 struct rtw_fw_state *fw = &rtwdev->fw;
2136 struct rtw_fw_state *wow_fw = &rtwdev->wow_fw;
2137 struct rtw_rsvd_page *rsvd_pkt, *tmp;
2138 unsigned long flags;
2139
2140 rtw_wait_firmware_completion(rtwdev);
2141
2142 if (fw->firmware)
2143 release_firmware(fw->firmware);
2144
2145 if (wow_fw->firmware)
2146 release_firmware(wow_fw->firmware);
2147
2148 destroy_workqueue(rtwdev->tx_wq);
2149 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
2150 skb_queue_purge(&rtwdev->tx_report.queue);
2151 skb_queue_purge(&rtwdev->coex.queue);
2152 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
2153
2154 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list,
2155 build_list) {
2156 list_del(&rsvd_pkt->build_list);
2157 kfree(rsvd_pkt);
2158 }
2159
2160 mutex_destroy(&rtwdev->mutex);
2161 mutex_destroy(&rtwdev->coex.mutex);
2162 mutex_destroy(&rtwdev->hal.tx_power_mutex);
2163 }
2164 EXPORT_SYMBOL(rtw_core_deinit);
2165
rtw_register_hw(struct rtw_dev * rtwdev,struct ieee80211_hw * hw)2166 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
2167 {
2168 struct rtw_hal *hal = &rtwdev->hal;
2169 int max_tx_headroom = 0;
2170 int ret;
2171
2172 /* TODO: USB & SDIO may need extra room? */
2173 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
2174
2175 hw->extra_tx_headroom = max_tx_headroom;
2176 hw->queues = IEEE80211_NUM_ACS;
2177 hw->txq_data_size = sizeof(struct rtw_txq);
2178 hw->sta_data_size = sizeof(struct rtw_sta_info);
2179 hw->vif_data_size = sizeof(struct rtw_vif);
2180
2181 ieee80211_hw_set(hw, SIGNAL_DBM);
2182 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
2183 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
2184 ieee80211_hw_set(hw, MFP_CAPABLE);
2185 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
2186 ieee80211_hw_set(hw, SUPPORTS_PS);
2187 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
2188 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
2189 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
2190 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
2191 ieee80211_hw_set(hw, TX_AMSDU);
2192 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
2193
2194 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
2195 BIT(NL80211_IFTYPE_AP) |
2196 BIT(NL80211_IFTYPE_ADHOC) |
2197 BIT(NL80211_IFTYPE_MESH_POINT);
2198 hw->wiphy->available_antennas_tx = hal->antenna_tx;
2199 hw->wiphy->available_antennas_rx = hal->antenna_rx;
2200
2201 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
2202 WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
2203
2204 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
2205 hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS;
2206 hw->wiphy->max_scan_ie_len = rtw_get_max_scan_ie_len(rtwdev);
2207
2208 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
2209 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN);
2210 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
2211
2212 #ifdef CONFIG_PM
2213 hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;
2214 hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids;
2215 #endif
2216 rtw_set_supported_band(hw, rtwdev->chip);
2217 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
2218
2219 hw->wiphy->sar_capa = &rtw_sar_capa;
2220
2221 ret = rtw_regd_init(rtwdev);
2222 if (ret) {
2223 rtw_err(rtwdev, "failed to init regd\n");
2224 return ret;
2225 }
2226
2227 ret = ieee80211_register_hw(hw);
2228 if (ret) {
2229 rtw_err(rtwdev, "failed to register hw\n");
2230 return ret;
2231 }
2232
2233 ret = rtw_regd_hint(rtwdev);
2234 if (ret) {
2235 rtw_err(rtwdev, "failed to hint regd\n");
2236 return ret;
2237 }
2238
2239 rtw_debugfs_init(rtwdev);
2240
2241 rtwdev->bf_info.bfer_mu_cnt = 0;
2242 rtwdev->bf_info.bfer_su_cnt = 0;
2243
2244 return 0;
2245 }
2246 EXPORT_SYMBOL(rtw_register_hw);
2247
rtw_unregister_hw(struct rtw_dev * rtwdev,struct ieee80211_hw * hw)2248 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
2249 {
2250 const struct rtw_chip_info *chip = rtwdev->chip;
2251
2252 ieee80211_unregister_hw(hw);
2253 rtw_unset_supported_band(hw, chip);
2254 }
2255 EXPORT_SYMBOL(rtw_unregister_hw);
2256
2257 MODULE_AUTHOR("Realtek Corporation");
2258 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
2259 MODULE_LICENSE("Dual BSD/GPL");
2260