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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Driver for the MMC / SD / SDIO IP found in:
4  *
5  * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
6  *
7  * Copyright (C) 2015-19 Renesas Electronics Corporation
8  * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
9  * Copyright (C) 2017 Horms Solutions, Simon Horman
10  * Copyright (C) 2011 Guennadi Liakhovetski
11  * Copyright (C) 2007 Ian Molton
12  * Copyright (C) 2004 Ian Molton
13  *
14  * This driver draws mainly on scattered spec sheets, Reverse engineering
15  * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16  * support). (Further 4 bit support from a later datasheet).
17  *
18  * TODO:
19  *   Investigate using a workqueue for PIO transfers
20  *   Eliminate FIXMEs
21  *   Better Power management
22  *   Handle MMC errors better
23  *   double buffer support
24  *
25  */
26 
27 #include <linux/delay.h>
28 #include <linux/device.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/highmem.h>
31 #include <linux/interrupt.h>
32 #include <linux/io.h>
33 #include <linux/irq.h>
34 #include <linux/mfd/tmio.h>
35 #include <linux/mmc/card.h>
36 #include <linux/mmc/host.h>
37 #include <linux/mmc/mmc.h>
38 #include <linux/mmc/slot-gpio.h>
39 #include <linux/module.h>
40 #include <linux/pagemap.h>
41 #include <linux/platform_device.h>
42 #include <linux/pm_qos.h>
43 #include <linux/pm_runtime.h>
44 #include <linux/regulator/consumer.h>
45 #include <linux/mmc/sdio.h>
46 #include <linux/scatterlist.h>
47 #include <linux/sizes.h>
48 #include <linux/spinlock.h>
49 #include <linux/workqueue.h>
50 
51 #include "tmio_mmc.h"
52 
tmio_mmc_start_dma(struct tmio_mmc_host * host,struct mmc_data * data)53 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
54 				      struct mmc_data *data)
55 {
56 	if (host->dma_ops)
57 		host->dma_ops->start(host, data);
58 }
59 
tmio_mmc_end_dma(struct tmio_mmc_host * host)60 static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host)
61 {
62 	if (host->dma_ops && host->dma_ops->end)
63 		host->dma_ops->end(host);
64 }
65 
tmio_mmc_enable_dma(struct tmio_mmc_host * host,bool enable)66 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
67 {
68 	if (host->dma_ops)
69 		host->dma_ops->enable(host, enable);
70 }
71 
tmio_mmc_request_dma(struct tmio_mmc_host * host,struct tmio_mmc_data * pdata)72 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
73 					struct tmio_mmc_data *pdata)
74 {
75 	if (host->dma_ops) {
76 		host->dma_ops->request(host, pdata);
77 	} else {
78 		host->chan_tx = NULL;
79 		host->chan_rx = NULL;
80 	}
81 }
82 
tmio_mmc_release_dma(struct tmio_mmc_host * host)83 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
84 {
85 	if (host->dma_ops)
86 		host->dma_ops->release(host);
87 }
88 
tmio_mmc_abort_dma(struct tmio_mmc_host * host)89 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
90 {
91 	if (host->dma_ops)
92 		host->dma_ops->abort(host);
93 }
94 
tmio_mmc_dataend_dma(struct tmio_mmc_host * host)95 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
96 {
97 	if (host->dma_ops)
98 		host->dma_ops->dataend(host);
99 }
100 
tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host * host,u32 i)101 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
102 {
103 	host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
104 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
105 }
106 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
107 
tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host * host,u32 i)108 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
109 {
110 	host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
111 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
112 }
113 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
114 
tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host * host,u32 i)115 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
116 {
117 	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
118 }
119 
tmio_mmc_init_sg(struct tmio_mmc_host * host,struct mmc_data * data)120 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
121 {
122 	host->sg_len = data->sg_len;
123 	host->sg_ptr = data->sg;
124 	host->sg_orig = data->sg;
125 	host->sg_off = 0;
126 }
127 
tmio_mmc_next_sg(struct tmio_mmc_host * host)128 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
129 {
130 	host->sg_ptr = sg_next(host->sg_ptr);
131 	host->sg_off = 0;
132 	return --host->sg_len;
133 }
134 
135 #define CMDREQ_TIMEOUT	5000
136 
tmio_mmc_enable_sdio_irq(struct mmc_host * mmc,int enable)137 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
138 {
139 	struct tmio_mmc_host *host = mmc_priv(mmc);
140 
141 	if (enable && !host->sdio_irq_enabled) {
142 		u16 sdio_status;
143 
144 		/* Keep device active while SDIO irq is enabled */
145 		pm_runtime_get_sync(mmc_dev(mmc));
146 
147 		host->sdio_irq_enabled = true;
148 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
149 
150 		/* Clear obsolete interrupts before enabling */
151 		sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
152 		if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
153 			sdio_status |= TMIO_SDIO_SETBITS_MASK;
154 		sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
155 
156 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
157 	} else if (!enable && host->sdio_irq_enabled) {
158 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
159 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
160 
161 		host->sdio_irq_enabled = false;
162 		pm_runtime_mark_last_busy(mmc_dev(mmc));
163 		pm_runtime_put_autosuspend(mmc_dev(mmc));
164 	}
165 }
166 
tmio_mmc_set_bus_width(struct tmio_mmc_host * host,unsigned char bus_width)167 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
168 				   unsigned char bus_width)
169 {
170 	u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
171 				& ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
172 
173 	/* reg now applies to MMC_BUS_WIDTH_4 */
174 	if (bus_width == MMC_BUS_WIDTH_1)
175 		reg |= CARD_OPT_WIDTH;
176 	else if (bus_width == MMC_BUS_WIDTH_8)
177 		reg |= CARD_OPT_WIDTH8;
178 
179 	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
180 }
181 
tmio_mmc_reset(struct tmio_mmc_host * host,bool preserve)182 static void tmio_mmc_reset(struct tmio_mmc_host *host, bool preserve)
183 {
184 	u16 card_opt, clk_ctrl, sdif_mode;
185 
186 	if (preserve) {
187 		card_opt = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
188 		clk_ctrl = sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL);
189 		if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
190 			sdif_mode = sd_ctrl_read16(host, CTL_SDIF_MODE);
191 	}
192 
193 	/* FIXME - should we set stop clock reg here */
194 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
195 	usleep_range(10000, 11000);
196 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
197 	usleep_range(10000, 11000);
198 
199 	tmio_mmc_abort_dma(host);
200 
201 	if (host->reset)
202 		host->reset(host, preserve);
203 
204 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);
205 	host->sdcard_irq_mask = host->sdcard_irq_mask_all;
206 
207 	if (host->native_hotplug)
208 		tmio_mmc_enable_mmc_irqs(host,
209 				TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
210 
211 	tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width);
212 
213 	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
214 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
215 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
216 	}
217 
218 	if (preserve) {
219 		sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, card_opt);
220 		sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk_ctrl);
221 		if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
222 			sd_ctrl_write16(host, CTL_SDIF_MODE, sdif_mode);
223 	}
224 
225 	if (host->mmc->card)
226 		mmc_retune_needed(host->mmc);
227 }
228 
tmio_mmc_reset_work(struct work_struct * work)229 static void tmio_mmc_reset_work(struct work_struct *work)
230 {
231 	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
232 						  delayed_reset_work.work);
233 	struct mmc_request *mrq;
234 	unsigned long flags;
235 
236 	spin_lock_irqsave(&host->lock, flags);
237 	mrq = host->mrq;
238 
239 	/*
240 	 * is request already finished? Since we use a non-blocking
241 	 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
242 	 * us, so, have to check for IS_ERR(host->mrq)
243 	 */
244 	if (IS_ERR_OR_NULL(mrq) ||
245 	    time_is_after_jiffies(host->last_req_ts +
246 				  msecs_to_jiffies(CMDREQ_TIMEOUT))) {
247 		spin_unlock_irqrestore(&host->lock, flags);
248 		return;
249 	}
250 
251 	dev_warn(&host->pdev->dev,
252 		 "timeout waiting for hardware interrupt (CMD%u)\n",
253 		 mrq->cmd->opcode);
254 
255 	if (host->data)
256 		host->data->error = -ETIMEDOUT;
257 	else if (host->cmd)
258 		host->cmd->error = -ETIMEDOUT;
259 	else
260 		mrq->cmd->error = -ETIMEDOUT;
261 
262 	host->cmd = NULL;
263 	host->data = NULL;
264 
265 	spin_unlock_irqrestore(&host->lock, flags);
266 
267 	tmio_mmc_reset(host, true);
268 
269 	/* Ready for new calls */
270 	host->mrq = NULL;
271 	mmc_request_done(host->mmc, mrq);
272 }
273 
274 /* These are the bitmasks the tmio chip requires to implement the MMC response
275  * types. Note that R1 and R6 are the same in this scheme. */
276 #define APP_CMD        0x0040
277 #define RESP_NONE      0x0300
278 #define RESP_R1        0x0400
279 #define RESP_R1B       0x0500
280 #define RESP_R2        0x0600
281 #define RESP_R3        0x0700
282 #define DATA_PRESENT   0x0800
283 #define TRANSFER_READ  0x1000
284 #define TRANSFER_MULTI 0x2000
285 #define SECURITY_CMD   0x4000
286 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
287 
tmio_mmc_start_command(struct tmio_mmc_host * host,struct mmc_command * cmd)288 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
289 				  struct mmc_command *cmd)
290 {
291 	struct mmc_data *data = host->data;
292 	int c = cmd->opcode;
293 
294 	switch (mmc_resp_type(cmd)) {
295 	case MMC_RSP_NONE: c |= RESP_NONE; break;
296 	case MMC_RSP_R1:
297 	case MMC_RSP_R1_NO_CRC:
298 			   c |= RESP_R1;   break;
299 	case MMC_RSP_R1B:  c |= RESP_R1B;  break;
300 	case MMC_RSP_R2:   c |= RESP_R2;   break;
301 	case MMC_RSP_R3:   c |= RESP_R3;   break;
302 	default:
303 		pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
304 		return -EINVAL;
305 	}
306 
307 	host->cmd = cmd;
308 
309 /* FIXME - this seems to be ok commented out but the spec suggest this bit
310  *         should be set when issuing app commands.
311  *	if(cmd->flags & MMC_FLAG_ACMD)
312  *		c |= APP_CMD;
313  */
314 	if (data) {
315 		c |= DATA_PRESENT;
316 		if (data->blocks > 1) {
317 			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
318 			c |= TRANSFER_MULTI;
319 
320 			/*
321 			 * Disable auto CMD12 at IO_RW_EXTENDED and
322 			 * SET_BLOCK_COUNT when doing multiple block transfer
323 			 */
324 			if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
325 			    (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
326 				c |= NO_CMD12_ISSUE;
327 		}
328 		if (data->flags & MMC_DATA_READ)
329 			c |= TRANSFER_READ;
330 	}
331 
332 	tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
333 
334 	/* Fire off the command */
335 	sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
336 	sd_ctrl_write16(host, CTL_SD_CMD, c);
337 
338 	return 0;
339 }
340 
tmio_mmc_transfer_data(struct tmio_mmc_host * host,unsigned short * buf,unsigned int count)341 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
342 				   unsigned short *buf,
343 				   unsigned int count)
344 {
345 	int is_read = host->data->flags & MMC_DATA_READ;
346 	u8  *buf8;
347 
348 	/*
349 	 * Transfer the data
350 	 */
351 	if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
352 		u32 data = 0;
353 		u32 *buf32 = (u32 *)buf;
354 
355 		if (is_read)
356 			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
357 					   count >> 2);
358 		else
359 			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
360 					    count >> 2);
361 
362 		/* if count was multiple of 4 */
363 		if (!(count & 0x3))
364 			return;
365 
366 		buf32 += count >> 2;
367 		count %= 4;
368 
369 		if (is_read) {
370 			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
371 			memcpy(buf32, &data, count);
372 		} else {
373 			memcpy(&data, buf32, count);
374 			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
375 		}
376 
377 		return;
378 	}
379 
380 	if (is_read)
381 		sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
382 	else
383 		sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
384 
385 	/* if count was even number */
386 	if (!(count & 0x1))
387 		return;
388 
389 	/* if count was odd number */
390 	buf8 = (u8 *)(buf + (count >> 1));
391 
392 	/*
393 	 * FIXME
394 	 *
395 	 * driver and this function are assuming that
396 	 * it is used as little endian
397 	 */
398 	if (is_read)
399 		*buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
400 	else
401 		sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
402 }
403 
404 /*
405  * This chip always returns (at least?) as much data as you ask for.
406  * I'm unsure what happens if you ask for less than a block. This should be
407  * looked into to ensure that a funny length read doesn't hose the controller.
408  */
tmio_mmc_pio_irq(struct tmio_mmc_host * host)409 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
410 {
411 	struct mmc_data *data = host->data;
412 	void *sg_virt;
413 	unsigned short *buf;
414 	unsigned int count;
415 	unsigned long flags;
416 
417 	if (host->dma_on) {
418 		pr_err("PIO IRQ in DMA mode!\n");
419 		return;
420 	} else if (!data) {
421 		pr_debug("Spurious PIO IRQ\n");
422 		return;
423 	}
424 
425 	sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
426 	buf = (unsigned short *)(sg_virt + host->sg_off);
427 
428 	count = host->sg_ptr->length - host->sg_off;
429 	if (count > data->blksz)
430 		count = data->blksz;
431 
432 	pr_debug("count: %08x offset: %08x flags %08x\n",
433 		 count, host->sg_off, data->flags);
434 
435 	/* Transfer the data */
436 	tmio_mmc_transfer_data(host, buf, count);
437 
438 	host->sg_off += count;
439 
440 	tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
441 
442 	if (host->sg_off == host->sg_ptr->length)
443 		tmio_mmc_next_sg(host);
444 }
445 
tmio_mmc_check_bounce_buffer(struct tmio_mmc_host * host)446 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
447 {
448 	if (host->sg_ptr == &host->bounce_sg) {
449 		unsigned long flags;
450 		void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
451 
452 		memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
453 		tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
454 	}
455 }
456 
457 /* needs to be called with host->lock held */
tmio_mmc_do_data_irq(struct tmio_mmc_host * host)458 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
459 {
460 	struct mmc_data *data = host->data;
461 	struct mmc_command *stop;
462 
463 	host->data = NULL;
464 
465 	if (!data) {
466 		dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
467 		return;
468 	}
469 	stop = data->stop;
470 
471 	/* FIXME - return correct transfer count on errors */
472 	if (!data->error)
473 		data->bytes_xfered = data->blocks * data->blksz;
474 	else
475 		data->bytes_xfered = 0;
476 
477 	pr_debug("Completed data request\n");
478 
479 	/*
480 	 * FIXME: other drivers allow an optional stop command of any given type
481 	 *        which we dont do, as the chip can auto generate them.
482 	 *        Perhaps we can be smarter about when to use auto CMD12 and
483 	 *        only issue the auto request when we know this is the desired
484 	 *        stop command, allowing fallback to the stop command the
485 	 *        upper layers expect. For now, we do what works.
486 	 */
487 
488 	if (data->flags & MMC_DATA_READ) {
489 		if (host->dma_on)
490 			tmio_mmc_check_bounce_buffer(host);
491 		dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
492 			host->mrq);
493 	} else {
494 		dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
495 			host->mrq);
496 	}
497 
498 	if (stop && !host->mrq->sbc) {
499 		if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
500 			dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
501 				stop->opcode, stop->arg);
502 
503 		/* fill in response from auto CMD12 */
504 		stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
505 
506 		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
507 	}
508 
509 	schedule_work(&host->done);
510 }
511 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
512 
tmio_mmc_data_irq(struct tmio_mmc_host * host,unsigned int stat)513 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
514 {
515 	struct mmc_data *data;
516 
517 	spin_lock(&host->lock);
518 	data = host->data;
519 
520 	if (!data)
521 		goto out;
522 
523 	if (stat & TMIO_STAT_DATATIMEOUT)
524 		data->error = -ETIMEDOUT;
525 	else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
526 		 stat & TMIO_STAT_TXUNDERRUN)
527 		data->error = -EILSEQ;
528 	if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
529 		u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
530 		bool done = false;
531 
532 		/*
533 		 * Has all data been written out yet? Testing on SuperH showed,
534 		 * that in most cases the first interrupt comes already with the
535 		 * BUSY status bit clear, but on some operations, like mount or
536 		 * in the beginning of a write / sync / umount, there is one
537 		 * DATAEND interrupt with the BUSY bit set, in this cases
538 		 * waiting for one more interrupt fixes the problem.
539 		 */
540 		if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
541 			if (status & TMIO_STAT_SCLKDIVEN)
542 				done = true;
543 		} else {
544 			if (!(status & TMIO_STAT_CMD_BUSY))
545 				done = true;
546 		}
547 
548 		if (done) {
549 			tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
550 			tmio_mmc_dataend_dma(host);
551 		}
552 	} else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
553 		tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
554 		tmio_mmc_dataend_dma(host);
555 	} else {
556 		tmio_mmc_do_data_irq(host);
557 		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
558 	}
559 out:
560 	spin_unlock(&host->lock);
561 }
562 
tmio_mmc_cmd_irq(struct tmio_mmc_host * host,unsigned int stat)563 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
564 {
565 	struct mmc_command *cmd = host->cmd;
566 	int i, addr;
567 
568 	spin_lock(&host->lock);
569 
570 	if (!host->cmd) {
571 		pr_debug("Spurious CMD irq\n");
572 		goto out;
573 	}
574 
575 	/* This controller is sicker than the PXA one. Not only do we need to
576 	 * drop the top 8 bits of the first response word, we also need to
577 	 * modify the order of the response for short response command types.
578 	 */
579 
580 	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
581 		cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
582 
583 	if (cmd->flags &  MMC_RSP_136) {
584 		cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
585 		cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
586 		cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
587 		cmd->resp[3] <<= 8;
588 	} else if (cmd->flags & MMC_RSP_R3) {
589 		cmd->resp[0] = cmd->resp[3];
590 	}
591 
592 	if (stat & TMIO_STAT_CMDTIMEOUT)
593 		cmd->error = -ETIMEDOUT;
594 	else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
595 		 stat & TMIO_STAT_STOPBIT_ERR ||
596 		 stat & TMIO_STAT_CMD_IDX_ERR)
597 		cmd->error = -EILSEQ;
598 
599 	/* If there is data to handle we enable data IRQs here, and
600 	 * we will ultimatley finish the request in the data_end handler.
601 	 * If theres no data or we encountered an error, finish now.
602 	 */
603 	if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
604 		if (host->data->flags & MMC_DATA_READ) {
605 			if (!host->dma_on) {
606 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
607 			} else {
608 				tmio_mmc_disable_mmc_irqs(host,
609 							  TMIO_MASK_READOP);
610 				tasklet_schedule(&host->dma_issue);
611 			}
612 		} else {
613 			if (!host->dma_on) {
614 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
615 			} else {
616 				tmio_mmc_disable_mmc_irqs(host,
617 							  TMIO_MASK_WRITEOP);
618 				tasklet_schedule(&host->dma_issue);
619 			}
620 		}
621 	} else {
622 		schedule_work(&host->done);
623 	}
624 
625 out:
626 	spin_unlock(&host->lock);
627 }
628 
__tmio_mmc_card_detect_irq(struct tmio_mmc_host * host,int ireg,int status)629 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
630 				       int ireg, int status)
631 {
632 	struct mmc_host *mmc = host->mmc;
633 
634 	/* Card insert / remove attempts */
635 	if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
636 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
637 			TMIO_STAT_CARD_REMOVE);
638 		if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
639 		     ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
640 		    !work_pending(&mmc->detect.work))
641 			mmc_detect_change(host->mmc, msecs_to_jiffies(100));
642 		return true;
643 	}
644 
645 	return false;
646 }
647 
__tmio_mmc_sdcard_irq(struct tmio_mmc_host * host,int ireg,int status)648 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
649 				  int status)
650 {
651 	/* Command completion */
652 	if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
653 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
654 				      TMIO_STAT_CMDTIMEOUT);
655 		tmio_mmc_cmd_irq(host, status);
656 		return true;
657 	}
658 
659 	/* Data transfer */
660 	if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
661 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
662 		tmio_mmc_pio_irq(host);
663 		return true;
664 	}
665 
666 	/* Data transfer completion */
667 	if (ireg & TMIO_STAT_DATAEND) {
668 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
669 		tmio_mmc_data_irq(host, status);
670 		return true;
671 	}
672 
673 	return false;
674 }
675 
__tmio_mmc_sdio_irq(struct tmio_mmc_host * host)676 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
677 {
678 	struct mmc_host *mmc = host->mmc;
679 	struct tmio_mmc_data *pdata = host->pdata;
680 	unsigned int ireg, status;
681 	unsigned int sdio_status;
682 
683 	if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
684 		return false;
685 
686 	status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
687 	ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
688 
689 	sdio_status = status & ~TMIO_SDIO_MASK_ALL;
690 	if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
691 		sdio_status |= TMIO_SDIO_SETBITS_MASK;
692 
693 	sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
694 
695 	if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
696 		mmc_signal_sdio_irq(mmc);
697 
698 	return ireg;
699 }
700 
tmio_mmc_irq(int irq,void * devid)701 irqreturn_t tmio_mmc_irq(int irq, void *devid)
702 {
703 	struct tmio_mmc_host *host = devid;
704 	unsigned int ireg, status;
705 
706 	status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
707 	ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
708 
709 	/* Clear the status except the interrupt status */
710 	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
711 
712 	if (__tmio_mmc_card_detect_irq(host, ireg, status))
713 		return IRQ_HANDLED;
714 	if (__tmio_mmc_sdcard_irq(host, ireg, status))
715 		return IRQ_HANDLED;
716 
717 	if (__tmio_mmc_sdio_irq(host))
718 		return IRQ_HANDLED;
719 
720 	return IRQ_NONE;
721 }
722 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
723 
tmio_mmc_start_data(struct tmio_mmc_host * host,struct mmc_data * data)724 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
725 			       struct mmc_data *data)
726 {
727 	struct tmio_mmc_data *pdata = host->pdata;
728 
729 	pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
730 		 data->blksz, data->blocks);
731 
732 	/* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
733 	if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
734 	    host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
735 		int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
736 
737 		if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
738 			pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
739 			       mmc_hostname(host->mmc), data->blksz);
740 			return -EINVAL;
741 		}
742 	}
743 
744 	tmio_mmc_init_sg(host, data);
745 	host->data = data;
746 	host->dma_on = false;
747 
748 	/* Set transfer length / blocksize */
749 	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
750 	if (host->mmc->max_blk_count >= SZ_64K)
751 		sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
752 	else
753 		sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
754 
755 	tmio_mmc_start_dma(host, data);
756 
757 	return 0;
758 }
759 
tmio_process_mrq(struct tmio_mmc_host * host,struct mmc_request * mrq)760 static void tmio_process_mrq(struct tmio_mmc_host *host,
761 			     struct mmc_request *mrq)
762 {
763 	struct mmc_command *cmd;
764 	int ret;
765 
766 	if (mrq->sbc && host->cmd != mrq->sbc) {
767 		cmd = mrq->sbc;
768 	} else {
769 		cmd = mrq->cmd;
770 		if (mrq->data) {
771 			ret = tmio_mmc_start_data(host, mrq->data);
772 			if (ret)
773 				goto fail;
774 		}
775 	}
776 
777 	ret = tmio_mmc_start_command(host, cmd);
778 	if (ret)
779 		goto fail;
780 
781 	schedule_delayed_work(&host->delayed_reset_work,
782 			      msecs_to_jiffies(CMDREQ_TIMEOUT));
783 	return;
784 
785 fail:
786 	host->mrq = NULL;
787 	mrq->cmd->error = ret;
788 	mmc_request_done(host->mmc, mrq);
789 }
790 
791 /* Process requests from the MMC layer */
tmio_mmc_request(struct mmc_host * mmc,struct mmc_request * mrq)792 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
793 {
794 	struct tmio_mmc_host *host = mmc_priv(mmc);
795 	unsigned long flags;
796 
797 	spin_lock_irqsave(&host->lock, flags);
798 
799 	if (host->mrq) {
800 		pr_debug("request not null\n");
801 		if (IS_ERR(host->mrq)) {
802 			spin_unlock_irqrestore(&host->lock, flags);
803 			mrq->cmd->error = -EAGAIN;
804 			mmc_request_done(mmc, mrq);
805 			return;
806 		}
807 	}
808 
809 	host->last_req_ts = jiffies;
810 	wmb();
811 	host->mrq = mrq;
812 
813 	spin_unlock_irqrestore(&host->lock, flags);
814 
815 	tmio_process_mrq(host, mrq);
816 }
817 
tmio_mmc_finish_request(struct tmio_mmc_host * host)818 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
819 {
820 	struct mmc_request *mrq;
821 	unsigned long flags;
822 
823 	spin_lock_irqsave(&host->lock, flags);
824 
825 	tmio_mmc_end_dma(host);
826 
827 	mrq = host->mrq;
828 	if (IS_ERR_OR_NULL(mrq)) {
829 		spin_unlock_irqrestore(&host->lock, flags);
830 		return;
831 	}
832 
833 	/* If not SET_BLOCK_COUNT, clear old data */
834 	if (host->cmd != mrq->sbc) {
835 		host->cmd = NULL;
836 		host->data = NULL;
837 		host->mrq = NULL;
838 	}
839 
840 	cancel_delayed_work(&host->delayed_reset_work);
841 
842 	spin_unlock_irqrestore(&host->lock, flags);
843 
844 	if (mrq->cmd->error || (mrq->data && mrq->data->error)) {
845 		tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ); /* Clear all */
846 		tmio_mmc_abort_dma(host);
847 	}
848 
849 	/* Error means retune, but executed command was still successful */
850 	if (host->check_retune && host->check_retune(host, mrq))
851 		mmc_retune_needed(host->mmc);
852 
853 	/* If SET_BLOCK_COUNT, continue with main command */
854 	if (host->mrq && !mrq->cmd->error) {
855 		tmio_process_mrq(host, mrq);
856 		return;
857 	}
858 
859 	if (host->fixup_request)
860 		host->fixup_request(host, mrq);
861 
862 	mmc_request_done(host->mmc, mrq);
863 }
864 
tmio_mmc_done_work(struct work_struct * work)865 static void tmio_mmc_done_work(struct work_struct *work)
866 {
867 	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
868 						  done);
869 	tmio_mmc_finish_request(host);
870 }
871 
tmio_mmc_power_on(struct tmio_mmc_host * host,unsigned short vdd)872 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
873 {
874 	struct mmc_host *mmc = host->mmc;
875 	int ret = 0;
876 
877 	/* .set_ios() is returning void, so, no chance to report an error */
878 
879 	if (host->set_pwr)
880 		host->set_pwr(host->pdev, 1);
881 
882 	if (!IS_ERR(mmc->supply.vmmc)) {
883 		ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
884 		/*
885 		 * Attention: empiric value. With a b43 WiFi SDIO card this
886 		 * delay proved necessary for reliable card-insertion probing.
887 		 * 100us were not enough. Is this the same 140us delay, as in
888 		 * tmio_mmc_set_ios()?
889 		 */
890 		usleep_range(200, 300);
891 	}
892 	/*
893 	 * It seems, VccQ should be switched on after Vcc, this is also what the
894 	 * omap_hsmmc.c driver does.
895 	 */
896 	if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
897 		ret = regulator_enable(mmc->supply.vqmmc);
898 		usleep_range(200, 300);
899 	}
900 
901 	if (ret < 0)
902 		dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
903 			ret);
904 }
905 
tmio_mmc_power_off(struct tmio_mmc_host * host)906 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
907 {
908 	struct mmc_host *mmc = host->mmc;
909 
910 	if (!IS_ERR(mmc->supply.vqmmc))
911 		regulator_disable(mmc->supply.vqmmc);
912 
913 	if (!IS_ERR(mmc->supply.vmmc))
914 		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
915 
916 	if (host->set_pwr)
917 		host->set_pwr(host->pdev, 0);
918 }
919 
tmio_mmc_get_timeout_cycles(struct tmio_mmc_host * host)920 static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host)
921 {
922 	u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
923 
924 	val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
925 	return 1 << (13 + val);
926 }
927 
tmio_mmc_max_busy_timeout(struct tmio_mmc_host * host)928 static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
929 {
930 	unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
931 
932 	host->mmc->max_busy_timeout = host->get_timeout_cycles(host) /
933 				      (clk_rate / MSEC_PER_SEC);
934 }
935 
936 /* Set MMC clock / power.
937  * Note: This controller uses a simple divider scheme therefore it cannot
938  * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
939  * MMC wont run that fast, it has to be clocked at 12MHz which is the next
940  * slowest setting.
941  */
tmio_mmc_set_ios(struct mmc_host * mmc,struct mmc_ios * ios)942 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
943 {
944 	struct tmio_mmc_host *host = mmc_priv(mmc);
945 	struct device *dev = &host->pdev->dev;
946 	unsigned long flags;
947 
948 	mutex_lock(&host->ios_lock);
949 
950 	spin_lock_irqsave(&host->lock, flags);
951 	if (host->mrq) {
952 		if (IS_ERR(host->mrq)) {
953 			dev_dbg(dev,
954 				"%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
955 				current->comm, task_pid_nr(current),
956 				ios->clock, ios->power_mode);
957 			host->mrq = ERR_PTR(-EINTR);
958 		} else {
959 			dev_dbg(dev,
960 				"%s.%d: CMD%u active since %lu, now %lu!\n",
961 				current->comm, task_pid_nr(current),
962 				host->mrq->cmd->opcode, host->last_req_ts,
963 				jiffies);
964 		}
965 		spin_unlock_irqrestore(&host->lock, flags);
966 
967 		mutex_unlock(&host->ios_lock);
968 		return;
969 	}
970 
971 	host->mrq = ERR_PTR(-EBUSY);
972 
973 	spin_unlock_irqrestore(&host->lock, flags);
974 
975 	switch (ios->power_mode) {
976 	case MMC_POWER_OFF:
977 		tmio_mmc_power_off(host);
978 		/* For R-Car Gen2+, we need to reset SDHI specific SCC */
979 		if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
980 			tmio_mmc_reset(host, false);
981 
982 		host->set_clock(host, 0);
983 		break;
984 	case MMC_POWER_UP:
985 		tmio_mmc_power_on(host, ios->vdd);
986 		host->set_clock(host, ios->clock);
987 		tmio_mmc_set_bus_width(host, ios->bus_width);
988 		break;
989 	case MMC_POWER_ON:
990 		host->set_clock(host, ios->clock);
991 		tmio_mmc_set_bus_width(host, ios->bus_width);
992 		break;
993 	}
994 
995 	if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT)
996 		tmio_mmc_max_busy_timeout(host);
997 
998 	/* Let things settle. delay taken from winCE driver */
999 	usleep_range(140, 200);
1000 	if (PTR_ERR(host->mrq) == -EINTR)
1001 		dev_dbg(&host->pdev->dev,
1002 			"%s.%d: IOS interrupted: clk %u, mode %u",
1003 			current->comm, task_pid_nr(current),
1004 			ios->clock, ios->power_mode);
1005 	host->mrq = NULL;
1006 
1007 	host->clk_cache = ios->clock;
1008 
1009 	mutex_unlock(&host->ios_lock);
1010 }
1011 
tmio_mmc_get_ro(struct mmc_host * mmc)1012 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1013 {
1014 	struct tmio_mmc_host *host = mmc_priv(mmc);
1015 
1016 	return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1017 		 TMIO_STAT_WRPROTECT);
1018 }
1019 
tmio_mmc_get_cd(struct mmc_host * mmc)1020 static int tmio_mmc_get_cd(struct mmc_host *mmc)
1021 {
1022 	struct tmio_mmc_host *host = mmc_priv(mmc);
1023 
1024 	return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1025 		  TMIO_STAT_SIGSTATE);
1026 }
1027 
tmio_multi_io_quirk(struct mmc_card * card,unsigned int direction,int blk_size)1028 static int tmio_multi_io_quirk(struct mmc_card *card,
1029 			       unsigned int direction, int blk_size)
1030 {
1031 	struct tmio_mmc_host *host = mmc_priv(card->host);
1032 
1033 	if (host->multi_io_quirk)
1034 		return host->multi_io_quirk(card, direction, blk_size);
1035 
1036 	return blk_size;
1037 }
1038 
1039 static struct mmc_host_ops tmio_mmc_ops = {
1040 	.request	= tmio_mmc_request,
1041 	.set_ios	= tmio_mmc_set_ios,
1042 	.get_ro         = tmio_mmc_get_ro,
1043 	.get_cd		= tmio_mmc_get_cd,
1044 	.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1045 	.multi_io_quirk	= tmio_multi_io_quirk,
1046 };
1047 
tmio_mmc_init_ocr(struct tmio_mmc_host * host)1048 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1049 {
1050 	struct tmio_mmc_data *pdata = host->pdata;
1051 	struct mmc_host *mmc = host->mmc;
1052 	int err;
1053 
1054 	err = mmc_regulator_get_supply(mmc);
1055 	if (err)
1056 		return err;
1057 
1058 	/* use ocr_mask if no regulator */
1059 	if (!mmc->ocr_avail)
1060 		mmc->ocr_avail = pdata->ocr_mask;
1061 
1062 	/*
1063 	 * try again.
1064 	 * There is possibility that regulator has not been probed
1065 	 */
1066 	if (!mmc->ocr_avail)
1067 		return -EPROBE_DEFER;
1068 
1069 	return 0;
1070 }
1071 
tmio_mmc_of_parse(struct platform_device * pdev,struct mmc_host * mmc)1072 static void tmio_mmc_of_parse(struct platform_device *pdev,
1073 			      struct mmc_host *mmc)
1074 {
1075 	const struct device_node *np = pdev->dev.of_node;
1076 
1077 	if (!np)
1078 		return;
1079 
1080 	/*
1081 	 * DEPRECATED:
1082 	 * For new platforms, please use "disable-wp" instead of
1083 	 * "toshiba,mmc-wrprotect-disable"
1084 	 */
1085 	if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1086 		mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1087 }
1088 
tmio_mmc_host_alloc(struct platform_device * pdev,struct tmio_mmc_data * pdata)1089 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1090 					  struct tmio_mmc_data *pdata)
1091 {
1092 	struct tmio_mmc_host *host;
1093 	struct mmc_host *mmc;
1094 	void __iomem *ctl;
1095 	int ret;
1096 
1097 	ctl = devm_platform_ioremap_resource(pdev, 0);
1098 	if (IS_ERR(ctl))
1099 		return ERR_CAST(ctl);
1100 
1101 	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1102 	if (!mmc)
1103 		return ERR_PTR(-ENOMEM);
1104 
1105 	host = mmc_priv(mmc);
1106 	host->ctl = ctl;
1107 	host->mmc = mmc;
1108 	host->pdev = pdev;
1109 	host->pdata = pdata;
1110 	host->ops = tmio_mmc_ops;
1111 	mmc->ops = &host->ops;
1112 
1113 	ret = mmc_of_parse(host->mmc);
1114 	if (ret) {
1115 		host = ERR_PTR(ret);
1116 		goto free;
1117 	}
1118 
1119 	tmio_mmc_of_parse(pdev, mmc);
1120 
1121 	platform_set_drvdata(pdev, host);
1122 
1123 	return host;
1124 free:
1125 	mmc_free_host(mmc);
1126 
1127 	return host;
1128 }
1129 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1130 
tmio_mmc_host_free(struct tmio_mmc_host * host)1131 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1132 {
1133 	mmc_free_host(host->mmc);
1134 }
1135 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1136 
tmio_mmc_host_probe(struct tmio_mmc_host * _host)1137 int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1138 {
1139 	struct platform_device *pdev = _host->pdev;
1140 	struct tmio_mmc_data *pdata = _host->pdata;
1141 	struct mmc_host *mmc = _host->mmc;
1142 	int ret;
1143 
1144 	/*
1145 	 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1146 	 * looping forever...
1147 	 */
1148 	if (mmc->f_min == 0)
1149 		return -EINVAL;
1150 
1151 	if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1152 		_host->write16_hook = NULL;
1153 
1154 	if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles)
1155 		_host->get_timeout_cycles = tmio_mmc_get_timeout_cycles;
1156 
1157 	_host->set_pwr = pdata->set_pwr;
1158 
1159 	ret = tmio_mmc_init_ocr(_host);
1160 	if (ret < 0)
1161 		return ret;
1162 
1163 	/*
1164 	 * Look for a card detect GPIO, if it fails with anything
1165 	 * else than a probe deferral, just live without it.
1166 	 */
1167 	ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);
1168 	if (ret == -EPROBE_DEFER)
1169 		return ret;
1170 
1171 	mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1172 	mmc->caps2 |= pdata->capabilities2;
1173 	mmc->max_segs = pdata->max_segs ? : 32;
1174 	mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1175 	mmc->max_blk_count = pdata->max_blk_count ? :
1176 		(PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1177 	mmc->max_req_size = min_t(size_t,
1178 				  mmc->max_blk_size * mmc->max_blk_count,
1179 				  dma_max_mapping_size(&pdev->dev));
1180 	mmc->max_seg_size = mmc->max_req_size;
1181 
1182 	if (mmc_can_gpio_ro(mmc))
1183 		_host->ops.get_ro = mmc_gpio_get_ro;
1184 
1185 	if (mmc_can_gpio_cd(mmc))
1186 		_host->ops.get_cd = mmc_gpio_get_cd;
1187 
1188 	/* must be set before tmio_mmc_reset() */
1189 	_host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1190 				  mmc->caps & MMC_CAP_NEEDS_POLL ||
1191 				  !mmc_card_is_removable(mmc));
1192 
1193 	/*
1194 	 * While using internal tmio hardware logic for card detection, we need
1195 	 * to ensure it stays powered for it to work.
1196 	 */
1197 	if (_host->native_hotplug)
1198 		pm_runtime_get_noresume(&pdev->dev);
1199 
1200 	_host->sdio_irq_enabled = false;
1201 	if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1202 		_host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1203 
1204 	if (!_host->sdcard_irq_mask_all)
1205 		_host->sdcard_irq_mask_all = TMIO_MASK_ALL;
1206 
1207 	_host->set_clock(_host, 0);
1208 	tmio_mmc_reset(_host, false);
1209 
1210 	spin_lock_init(&_host->lock);
1211 	mutex_init(&_host->ios_lock);
1212 
1213 	/* Init delayed work for request timeouts */
1214 	INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1215 	INIT_WORK(&_host->done, tmio_mmc_done_work);
1216 
1217 	/* See if we also get DMA */
1218 	tmio_mmc_request_dma(_host, pdata);
1219 
1220 	pm_runtime_get_noresume(&pdev->dev);
1221 	pm_runtime_set_active(&pdev->dev);
1222 	pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1223 	pm_runtime_use_autosuspend(&pdev->dev);
1224 	pm_runtime_enable(&pdev->dev);
1225 
1226 	ret = mmc_add_host(mmc);
1227 	if (ret)
1228 		goto remove_host;
1229 
1230 	dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1231 	pm_runtime_put(&pdev->dev);
1232 
1233 	return 0;
1234 
1235 remove_host:
1236 	pm_runtime_put_noidle(&pdev->dev);
1237 	tmio_mmc_host_remove(_host);
1238 	return ret;
1239 }
1240 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1241 
tmio_mmc_host_remove(struct tmio_mmc_host * host)1242 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1243 {
1244 	struct platform_device *pdev = host->pdev;
1245 	struct mmc_host *mmc = host->mmc;
1246 
1247 	pm_runtime_get_sync(&pdev->dev);
1248 
1249 	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1250 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1251 
1252 	dev_pm_qos_hide_latency_limit(&pdev->dev);
1253 
1254 	mmc_remove_host(mmc);
1255 	cancel_work_sync(&host->done);
1256 	cancel_delayed_work_sync(&host->delayed_reset_work);
1257 	tmio_mmc_release_dma(host);
1258 	tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
1259 
1260 	if (host->native_hotplug)
1261 		pm_runtime_put_noidle(&pdev->dev);
1262 
1263 	pm_runtime_disable(&pdev->dev);
1264 	pm_runtime_dont_use_autosuspend(&pdev->dev);
1265 	pm_runtime_put_noidle(&pdev->dev);
1266 }
1267 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1268 
1269 #ifdef CONFIG_PM
tmio_mmc_clk_enable(struct tmio_mmc_host * host)1270 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1271 {
1272 	if (!host->clk_enable)
1273 		return -ENOTSUPP;
1274 
1275 	return host->clk_enable(host);
1276 }
1277 
tmio_mmc_clk_disable(struct tmio_mmc_host * host)1278 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1279 {
1280 	if (host->clk_disable)
1281 		host->clk_disable(host);
1282 }
1283 
tmio_mmc_host_runtime_suspend(struct device * dev)1284 int tmio_mmc_host_runtime_suspend(struct device *dev)
1285 {
1286 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
1287 
1288 	tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
1289 
1290 	if (host->clk_cache)
1291 		host->set_clock(host, 0);
1292 
1293 	tmio_mmc_clk_disable(host);
1294 
1295 	return 0;
1296 }
1297 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1298 
tmio_mmc_host_runtime_resume(struct device * dev)1299 int tmio_mmc_host_runtime_resume(struct device *dev)
1300 {
1301 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
1302 
1303 	tmio_mmc_clk_enable(host);
1304 	tmio_mmc_reset(host, false);
1305 
1306 	if (host->clk_cache)
1307 		host->set_clock(host, host->clk_cache);
1308 
1309 	tmio_mmc_enable_dma(host, true);
1310 
1311 	return 0;
1312 }
1313 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1314 #endif
1315 
1316 MODULE_LICENSE("GPL v2");
1317