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Searched defs:tp_params (Results 1 – 6 of 6) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb/
Dcommon.h156 struct tp_params { struct
157 unsigned int pm_size;
158 unsigned int cm_size;
182 struct tp_params tp; argument
/drivers/net/ethernet/chelsio/cxgb3/
Dcommon.h302 struct tp_params { struct
303 unsigned int nchan; /* # of channels */
304 unsigned int pmrx_size; /* total PMRX capacity */
305 unsigned int pmtx_size; /* total PMTX capacity */
306 unsigned int cm_size; /* total CM capacity */
307 unsigned int chan_rx_size; /* per channel Rx size */
308 unsigned int chan_tx_size; /* per channel Tx size */
309 unsigned int rx_pg_size; /* Rx page size */
310 unsigned int tx_pg_size; /* Tx page size */
311 unsigned int rx_num_pgs; /* # of Rx pages */
[all …]
/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4.h348 struct tp_params { struct
349 unsigned int tre; /* log2 of core clocks per TP tick */
350 unsigned int la_mask; /* what events are recorded by TP LA */
351 unsigned short tx_modq_map; /* TX modulation scheduler queue to */
354 uint32_t dack_re; /* DACK timer resolution */
355 unsigned short tx_modq[NCHAN]; /* channel to modulation queue map */
357 u32 vlan_pri_map; /* cached TP_VLAN_PRI_MAP */
358 u32 filter_mask;
359 u32 ingress_config; /* cached TP_INGRESS_CONFIG */
364 int rx_pkt_encap;
[all …]
/drivers/gpu/drm/amd/display/dc/link/
Dlink_hwss_dio.c145 struct encoder_set_dp_phy_pattern_param *tp_params) in set_dio_dp_link_test_pattern()
Dlink_hwss_hpo_dp.c238 struct encoder_set_dp_phy_pattern_param *tp_params) in set_hpo_dp_link_test_pattern()
/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_hpo_dp_link_encoder.c92 struct encoder_set_dp_phy_pattern_param *tp_params) in dcn31_hpo_dp_link_enc_set_link_test_pattern()