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Searched defs:v3 (Results 1 – 25 of 35) sorted by relevance

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/drivers/char/mwave/
Dmwavedd.h89 #define PRINTK_4(f,s,v1,v2,v3) \ argument
94 #define PRINTK_5(f,s,v1,v2,v3,v4) \ argument
99 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ argument
104 #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \ argument
109 #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) \ argument
118 #define PRINTK_4(f,s,v1,v2,v3) argument
119 #define PRINTK_5(f,s,v1,v2,v3,v4) argument
120 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) argument
121 #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) argument
122 #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) argument
/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
85 #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
94 #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
104 #define REG_SET_7(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
115 #define REG_SET_8(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
127 #define REG_SET_9(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \ argument
140 #define REG_SET_10(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \ argument
165 #define REG_GET_3(reg_name, f1, v1, f2, v2, f3, v3) \ argument
171 #define REG_GET_4(reg_name, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
[all …]
Dbw_fixed.h56 struct bw_fixed v3) in bw_min3()
63 struct bw_fixed v3) in bw_max3()
/drivers/pci/controller/
Dpci-v3-semi.c315 struct v3_pci *v3 = bus->sysdata; in v3_map_bus() local
383 static void v3_unmap_bus(struct v3_pci *v3) in v3_unmap_bus()
407 struct v3_pci *v3 = bus->sysdata; in v3_pci_read_config() local
421 struct v3_pci *v3 = bus->sysdata; in v3_pci_write_config() local
440 struct v3_pci *v3 = data; in v3_irq() local
482 static int v3_integrator_init(struct v3_pci *v3) in v3_integrator_init()
519 static int v3_pci_setup_resource(struct v3_pci *v3, in v3_pci_setup_resource()
597 static int v3_get_dma_range_config(struct v3_pci *v3, in v3_get_dma_range_config()
675 static int v3_pci_parse_map_dma_ranges(struct v3_pci *v3, in v3_pci_parse_map_dma_ranges()
712 struct v3_pci *v3; in v3_pci_probe() local
/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_reg.h70 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
76 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
97 #define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \ argument
103 #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
/drivers/gpu/drm/amd/display/dc/dml/calcs/
Ddcn_calc_math.c94 float dcn_bw_max3(float v1, float v2, float v3) in dcn_bw_max3()
99 float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5) in dcn_bw_max5()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atombios.c877 struct _ATOM_ASIC_SS_ASSIGNMENT_V3 v3; member
989 struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3 v3; member
1187 struct _SET_VOLTAGE_PARAMETERS_V1_3 v3; member
1239 struct _ATOM_VOLTAGE_OBJECT_INFO_V3_1 v3; member
1245 union _ATOM_VOLTAGE_OBJECT_V3 v3; member
1249 …ATOM_VOLTAGE_OBJECT_V3 *amdgpu_atombios_lookup_voltage_object_v3(ATOM_VOLTAGE_OBJECT_INFO_V3_1 *v3, in amdgpu_atombios_lookup_voltage_object_v3()
Datombios_crtc.c238 ENABLE_SPREAD_SPECTRUM_ON_PPLL_V3 v3; member
302 ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3 v3; member
462 PIXEL_CLOCK_PARAMETERS_V3 v3; member
Datombios_encoders.c555 DIG_ENCODER_CONTROL_PARAMETERS_V3 v3; member
743 DIG_TRANSMITTER_CONTROL_PARAMETERS_V3 v3; member
1187 EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION_V3 v3; member
1430 SELECT_CRTC_SOURCE_PARAMETERS_V3 v3; member
/drivers/clocksource/
Dacpi_pm.c42 u32 v1 = 0, v2 = 0, v3 = 0; in acpi_pm_read_verified() local
Dsh_cmt.c316 u32 v1, v2, v3; in sh_cmt_get_counter() local
/drivers/staging/rtl8723bs/hal/
DHalHWImg8723B_BB.c565 u32 v3 = Array[i+2]; in ODM_ReadAndConfig_MP_8723B_PHY_REG_PG() local
/drivers/net/wireless/mediatek/mt76/
Dmt76x02_phy.c51 mt76x02_tx_power_mask(u8 v1, u8 v2, u8 v3, u8 v4) in mt76x02_tx_power_mask()
/drivers/staging/r8188eu/hal/
DHalHWImg8188E_BB.c711 u32 v3 = array[i + 2]; in ODM_ReadAndConfig_PHY_REG_PG_8188E() local
/drivers/gpu/drm/radeon/
Datombios_crtc.c441 ENABLE_SPREAD_SPECTRUM_ON_PPLL_V3 v3; member
555 ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3 v3; member
759 PIXEL_CLOCK_PARAMETERS_V3 v3; member
Dradeon_atombios.c1497 struct _ATOM_ASIC_SS_ASSIGNMENT_V3 v3; member
2822 struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3 v3; member
3096 struct _SET_VOLTAGE_PARAMETERS_V1_3 v3; member
3375 struct _ATOM_VOLTAGE_OBJECT_INFO_V3_1 v3; member
3381 union _ATOM_VOLTAGE_OBJECT_V3 v3; member
3418 static ATOM_VOLTAGE_OBJECT_V3 *atom_lookup_voltage_object_v3(ATOM_VOLTAGE_OBJECT_INFO_V3_1 *v3, in atom_lookup_voltage_object_v3()
Datombios_encoders.c824 DIG_ENCODER_CONTROL_PARAMETERS_V3 v3; member
993 DIG_TRANSMITTER_CONTROL_PARAMETERS_V3 v3; member
1417 EXTERNAL_ENCODER_CONTROL_PS_ALLOCATION_V3 v3; member
/drivers/net/ethernet/chelsio/cxgb3/
Dmc5.c101 u32 v3) in dbgi_wr_data3()
/drivers/video/fbdev/sis/
Dsis_main.c4366 u8 reg, v1, v2, v3, v4, v5, v6, v7, v8; in sisfb_post_sis300() local
4900 u8 v1, v2, v3; in sisfb_post_xgi_setclocks() local
5049 u8 v3; in sisfb_post_xgi_ddr2() local
5124 u8 v1, v2, v3, v4, v5, reg, ramtype; in sisfb_post_xgi() local
/drivers/net/wireless/intel/iwlwifi/fw/api/
Dpower.h396 struct iwl_dev_tx_power_cmd_v3 v3; member
492 struct iwl_geo_tx_power_profiles_cmd_v3 v3; member
/drivers/ufs/host/
Dufs-mediatek.h219 unsigned long v3; member
/drivers/net/wireless/broadcom/b43legacy/
Dphy.c1759 s8 v3; in b43legacy_phy_xmitpower() local
Dmain.c418 u16 v3; in b43legacy_tsf_read() local
483 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48; in b43legacy_tsf_write_locked() local
/drivers/dma/
Dfsl-edma-common.h144 v3, /* 32ch, i.mx7ulp */ enumerator
/drivers/gpu/drm/i915/display/
Dintel_dmc.c607 const struct intel_dmc_header_v3 *v3 = in parse_dmc_fw_header() local

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