1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * CAAM/SEC 4.x driver backend
4 * Private/internal definitions between modules
5 *
6 * Copyright 2008-2011 Freescale Semiconductor, Inc.
7 * Copyright 2019 NXP
8 */
9
10 #ifndef INTERN_H
11 #define INTERN_H
12
13 #include "ctrl.h"
14 #include <crypto/engine.h>
15
16 /* Currently comes from Kconfig param as a ^2 (driver-required) */
17 #define JOBR_DEPTH (1 << CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE)
18
19 /*
20 * Maximum size for crypto-engine software queue based on Job Ring
21 * size (JOBR_DEPTH) and a THRESHOLD (reserved for the non-crypto-API
22 * requests that are not passed through crypto-engine)
23 */
24 #define THRESHOLD 15
25 #define CRYPTO_ENGINE_MAX_QLEN (JOBR_DEPTH - THRESHOLD)
26
27 /* Kconfig params for interrupt coalescing if selected (else zero) */
28 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_INTC
29 #define JOBR_INTC JRCFG_ICEN
30 #define JOBR_INTC_TIME_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD
31 #define JOBR_INTC_COUNT_THLD CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD
32 #else
33 #define JOBR_INTC 0
34 #define JOBR_INTC_TIME_THLD 0
35 #define JOBR_INTC_COUNT_THLD 0
36 #endif
37
38 /*
39 * Storage for tracking each in-process entry moving across a ring
40 * Each entry on an output ring needs one of these
41 */
42 struct caam_jrentry_info {
43 void (*callbk)(struct device *dev, u32 *desc, u32 status, void *arg);
44 void *cbkarg; /* Argument per ring entry */
45 u32 *desc_addr_virt; /* Stored virt addr for postprocessing */
46 dma_addr_t desc_addr_dma; /* Stored bus addr for done matching */
47 u32 desc_size; /* Stored size for postprocessing, header derived */
48 };
49
50 /* Private sub-storage for a single JobR */
51 struct caam_drv_private_jr {
52 struct list_head list_node; /* Job Ring device list */
53 struct device *dev;
54 int ridx;
55 struct caam_job_ring __iomem *rregs; /* JobR's register space */
56 struct tasklet_struct irqtask;
57 int irq; /* One per queue */
58 bool hwrng;
59
60 /* Number of scatterlist crypt transforms active on the JobR */
61 atomic_t tfm_count ____cacheline_aligned;
62
63 /* Job ring info */
64 struct caam_jrentry_info *entinfo; /* Alloc'ed 1 per ring entry */
65 spinlock_t inplock ____cacheline_aligned; /* Input ring index lock */
66 u32 inpring_avail; /* Number of free entries in input ring */
67 int head; /* entinfo (s/w ring) head index */
68 void *inpring; /* Base of input ring, alloc
69 * DMA-safe */
70 int out_ring_read_index; /* Output index "tail" */
71 int tail; /* entinfo (s/w ring) tail index */
72 void *outring; /* Base of output ring, DMA-safe */
73 struct crypto_engine *engine;
74 };
75
76 /*
77 * Driver-private storage for a single CAAM block instance
78 */
79 struct caam_drv_private {
80 /* Physical-presence section */
81 struct caam_ctrl __iomem *ctrl; /* controller region */
82 struct caam_deco __iomem *deco; /* DECO/CCB views */
83 struct caam_assurance __iomem *assure;
84 struct caam_queue_if __iomem *qi; /* QI control region */
85 struct caam_job_ring __iomem *jr[4]; /* JobR's register space */
86
87 struct iommu_domain *domain;
88
89 /*
90 * Detected geometry block. Filled in from device tree if powerpc,
91 * or from register-based version detection code
92 */
93 u8 total_jobrs; /* Total Job Rings in device */
94 u8 qi_present; /* Nonzero if QI present in device */
95 u8 blob_present; /* Nonzero if BLOB support present in device */
96 u8 mc_en; /* Nonzero if MC f/w is active */
97 int secvio_irq; /* Security violation interrupt number */
98 int virt_en; /* Virtualization enabled in CAAM */
99 int era; /* CAAM Era (internal HW revision) */
100
101 #define RNG4_MAX_HANDLES 2
102 /* RNG4 block */
103 u32 rng4_sh_init; /* This bitmap shows which of the State
104 Handles of the RNG4 block are initialized
105 by this driver */
106
107 struct clk_bulk_data *clks;
108 int num_clks;
109 /*
110 * debugfs entries for developer view into driver/device
111 * variables at runtime.
112 */
113 #ifdef CONFIG_DEBUG_FS
114 struct dentry *ctl; /* controller dir */
115 struct debugfs_blob_wrapper ctl_kek_wrap, ctl_tkek_wrap, ctl_tdsk_wrap;
116 #endif
117 };
118
119 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API
120
121 int caam_algapi_init(struct device *dev);
122 void caam_algapi_exit(void);
123
124 #else
125
caam_algapi_init(struct device * dev)126 static inline int caam_algapi_init(struct device *dev)
127 {
128 return 0;
129 }
130
caam_algapi_exit(void)131 static inline void caam_algapi_exit(void)
132 {
133 }
134
135 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API */
136
137 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API
138
139 int caam_algapi_hash_init(struct device *dev);
140 void caam_algapi_hash_exit(void);
141
142 #else
143
caam_algapi_hash_init(struct device * dev)144 static inline int caam_algapi_hash_init(struct device *dev)
145 {
146 return 0;
147 }
148
caam_algapi_hash_exit(void)149 static inline void caam_algapi_hash_exit(void)
150 {
151 }
152
153 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API */
154
155 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API
156
157 int caam_pkc_init(struct device *dev);
158 void caam_pkc_exit(void);
159
160 #else
161
caam_pkc_init(struct device * dev)162 static inline int caam_pkc_init(struct device *dev)
163 {
164 return 0;
165 }
166
caam_pkc_exit(void)167 static inline void caam_pkc_exit(void)
168 {
169 }
170
171 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API */
172
173 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API
174
175 int caam_rng_init(struct device *dev);
176 void caam_rng_exit(struct device *dev);
177
178 #else
179
caam_rng_init(struct device * dev)180 static inline int caam_rng_init(struct device *dev)
181 {
182 return 0;
183 }
184
caam_rng_exit(struct device * dev)185 static inline void caam_rng_exit(struct device *dev) {}
186
187 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API */
188
189 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_PRNG_API
190
191 int caam_prng_register(struct device *dev);
192 void caam_prng_unregister(void *data);
193
194 #else
195
caam_prng_register(struct device * dev)196 static inline int caam_prng_register(struct device *dev)
197 {
198 return 0;
199 }
200
caam_prng_unregister(void * data)201 static inline void caam_prng_unregister(void *data) {}
202 #endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_PRNG_API */
203
204 #ifdef CONFIG_CAAM_QI
205
206 int caam_qi_algapi_init(struct device *dev);
207 void caam_qi_algapi_exit(void);
208
209 #else
210
caam_qi_algapi_init(struct device * dev)211 static inline int caam_qi_algapi_init(struct device *dev)
212 {
213 return 0;
214 }
215
caam_qi_algapi_exit(void)216 static inline void caam_qi_algapi_exit(void)
217 {
218 }
219
220 #endif /* CONFIG_CAAM_QI */
221
caam_get_dma_mask(struct device * dev)222 static inline u64 caam_get_dma_mask(struct device *dev)
223 {
224 struct device_node *nprop = dev->of_node;
225
226 if (caam_ptr_sz != sizeof(u64))
227 return DMA_BIT_MASK(32);
228
229 if (caam_dpaa2)
230 return DMA_BIT_MASK(49);
231
232 if (of_device_is_compatible(nprop, "fsl,sec-v5.0-job-ring") ||
233 of_device_is_compatible(nprop, "fsl,sec-v5.0"))
234 return DMA_BIT_MASK(40);
235
236 return DMA_BIT_MASK(36);
237 }
238
239
240 #endif /* INTERN_H */
241