Searched refs:AK8974_CTRL2_DRDY_EN (Results 1 – 1 of 1) sorted by relevance
128 #define AK8974_CTRL2_DRDY_EN BIT(3) /* 1 = enable data ready signal */ macro278 ret = regmap_write(ak8974->map, AK8974_CTRL2, AK8974_CTRL2_DRDY_EN | in ak8974_configure()315 AK8974_CTRL2_DRDY_EN | in ak8974_trigmeas()317 val = AK8974_CTRL2_DRDY_EN; in ak8974_trigmeas()