Searched refs:APMU_SDH2 (Results 1 – 3 of 3) sorted by relevance
| /drivers/clk/mmp/ |
| D | clk-of-pxa168.c | 55 #define APMU_SDH2 0xe0 macro
234 …{0, "sdh2_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH2, 6,…
251 …{PXA168_CLK_SDH2, "sdh2_clk", "sdh2_mux", CLK_SET_RATE_PARENT, APMU_SDH2, 0x12, 0x12, 0x0, 0, &sdh…
255 …{PXA168_CLK_SDH23_AXI, "sdh23_axi_clk", NULL, CLK_SET_RATE_PARENT, APMU_SDH2, 0x9, 0x9, 0x0, 0, &s…
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| D | clk-mmp2.c | 43 #define APMU_SDH2 0xe8 macro
345 clk = mmp_clk_register_apmu("sdh2", "sdh_div", apmu_base + APMU_SDH2, in mmp2_clk_init()
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| D | clk-of-mmp2.c | 53 #define APMU_SDH2 0xe8 macro
366 …{MMP2_CLK_SDH2, "sdh2_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH2, 0x1b, 0x1b, 0x0, 0, &sd…
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