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Searched refs:APMU_SDH3 (Results 1 – 3 of 3) sorted by relevance

/drivers/clk/mmp/
Dclk-of-pxa168.c56 #define APMU_SDH3 0xe4 macro
235 …{0, "sdh3_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH3, 6,…
252 …{PXA168_CLK_SDH3, "sdh3_clk", "sdh3_mux", CLK_SET_RATE_PARENT, APMU_SDH3, 0x12, 0x12, 0x0, 0, &sdh…
Dclk-mmp2.c44 #define APMU_SDH3 0xec macro
349 clk = mmp_clk_register_apmu("sdh3", "sdh_div", apmu_base + APMU_SDH3, in mmp2_clk_init()
Dclk-of-mmp2.c54 #define APMU_SDH3 0xec macro
367 …{MMP2_CLK_SDH3, "sdh3_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH3, 0x1b, 0x1b, 0x0, 0, &sd…