Searched refs:BIT25 (Results 1 – 11 of 11) sorted by relevance
386 #define IMR_TXBCN0OK_8723B BIT25 /* Transmit Beacon0 OK */408 #define IMR_BCNDMAINT5_8723B BIT25 /* Beacon DMA Interrupt 5 */436 #define RCR_TCPOFLD_EN BIT25 /* Enable TCP checksum offload */
387 ODM_RF_RX_GAIN_TRACK = BIT25,
197 #define IMR_TXBCN0OK_8723B BIT25 /* Transmit Beacon0 OK */219 #define IMR_BCNDMAINT5_8723B BIT25 /* Beacon DMA Interrupt 5 */
528 #define HSISR_GPIO9_INT BIT25690 #define IMR_BCNDOK8 BIT25 /* Beacon Queue DMA OK Interrupt 8 */737 #define RCR_RSVD_BIT25 BIT25 /* Reserved */1295 #define SDIO_HIMR_ATIMEND_MSK BIT251317 #define SDIO_HISR_ATIMEND BIT25
42 #define BIT25 0x02000000 macro
66 #define DYNAMIC_RF_RX_GAIN_TRACK BIT25/* ODM_RF_RX_GAIN_TRACK */
56 #define BIT25 0x02000000 macro
35 #define BIT25 0x02000000 macro
51 #define BIT25 0x02000000 macro
136 #define RCR_ACKTXBW (BIT24|BIT25)
794 #define LPFC_SLI4_INTR25 BIT25