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Searched refs:BIT_5 (Results 1 – 20 of 20) sorted by relevance

/drivers/scsi/
Dqla1280.h22 #define BIT_5 0x20 macro
124 #define ISP_CFG0_1040C BIT_5 /* ISP1040C */
127 #define ISP_CFG1_F64 BIT_4|BIT_5 /* 128-byte FIFO threshold */
128 #define ISP_CFG1_F32 BIT_5 /* 128-byte FIFO threshold */
311 #define TP_PPR BIT_5 /* PPR */
Dqla1280.c445 return BIT_5; in qla1280_data_direction()
449 return BIT_5 | BIT_6; in qla1280_data_direction()
1912 status = qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_5 | in qla1280_init_rings()
2181 cfg1 = RD_REG_WORD(&reg->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6); in qla1280_nvram_config()
2253 mb[1] |= BIT_5; in qla1280_nvram_config()
2258 mb[2] |= BIT_5; in qla1280_nvram_config()
3903 if ((mb[2] & BIT_5) && ((mb[6] >> 8) & 0xff) >= 2) in qla1280_get_target_parameters()
/drivers/scsi/qla2xxx/
Dqla_target.h85 #define OF_EXPL_CONF BIT_5 /* Explicit Confirmation Requested */
179 #define NOTIFY_ACK_FLAGS_FCSP BIT_5
480 #define CTIO7_FLAGS_EXPLICIT_CONFORM BIT_5
749 #define NOTIFY_ACK_CLEAR_LIP_RESET BIT_5
845 TRC_XMIT_STATUS = BIT_5,
Dqla_def.h113 #define BIT_5 0x20 macro
406 #define SRB_CRC_CTX_DSD_VALID BIT_5 /* DIF: dsd_list valid */
510 #define SRB_LOGIN_FCSP BIT_5
889 #define HCCR_RISC_PAUSE BIT_5 /* Pause mode bit */
1208 #define FO1_DISABLE_100MS_LOS_WAIT BIT_5
1229 #define ADD_FO2_ENABLE_SEL_CLS2 BIT_5
1383 #define MBX_5 BIT_5
1977 #define CF_READ BIT_5
2045 #define PO_DISABLE_INCR_REF_TAG BIT_5
2137 #define RF_INV_E_ORDER BIT_5 /* Invalid entry order. */
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Dqla_fw.h23 #define FO2_ENABLE_SEL_CLASS2 BIT_5
43 #define PDF_FCP2_CONF BIT_5
908 #define LCF_SKIP_PRLI BIT_5 /* Skip PRLI after PLOGI. */
909 #define LCF_IMPL_LOGO_ALL BIT_5 /* Implicit LOGO to all ports. */
1188 #define CSRX_MAX_WRT_BURST_MASK (BIT_5|BIT_4)
1229 #define HCCRX_RISC_RESET BIT_5 /* RISC Reset mode bit. */
1510 VP_FLAGS_NAME_VALID = BIT_5,
Dqla_init.c4478 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_update_fw_options()
4485 ha->fw_options[10] |= BIT_5 | in qla2x00_update_fw_options()
4491 (BIT_7 | BIT_6 | BIT_5)) >> 5; in qla2x00_update_fw_options()
4496 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_update_fw_options()
4503 ha->fw_options[11] |= BIT_5 | in qla2x00_update_fw_options()
5248 nv->firmware_options[1] = BIT_7 | BIT_5; in qla2x00_nvram_config()
5249 nv->add_firmware_options[0] = BIT_5; in qla2x00_nvram_config()
5250 nv->add_firmware_options[1] = BIT_5 | BIT_4; in qla2x00_nvram_config()
5255 nv->firmware_options[1] = BIT_7 | BIT_5; in qla2x00_nvram_config()
5256 nv->add_firmware_options[0] = BIT_5; in qla2x00_nvram_config()
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Dqla_mid.c768 options |= BIT_5; in qla25xx_create_req_que()
886 options |= BIT_5; in qla25xx_create_rsp_que()
Dqla_mbx.c731 mcp->in_mb |= BIT_5; in qla2x00_execute_fw()
2352 mcp->mb[1] |= BIT_5; in qla24xx_link_initialize()
4262 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5; in qla24xx_modify_vp_config()
6352 if (!(subcode & (BIT_2 | BIT_5))) in qla83xx_access_control()
6365 if (subcode & BIT_5) in qla83xx_access_control()
6701 if ((pd->prli_svc_param_word_3[0] & BIT_5) == 0) in __qla24xx_parse_gpdb()
Dqla_target.c6921 nv->firmware_options_1 |= cpu_to_le32(BIT_5); in qlt_24xx_config_nvram_stage1()
6948 tmp = ~(BIT_4|BIT_5|BIT_6); in qlt_24xx_config_nvram_stage1()
7027 nv->firmware_options_1 |= cpu_to_le32(BIT_5); in qlt_81xx_config_nvram_stage1()
7052 tmp = ~(BIT_4|BIT_5|BIT_6); in qlt_81xx_config_nvram_stage1()
7114 vpmod->options_idx1 &= ~BIT_5; in qlt_modify_vp_config()
Dqla_sup.c2149 if ((flash_data & BIT_5) && cnt > 2) in qla2x00_poll_flash()
Dqla_isr.c2416 } else if (iop[0] & BIT_5) in qla24xx_logio_entry()
Dqla_os.c6167 if (sfp[0] & BIT_2 || sfp[1] & (BIT_6|BIT_5)) in qla24xx_process_purex_rdp()
/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_ctx.c1372 arg1 |= (BIT_2 | BIT_5); in qlcnic_config_switch_port()
1376 arg1 |= (BIT_3 | BIT_5); in qlcnic_config_switch_port()
1427 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5); in qlcnic_get_eswitch_port_config()
Dqlcnic_hdr.h200 #define BIT_5 0x20 macro
Dqlcnic_minidump.c28 #define QLCNIC_DUMP_RD_SAVE BIT_5
Dqlcnic.h923 #define QLCNIC_FW_CAPABILITY_SET_DRV_VER BIT_5
Dqlcnic_sriov_common.c390 if (status & BIT_5) in qlcnic_sriov_get_vf_vport_info()
Dqlcnic_io.c368 #define QLCNIC_ENCAP_DO_L4_CSUM BIT_5
/drivers/scsi/qla4xxx/
Dql4_def.h86 #define BIT_5 0x20 macro
Dql4_os.c3674 SET_BITVAL(sess->discovery_logout_en, options, BIT_5); in qla4xxx_copy_to_fwddb_param()
3683 SET_BITVAL(conn->tcp_nagle_disable, options, BIT_5); in qla4xxx_copy_to_fwddb_param()