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Searched refs:BYTE_REG_BITS_OFF (Results 1 – 3 of 3) sorted by relevance

/drivers/net/ethernet/via/
Dvia-velocity.c234 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW); in mac_wol_reset()
236 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW); in mac_wol_reset()
238 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR); in mac_wol_reset()
239 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR); in mac_wol_reset()
897 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR); in velocity_set_media_mode()
933 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR); in velocity_set_media_mode()
952 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG); in velocity_set_media_mode()
1383 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA)); in velocity_init_registers()
1852 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR); in velocity_error()
1858 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG); in velocity_error()
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Dvia-velocity.h42 #define BYTE_REG_BITS_OFF(x,p) do { writeb(readb((p)) & (~(x)),(p));} while (0) macro
1144 BYTE_REG_BITS_OFF(MIBCR_MIBFRZ,&((regs)->MIBCR));\
Dvia-rhine.c489 #define BYTE_REG_BITS_OFF(x, p) do { iowrite8(ioread8((p)) & (~(x)), (p)); } while (0) macro
1499 BYTE_REG_BITS_OFF(BCR1_VIDFR, ioaddr + PCIBusConfig1); in rhine_init_cam_filter()
2273 BYTE_REG_BITS_OFF(BCR1_VIDFR, ioaddr + PCIBusConfig1); in rhine_set_rx_mode()