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Searched refs:CLKID_MPLL0_DIV (Results 1 – 8 of 8) sorted by relevance

/drivers/clk/meson/
Daxg.h120 #define CLKID_MPLL0_DIV 65 macro
Dgxbb.h147 #define CLKID_MPLL0_DIV 142 macro
Dmeson8b.h90 #define CLKID_MPLL0_DIV 96 macro
Dg12a.h146 #define CLKID_MPLL0_DIV 69 macro
Dmeson8b.c2869 [CLKID_MPLL0_DIV] = &meson8b_mpll0_div.hw,
3077 [CLKID_MPLL0_DIV] = &meson8b_mpll0_div.hw,
3296 [CLKID_MPLL0_DIV] = &meson8b_mpll0_div.hw,
Dgxbb.c2874 [CLKID_MPLL0_DIV] = &gxbb_mpll0_div.hw,
3085 [CLKID_MPLL0_DIV] = &gxl_mpll0_div.hw,
Dg12a.c4319 [CLKID_MPLL0_DIV] = &g12a_mpll0_div.hw,
4548 [CLKID_MPLL0_DIV] = &g12a_mpll0_div.hw,
4812 [CLKID_MPLL0_DIV] = &g12a_mpll0_div.hw,
Daxg.c1960 [CLKID_MPLL0_DIV] = &axg_mpll0_div.hw,