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Searched refs:CPL_RX_PHYS_DSGL_PCIRLXORDER_V (Results 1 – 2 of 2) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb4/
Dt4_msg.h2139 #define CPL_RX_PHYS_DSGL_PCIRLXORDER_V(x) \ macro
2144 #define CPL_RX_PHYS_DSGL_PCIRLXORDER_F CPL_RX_PHYS_DSGL_PCIRLXORDER_V(1U)
/drivers/crypto/chelsio/
Dchcr_algo.c393 htonl(CPL_RX_PHYS_DSGL_PCIRLXORDER_V(0) | in dsgl_walk_end()