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Searched refs:CR (Results 1 – 19 of 19) sorted by relevance

/drivers/staging/rtl8712/
Dusb_halinit.c90 r8712_write8(adapter, CR, val8); in r8712_usb_hal_bus_init()
92 r8712_write8(adapter, CR + 1, val8); in r8712_usb_hal_bus_init()
154 r8712_write8(adapter, CR, 0xFC); in r8712_usb_hal_bus_init()
155 r8712_write8(adapter, CR + 1, 0x37); in r8712_usb_hal_bus_init()
250 r8712_write8(adapter, CR, 0xFC); in r8712_usb_hal_bus_init()
251 r8712_write8(adapter, CR + 1, 0x37); in r8712_usb_hal_bus_init()
271 val8 = r8712_read8(adapter, CR); in r8712_usb_hal_bus_init()
272 r8712_write8(adapter, CR, val8 & (~_TXDMA_EN)); in r8712_usb_hal_bus_init()
275 r8712_write8(adapter, CR, val8 | _TXDMA_EN); in r8712_usb_hal_bus_init()
Drtl8712_cmdctrl_regdef.h10 #define CR (RTL8712_CMDCTRL_ + 0x0000) macro
/drivers/video/fbdev/sis/
Dinitextlfb.c116 (unsigned char *)&SiS_Pr->SiS_CRT1Table[index].CR[0], in sisfb_mode_rate_to_ddata()
199 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14]; in sisfb_gettotalfrommode()
200 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0]; in sisfb_gettotalfrommode()
203 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13]; in sisfb_gettotalfrommode()
204 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6]; in sisfb_gettotalfrommode()
205 cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7]; in sisfb_gettotalfrommode()
Dvstruct.h99 unsigned char CR[15]; member
173 unsigned char CR[12]; member
177 unsigned char CR[17]; member
Dinit301.c3358 tempax = SiS_Pr->SiS_CRT1Table[index].CR[0]; in SiS_GetRAMDAC2DATA()
3359 tempax |= (SiS_Pr->SiS_CRT1Table[index].CR[14] << 8); in SiS_GetRAMDAC2DATA()
3361 tempbx = SiS_Pr->SiS_CRT1Table[index].CR[6]; in SiS_GetRAMDAC2DATA()
3362 tempcx = SiS_Pr->SiS_CRT1Table[index].CR[13] << 8; in SiS_GetRAMDAC2DATA()
3366 temp1 = SiS_Pr->SiS_CRT1Table[index].CR[7]; in SiS_GetRAMDAC2DATA()
6371 cr4 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[4]; in SiS_SetGroup1()
6372 cr14 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14]; in SiS_SetGroup1()
6373 cr5 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[5]; in SiS_SetGroup1()
6374 cr15 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[15]; in SiS_SetGroup1()
6459 cr8 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[8]; in SiS_SetGroup1()
[all …]
Dinit.c2092 crt1data = (unsigned char *)&SiS_Pr->SiS_CRT1Table[temp].CR[0]; in SiS_SetCRT1CRTC()
/drivers/net/usb/
Drtl8150.c23 #define CR 0x012e macro
290 get_registers(dev, CR, 1, &cr); in rtl8150_set_mac_address()
293 set_registers(dev, CR, 1, &cr); in rtl8150_set_mac_address()
302 set_registers(dev, CR, 1, &cr); in rtl8150_set_mac_address()
313 set_registers(dev, CR, 1, &data); in rtl8150_reset()
315 get_registers(dev, CR, 1, &data); in rtl8150_reset()
631 set_registers(dev, CR, 1, &cr); in enable_net_traffic()
641 get_registers(dev, CR, 1, &cr); in disable_net_traffic()
643 set_registers(dev, CR, 1, &cr); in disable_net_traffic()
/drivers/iommu/
Dmsm_iommu_hw-8xxx.h93 #define SET_CR(b, v) SET_GLOBAL_REG(CR, (b), (v))
109 #define GET_CR(b) GET_GLOBAL_REG(CR, (b))
205 #define SET_RPUE(b, v) SET_GLOBAL_FIELD(b, CR, RPUE, v)
206 #define SET_RPUERE(b, v) SET_GLOBAL_FIELD(b, CR, RPUERE, v)
207 #define SET_RPUEIE(b, v) SET_GLOBAL_FIELD(b, CR, RPUEIE, v)
208 #define SET_DCDEE(b, v) SET_GLOBAL_FIELD(b, CR, DCDEE, v)
209 #define SET_CLIENTPD(b, v) SET_GLOBAL_FIELD(b, CR, CLIENTPD, v)
210 #define SET_STALLD(b, v) SET_GLOBAL_FIELD(b, CR, STALLD, v)
211 #define SET_TLBLKCRWE(b, v) SET_GLOBAL_FIELD(b, CR, TLBLKCRWE, v)
212 #define SET_CR_TLBIALLCFG(b, v) SET_GLOBAL_FIELD(b, CR, CR_TLBIALLCFG, v)
[all …]
/drivers/usb/misc/sisusbvga/
Dsisusb_init.c524 SiS_Pr->SiS_CRT1Table[index].CR[i]); in SiS_SetCRT1CRTC()
528 SiS_Pr->SiS_CRT1Table[index].CR[i]); in SiS_SetCRT1CRTC()
532 SiS_Pr->SiS_CRT1Table[index].CR[i]); in SiS_SetCRT1CRTC()
536 SiS_Pr->SiS_CRT1Table[index].CR[i]); in SiS_SetCRT1CRTC()
539 temp = SiS_Pr->SiS_CRT1Table[index].CR[16] & 0xE0; in SiS_SetCRT1CRTC()
542 temp = ((SiS_Pr->SiS_CRT1Table[index].CR[16]) & 0x01) << 5; in SiS_SetCRT1CRTC()
Dsisusb_struct.h112 unsigned char CR[17]; member
/drivers/spi/
Dspi-atmel.c478 spi_writel(as, CR, SPI_BIT(LASTXFER)); in cs_deactivate()
706 spi_writel(as, CR, SPI_BIT(RXFCLR) | SPI_BIT(TXFCLR)); in atmel_spi_next_xfer_fifo()
1498 spi_writel(as, CR, SPI_BIT(SWRST)); in atmel_spi_init()
1499 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ in atmel_spi_init()
1503 spi_writel(as, CR, SPI_BIT(FIFOEN)); in atmel_spi_init()
1514 spi_writel(as, CR, SPI_BIT(SPIEN)); in atmel_spi_init()
1670 spi_writel(as, CR, SPI_BIT(SWRST)); in atmel_spi_probe()
1671 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ in atmel_spi_probe()
1701 spi_writel(as, CR, SPI_BIT(SWRST)); in atmel_spi_remove()
1702 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ in atmel_spi_remove()
Dspi-at91-usart.c451 at91_usart_spi_writel(aus, CR, US_ENABLE); in at91_usart_spi_prepare_message()
463 at91_usart_spi_writel(aus, CR, US_RESET | US_DISABLE); in at91_usart_spi_unprepare_message()
480 at91_usart_spi_writel(aus, CR, US_RESET | US_DISABLE); in at91_usart_spi_init()
/drivers/net/wireless/realtek/rtl8xxxu/
DKconfig6 tristate "RTL8723AU/RTL8188[CR]U/RTL819[12]CU (mac80211) support"
/drivers/net/wan/
Dwanxlfw.S105 CR = REGBASE + 0x5C0 // 16-bit Command register define
179 99: btstl #0, CR
420 movew %d1, CR // Init SCC RX and TX params
/drivers/iio/adc/
Dat91-sama5d2_adc.c40 u16 CR; member
255 .CR = 0x00,
290 .CR = 0x00,
1542 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_START); in at91_adc_trigger_handler()
1782 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_START); in at91_adc_read_info_raw()
2160 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_SWRST); in at91_adc_hw_init()
2544 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_SWRST); in at91_adc_suspend()
/drivers/media/pci/solo6x10/
Dsolo6x10-regs.h262 #define SOLO_VO_NA_COLOR_CR(CR) (((CR)/16)<<0) argument
/drivers/net/ethernet/natsemi/
Dns83820.c308 #define CR 0x00 macro
455 #define __kick_rx(dev) writel(CR_RXE, dev->base + CR)
950 writel(CR_TXE, dev->base + CR);
1448 writel(CR_RXE, dev->base + CR);
1518 writel(which, dev->base + CR);
1521 } while (readl(dev->base + CR) & which);
/drivers/tty/
Dn_gsm.c313 #define CR 0x02 macro
999 *--dp = (msg->addr << 2) | CR | EA; in __gsm_data_queue()
1348 msg->data[0] = (cmd << 1) | CR | EA; /* Set C/R */ in gsm_control_command()
/drivers/net/ethernet/amd/xgbe/
Dxgbe-dev.c3217 XGMAC_IOWRITE_BITS(pdata, MMC_CR, CR, 1); in xgbe_config_mmc()