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Searched refs:DCC (Results 1 – 8 of 8) sorted by relevance

/drivers/tty/hvc/
DKconfig81 bool "ARM JTAG DCC console"
86 This console uses the JTAG DCC on ARM to create a console under the HVC
91 bool "Use DCC only on CPU core 0"
95 Some external debuggers, do not handle reads/writes from/to DCC on more
96 than one CPU core. Each core has its own DCC device registers, so when a
97 CPU core reads or writes from/to DCC, it only accesses its own DCC device.
99 write to the console, it might write to a different DCC.
102 shows the DCC output only from that core's DCC. The result is that
/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_plane.c155 return IS_AMD_FMT_MOD(modifier) && AMD_FMT_MOD_GET(DCC, modifier); in modifier_has_dcc()
352 AMD_FMT_MOD_SET(DCC, 1) | in add_gfx10_1_modifiers()
361 AMD_FMT_MOD_SET(DCC, 1) | in add_gfx10_1_modifiers()
415 AMD_FMT_MOD_SET(DCC, 1) | in add_gfx9_modifiers()
426 AMD_FMT_MOD_SET(DCC, 1) | in add_gfx9_modifiers()
437 AMD_FMT_MOD_SET(DCC, 1) | in add_gfx9_modifiers()
452 AMD_FMT_MOD_SET(DCC, 1) | in add_gfx9_modifiers()
505 AMD_FMT_MOD_SET(DCC, 1) | in add_gfx10_3_modifiers()
516 AMD_FMT_MOD_SET(DCC, 1) | in add_gfx10_3_modifiers()
526 AMD_FMT_MOD_SET(DCC, 1) | in add_gfx10_3_modifiers()
[all …]
/drivers/gpu/drm/i915/
Dintel_mchbar_regs.h36 #define DCC _MMIO(MCHBAR_MIRROR_BASE + 0x200) macro
Di915_debugfs.c424 intel_uncore_read(uncore, DCC)); in i915_swizzle_info()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_display.c626 if (AMD_FMT_MOD_GET(DCC, modifier)) in amdgpu_lookup_format_info()
811 modifier |= AMD_FMT_MOD_SET(DCC, 1) | in convert_tiling_flags_to_modifier()
1036 if (AMD_FMT_MOD_GET(DCC, modifier)) { in amdgpu_display_verify_sizes()
/drivers/atm/
Dhe.h657 #define DCC 0x807cc macro
Dhe.c1407 he_writel(he_dev, 0x0, DCC); in he_start()
2727 dcc += he_readl(he_dev, DCC); in he_proc_read()
/drivers/gpu/drm/i915/gt/
Dintel_ggtt_fencing.c666 u32 dcc = intel_uncore_read(uncore, DCC); in detect_bit_6_swizzle()