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Searched refs:DDI_BUF_CTL (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/i915/gvt/
Ddisplay.c216 vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) &= in emulate_monitor_status_change()
219 vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) |= DDI_BUF_IS_IDLE; in emulate_monitor_status_change()
279 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |= in emulate_monitor_status_change()
281 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) &= in emulate_monitor_status_change()
308 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= in emulate_monitor_status_change()
310 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &= in emulate_monitor_status_change()
338 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) |= in emulate_monitor_status_change()
340 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) &= in emulate_monitor_status_change()
419 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= DDI_BUF_CTL_ENABLE; in emulate_monitor_status_change()
420 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &= ~DDI_BUF_IS_IDLE; in emulate_monitor_status_change()
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Dhandlers.c796 if (offset == i915_mmio_reg_offset(DDI_BUF_CTL(PORT_E))) in ddi_buf_ctl_mmio_write()
815 u32 ddi_buf_ctl = vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_E)); in fdi_auto_training_started()
2336 MMIO_DH(DDI_BUF_CTL(PORT_A), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info()
2337 MMIO_DH(DDI_BUF_CTL(PORT_B), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info()
2338 MMIO_DH(DDI_BUF_CTL(PORT_C), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info()
2339 MMIO_DH(DDI_BUF_CTL(PORT_D), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info()
2340 MMIO_DH(DDI_BUF_CTL(PORT_E), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info()
/drivers/gpu/drm/i915/display/
Dintel_fdi.c821 intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E), in hsw_fdi_link_train()
823 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
867 temp = intel_de_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
869 intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E), temp); in hsw_fdi_link_train()
870 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
912 val = intel_de_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_disable()
914 intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E), val); in hsw_fdi_disable()
Dintel_tc.c432 val = intel_uncore_read(uncore, DDI_BUF_CTL(port)); in adl_tc_phy_take_ownership()
437 intel_uncore_write(uncore, DDI_BUF_CTL(port), val); in adl_tc_phy_take_ownership()
477 val = intel_uncore_read(uncore, DDI_BUF_CTL(port)); in adl_tc_phy_is_owned()
721 return intel_de_read(i915, DDI_BUF_CTL(dig_port->base.port)) & in tc_port_is_enabled()
Dintel_ddi.c176 if (wait_for_us((intel_de_read(dev_priv, DDI_BUF_CTL(port)) & in intel_wait_ddi_buf_idle()
193 ret = _wait_for(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) & in intel_wait_ddi_buf_active()
734 tmp = intel_de_read(dev_priv, DDI_BUF_CTL(port)); in intel_ddi_get_encoder_pipes()
1398 intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP); in hsw_set_signal_levels()
1399 intel_de_posting_read(dev_priv, DDI_BUF_CTL(port)); in hsw_set_signal_levels()
2570 val = intel_de_read(dev_priv, DDI_BUF_CTL(port)); in intel_disable_ddi_buf()
2573 intel_de_write(dev_priv, DDI_BUF_CTL(port), val); in intel_disable_ddi_buf()
2902 intel_de_write(dev_priv, DDI_BUF_CTL(port), buf_ctl); in intel_enable_ddi_hdmi()
3104 ddi_buf_ctl = intel_de_read(dev_priv, DDI_BUF_CTL(port)); in intel_ddi_prepare_link_retrain()
3106 intel_de_write(dev_priv, DDI_BUF_CTL(port), in intel_ddi_prepare_link_retrain()
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Dicl_dsi.c563 tmp = intel_de_read(dev_priv, DDI_BUF_CTL(port)); in gen11_dsi_enable_ddi_buffer()
565 intel_de_write(dev_priv, DDI_BUF_CTL(port), tmp); in gen11_dsi_enable_ddi_buffer()
567 if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) & in gen11_dsi_enable_ddi_buffer()
1415 tmp = intel_de_read(dev_priv, DDI_BUF_CTL(port)); in gen11_dsi_disable_port()
1417 intel_de_write(dev_priv, DDI_BUF_CTL(port), tmp); in gen11_dsi_disable_port()
1419 if (wait_for_us((intel_de_read(dev_priv, DDI_BUF_CTL(port)) & in gen11_dsi_disable_port()
Dintel_display.c7902 if (intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) in intel_ddi_crt_present()
7988 found = intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED; in intel_setup_outputs()
/drivers/gpu/drm/i915/
Dintel_gvt_mmio_table.c506 MMIO_D(DDI_BUF_CTL(PORT_A)); in iterate_generic_mmio()
507 MMIO_D(DDI_BUF_CTL(PORT_B)); in iterate_generic_mmio()
508 MMIO_D(DDI_BUF_CTL(PORT_C)); in iterate_generic_mmio()
509 MMIO_D(DDI_BUF_CTL(PORT_D)); in iterate_generic_mmio()
510 MMIO_D(DDI_BUF_CTL(PORT_E)); in iterate_generic_mmio()
Di915_reg.h6931 #define DDI_BUF_CTL(port) _MMIO_PORT(port, _DDI_BUF_CTL_A, _DDI_BUF_CTL_B) macro