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Searched refs:DIG_MODE (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_link_encoder.c891 REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 0); in dcn10_link_encoder_setup()
895 REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 1); in dcn10_link_encoder_setup()
900 REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 2); in dcn10_link_encoder_setup()
904 REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 3); in dcn10_link_encoder_setup()
908 REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 5); in dcn10_link_encoder_setup()
1431 REG_GET(DIG_BE_CNTL, DIG_MODE, &value); in dcn10_get_dig_mode()
Ddcn10_link_encoder.h179 LE_SF(DIG0_DIG_BE_CNTL, DIG_MODE, mask_sh),\
230 type DIG_MODE;\
/drivers/gpu/drm/amd/display/dc/dce/
Ddce_link_encoder.c1021 REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 0); in dce110_link_encoder_setup()
1025 REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 1); in dce110_link_encoder_setup()
1030 REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 2); in dce110_link_encoder_setup()
1034 REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 3); in dce110_link_encoder_setup()
1038 REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 5); in dce110_link_encoder_setup()
/drivers/gpu/drm/radeon/
Dr600d.h977 # define DIG_MODE(x) (((x) & 7) << 8) macro