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Searched refs:DPU_FORMAT_IS_UBWC (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_formats.c607 bool meta = DPU_FORMAT_IS_UBWC(fmt); in _dpu_format_get_plane_sizes_ubwc()
767 if (DPU_FORMAT_IS_UBWC(fmt) || DPU_FORMAT_IS_TILE(fmt)) in dpu_format_get_plane_sizes()
793 meta = DPU_FORMAT_IS_UBWC(layout->format); in _dpu_format_populate_addrs_ubwc()
925 if (DPU_FORMAT_IS_UBWC(layout->format) || in dpu_format_populate_layout()
1027 DPU_FORMAT_IS_UBWC(fmt), in dpu_get_dpu_format_ext()
Ddpu_plane.c761 if (DPU_FORMAT_IS_UBWC(fmt[i])) { in dpu_plane_validate_multirect_v2()
955 if (!DPU_FORMAT_IS_UBWC(fmt) || in dpu_plane_check_inline_rotation()
1147 (char *)&fmt->base.pixel_format, DPU_FORMAT_IS_UBWC(fmt)); in dpu_plane_sspp_atomic_update()
1205 DPU_FORMAT_IS_UBWC(fmt); in dpu_plane_sspp_atomic_update()
1207 DPU_FORMAT_IS_UBWC(fmt) || in dpu_plane_sspp_atomic_update()
Ddpu_hw_mdss.h56 #define DPU_FORMAT_IS_UBWC(X) \ macro
Ddpu_encoder_phys_wb.c170 DPU_FORMAT_IS_UBWC(wb_cfg->dest.format); in dpu_encoder_phys_wb_setup_fb()
172 DPU_FORMAT_IS_UBWC(wb_cfg->dest.format) || in dpu_encoder_phys_wb_setup_fb()
Ddpu_hw_sspp.c305 if (DPU_FORMAT_IS_UBWC(fmt)) in dpu_hw_sspp_setup_format()