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Searched refs:E5433_MUX_SEL2 (Results 1 – 1 of 1) sorted by relevance

/drivers/clk/samsung/
Dclk-cpu.c46 #define E5433_MUX_SEL2 0x008 macro
321 mux_reg = readl(base + E5433_MUX_SEL2); in exynos5433_cpuclk_pre_rate_change()
322 writel(mux_reg | 1, base + E5433_MUX_SEL2); in exynos5433_cpuclk_pre_rate_change()
347 mux_reg = readl(base + E5433_MUX_SEL2); in exynos5433_cpuclk_post_rate_change()
348 writel(mux_reg & ~1, base + E5433_MUX_SEL2); in exynos5433_cpuclk_post_rate_change()