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Searched refs:FME_PWR_XEON_LIMIT (Results 1 – 1 of 1) sorted by relevance

/drivers/fpga/
Ddfl-fme-main.c369 #define FME_PWR_XEON_LIMIT 0x18 macro
487 v = readq(feature->ioaddr + FME_PWR_XEON_LIMIT); in power1_xeon_limit_show()