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Searched refs:FS_PRPENC_ROT_SRC_SEL_ENC (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/ipu-v3/
Dipu-prv.h76 #define FS_PRPENC_ROT_SRC_SEL_ENC (0x7 << 0) macro
Dipu-common.c698 FS_PRPENC_ROT_SRC_SEL_MASK, FS_PRPENC_ROT_SRC_SEL_ENC },