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Searched refs:G1_REG_ADDR_DIR_MV (Results 1 – 2 of 2) sorted by relevance

/drivers/media/platform/verisilicon/
Dhantro_g1_h264_dec.c243 vdpu_write_relaxed(vpu, dst_dma + offset, G1_REG_ADDR_DIR_MV); in set_buffers()
Dhantro_g1_regs.h258 #define G1_REG_ADDR_DIR_MV 0x0a4 macro