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Searched refs:G1_REG_CONFIG_DEC_CLK_GATE_E (Results 1 – 6 of 6) sorted by relevance

/drivers/media/platform/verisilicon/
Dhantro_g1.c25 vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); in hantro_g1_irq()
37 vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); in hantro_g1_reset()
Dhantro_g1_h264_dec.c279 G1_REG_CONFIG_DEC_CLK_GATE_E, in hantro_g1_h264_dec_run()
Dimx8m_vpu_hw.c246 vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); in imx8m_vpu_g1_irq()
Dhantro_g1_vp8_dec.c460 G1_REG_CONFIG_DEC_CLK_GATE_E | in hantro_g1_vp8_dec_run()
Dhantro_g1_regs.h38 #define G1_REG_CONFIG_DEC_CLK_GATE_E BIT(10) macro
Drockchip_vpu_hw.c361 vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); in rk3066_vpu_dec_reset()