Home
last modified time | relevance | path

Searched refs:G2_TILE_SIZES_ADDR (Results 1 – 3 of 3) sorted by relevance

/drivers/media/platform/verisilicon/
Dhantro_g2_regs.h309 #define G2_TILE_SIZES_ADDR (G2_SWREG(167)) macro
Dhantro_g2_hevc_dec.c522 hantro_write_addr(vpu, G2_TILE_SIZES_ADDR, ctx->hevc_dec.tile_sizes.dma); in set_buffers()
Dhantro_g2_vp9_dec.c334 hantro_write_addr(ctx->dev, G2_TILE_SIZES_ADDR, addr); in config_tiles()