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Searched refs:GB_TILE_MODE0 (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/radeon/
Dsid.h1175 #define GB_TILE_MODE0 0x9910 macro
Dcikd.h1217 #define GB_TILE_MODE0 0x9910 macro
Dcik.c2494 WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]); in cik_tiling_mode_table_init()
2637 WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]); in cik_tiling_mode_table_init()
2862 WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]); in cik_tiling_mode_table_init()
3005 WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]); in cik_tiling_mode_table_init()
Dsi.c2723 WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]); in si_tiling_mode_table_init()
2938 WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]); in si_tiling_mode_table_init()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h1172 #define GB_TILE_MODE0 0x2644 macro
Dsi.c1127 {GB_TILE_MODE0},