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Searched refs:GPCPLL_COEFF (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgk20a.h53 #define GPCPLL_COEFF (SYS_GPCPLL_CFG_BASE + 4) macro
Dgk20a.c70 val = nvkm_rd32(device, GPCPLL_COEFF); in gk20a_pllg_read_mnp()
85 nvkm_wr32(device, GPCPLL_COEFF, val); in gk20a_pllg_write_mnp()