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Searched refs:GPCPLL_COEFF_M_SHIFT (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgk20a.h54 #define GPCPLL_COEFF_M_SHIFT 0 macro
Dgk20a.c71 pll->m = (val >> GPCPLL_COEFF_M_SHIFT) & MASK(GPCPLL_COEFF_M_WIDTH); in gk20a_pllg_read_mnp()
82 val = (pll->m & MASK(GPCPLL_COEFF_M_WIDTH)) << GPCPLL_COEFF_M_SHIFT; in gk20a_pllg_write_mnp()