Searched refs:HDMI_ACR_N_44 (Results 1 – 13 of 13) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_stream_encoder.h | 185 SE_SF(HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
263 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
457 uint8_t HDMI_ACR_N_44; member
589 uint32_t HDMI_ACR_N_44; member
|
| D | dce_stream_encoder.c | 1308 REG_UPDATE(HDMI_ACR_44_1, HDMI_ACR_N_44, audio_clock_info.n_44khz); in dce110_se_setup_hdmi_audio()
|
| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_stream_encoder.h | 253 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
469 type HDMI_ACR_N_44;\
|
| D | dcn10_stream_encoder.c | 1287 REG_UPDATE(HDMI_ACR_44_1, HDMI_ACR_N_44, audio_clock_info.n_44khz); in enc1_se_setup_hdmi_audio()
|
| /drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_dio_stream_encoder.h | 144 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
|
| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_dio_stream_encoder.h | 159 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
|
| D | dcn30_dio_stream_encoder.c | 763 REG_UPDATE(HDMI_ACR_44_1, HDMI_ACR_N_44, audio_clock_info.n_44khz); in enc3_se_setup_hdmi_audio()
|
| /drivers/gpu/drm/amd/display/dc/dcn314/ |
| D | dcn314_dio_stream_encoder.h | 159 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
|
| /drivers/gpu/drm/radeon/ |
| D | rv770d.h | 794 # define HDMI_ACR_N_44(x) (((x) & 0xfffff) << 0) macro
|
| D | evergreend.h | 648 # define HDMI_ACR_N_44(x) (((x) & 0xfffff) << 0) macro
|
| /drivers/gpu/drm/amd/amdgpu/ |
| D | dce_v6_0.c | 1434 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz); in dce_v6_0_audio_set_acr()
|
| D | dce_v10_0.c | 1504 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz); in dce_v10_0_afmt_update_ACR()
|
| D | dce_v11_0.c | 1546 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz); in dce_v11_0_afmt_update_ACR()
|