Home
last modified time | relevance | path

Searched refs:HDP_MEM_COHERENCY_FLUSH_CNTL (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/radeon/
Devergreen_dma.c54 radeon_ring_write(ring, (0xf << 16) | (HDP_MEM_COHERENCY_FLUSH_CNTL >> 2)); in evergreen_dma_fence_ring_emit()
Dsi_dma.c200 radeon_ring_write(ring, (0xf << 16) | (HDP_MEM_COHERENCY_FLUSH_CNTL >> 2)); in si_dma_vm_flush()
Dni_dma.c457 radeon_ring_write(ring, (0xf << 16) | (HDP_MEM_COHERENCY_FLUSH_CNTL >> 2)); in cayman_dma_vm_flush()
Dni.c1255 WREG32(HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); in cayman_pcie_gart_tlb_flush()
2683 radeon_ring_write(ring, PACKET0(HDP_MEM_COHERENCY_FLUSH_CNTL, 0)); in cayman_vm_flush()
Dnid.h233 #define HDP_MEM_COHERENCY_FLUSH_CNTL 0x5480 macro
Dsid.h687 #define HDP_MEM_COHERENCY_FLUSH_CNTL 0x5480 macro
Dcikd.h840 #define HDP_MEM_COHERENCY_FLUSH_CNTL 0x5480 macro
Devergreend.h919 #define HDP_MEM_COHERENCY_FLUSH_CNTL 0x5480 macro
Dsi.c4278 WREG32(HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); in si_pcie_gart_tlb_flush()
5097 radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); in si_vm_flush()
Devergreen.c2381 WREG32(HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); in evergreen_pcie_gart_tlb_flush()
Dcik.c5402 WREG32(HDP_MEM_COHERENCY_FLUSH_CNTL, 0); in cik_pcie_gart_tlb_flush()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h690 #define HDP_MEM_COHERENCY_FLUSH_CNTL 0x1520 macro