Searched refs:HEVC_ENC_CMD_REG_WAIT (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ | ||
| D | soc15d.h | 430 #define HEVC_ENC_CMD_REG_WAIT 0x0000010a macro |
| D | uvd_v7_0.c | 1434 amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WAIT); in uvd_v7_0_enc_ring_emit_reg_wait() |