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Searched refs:IP0_11_8 (Results 1 – 10 of 10) sorted by relevance

/drivers/pinctrl/renesas/
Dpfc-r8a77970.c64 #define GPSR0_2 F_(DU_DR4, IP0_11_8)
165 #define IP0_11_8 FM(DU_DR4) FM(HCTS0_N) F_(0, 0) FM(A2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_… macro
270 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
400 PINMUX_IPSR_GPSR(IP0_11_8, DU_DR4),
401 PINMUX_IPSR_GPSR(IP0_11_8, HCTS0_N),
402 PINMUX_IPSR_GPSR(IP0_11_8, A2),
2237 IP0_11_8
Dpfc-r8a77980.c65 #define GPSR0_2 F_(DU_DR4, IP0_11_8)
198 #define IP0_11_8 FM(DU_DR4) FM(TX4) FM(GETHER_RMII_RXD0) FM(A2) F_(0, 0) F_(0, 0) F_(0, 0) F_(… macro
319 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
469 PINMUX_IPSR_GPSR(IP0_11_8, DU_DR4),
470 PINMUX_IPSR_GPSR(IP0_11_8, TX4),
471 PINMUX_IPSR_GPSR(IP0_11_8, GETHER_RMII_RXD0),
472 PINMUX_IPSR_GPSR(IP0_11_8, A2),
2690 IP0_11_8
Dpfc-r8a77995.c49 #define GPSR0_4 F_(MSIOF2_TXD, IP0_11_8)
211 #define IP0_11_8 FM(MSIOF2_TXD) FM(SCL3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
361 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
539 PINMUX_IPSR_GPSR(IP0_11_8, MSIOF2_TXD),
540 PINMUX_IPSR_MSEL(IP0_11_8, SCL3_A, SEL_I2C3_0),
2678 IP0_11_8
Dpfc-r8a7778.c559 PINMUX_IPSR_MSEL(IP0_11_8, SD1_DAT2_A, SEL_SD1_A),
560 PINMUX_IPSR_GPSR(IP0_11_8, MMC_D2),
561 PINMUX_IPSR_GPSR(IP0_11_8, BS),
562 PINMUX_IPSR_GPSR(IP0_11_8, ATADIR0_A),
563 PINMUX_IPSR_GPSR(IP0_11_8, SDSELF_A),
564 PINMUX_IPSR_GPSR(IP0_11_8, PWM4_B),
Dpfc-r8a77950.c132 #define GPSR2_11 F_(AVB_PHY_INT, IP0_11_8)
255 #define IP0_11_8 FM(AVB_PHY_INT) F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0)… macro
437 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
649 PINMUX_IPSR_GPSR(IP0_11_8, AVB_PHY_INT),
650 PINMUX_IPSR_MSEL(IP0_11_8, MSIOF2_SYNC_C, SEL_MSIOF2_2),
651 PINMUX_IPSR_MSEL(IP0_11_8, RX4_A, SEL_SCIF4_0),
4915 IP0_11_8
Dpfc-r8a77990.c135 #define GPSR2_2 F_(QSPI0_MISO_IO1, IP0_11_8)
215 #define IP0_11_8 FM(QSPI0_MISO_IO1) FM(HRTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) … macro
387 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
559 PINMUX_IPSR_GPSR(IP0_11_8, QSPI0_MISO_IO1),
560 PINMUX_IPSR_MSEL(IP0_11_8, HRTS4_N_A, SEL_HSCIF4_0),
4792 IP0_11_8
Dpfc-r8a77965.c138 #define GPSR2_11 F_(AVB_PHY_INT, IP0_11_8)
261 #define IP0_11_8 FM(AVB_PHY_INT) F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0)… macro
452 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
660 PINMUX_IPSR_GPSR(IP0_11_8, AVB_PHY_INT),
661 PINMUX_IPSR_MSEL(IP0_11_8, MSIOF2_SYNC_C, SEL_MSIOF2_2),
662 PINMUX_IPSR_MSEL(IP0_11_8, RX4_A, SEL_SCIF4_0),
5549 IP0_11_8
Dpfc-r8a7796.c138 #define GPSR2_11 F_(AVB_PHY_INT, IP0_11_8)
261 #define IP0_11_8 FM(AVB_PHY_INT) F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0)… macro
452 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
660 PINMUX_IPSR_GPSR(IP0_11_8, AVB_PHY_INT),
661 PINMUX_IPSR_MSEL(IP0_11_8, MSIOF2_SYNC_C, SEL_MSIOF2_2),
662 PINMUX_IPSR_MSEL(IP0_11_8, RX4_A, SEL_SCIF4_0),
5308 IP0_11_8
Dpfc-r8a77951.c133 #define GPSR2_11 F_(AVB_PHY_INT, IP0_11_8)
256 #define IP0_11_8 FM(AVB_PHY_INT) F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0)… macro
447 FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \
654 PINMUX_IPSR_GPSR(IP0_11_8, AVB_PHY_INT),
655 PINMUX_IPSR_MSEL(IP0_11_8, MSIOF2_SYNC_C, SEL_MSIOF2_2),
656 PINMUX_IPSR_MSEL(IP0_11_8, RX4_A, SEL_SCIF4_0),
5353 IP0_11_8
Dpfc-r8a77470.c559 PINMUX_IPSR_GPSR(IP0_11_8, SD0_DAT0),
560 PINMUX_IPSR_MSEL(IP0_11_8, SSI_SDATA1_C, SEL_SSI1_2),
561 PINMUX_IPSR_MSEL(IP0_11_8, RX4_E, SEL_SCIF4_4),